Abstract: Methods and systems for analog-to-digital conversion using two side branches that may be operated with overlapped timing such that a sampling phase may be overlapped with a previous conversion phase. Some embodiments provide a method of successive approximation A/D converting, comprising sampling a first signal onto a first capacitor that is configured to selectively couple to an analog input of a comparator, sampling a second signal onto capacitors that are coupled to a second analog input of the comparator and configured for charge redistribution successive approximation A/D conversion; carrying out, based on the first signal and the second signal, a charge redistribution successive approximation A/D conversion using the capacitors; and while carrying out the charge redistribution successive approximation A/D conversion based on the first and second signals, sampling a third signal onto a third capacitor that is configured to selectively couple to the analog input of a comparator.

Abstract: Methods and systems for analog-to-digital conversion using two side branches that may be operated with overlapped timing such that a sampling phase may be overlapped with a previous conversion phase. Some embodiments provide a method of successive approximation A/D converting, comprising sampling a first signal onto a first capacitor that is configured to selectively couple to an analog input of a comparator, sampling a second signal onto capacitors that are coupled to a second analog input of the comparator and configured for charge redistribution successive approximation A/D conversion; carrying out, based on the first signal and the second signal, a charge redistribution successive approximation A/D conversion using the capacitors; and while carrying out the charge redistribution successive approximation A/D conversion based on the first and second signals, sampling a third signal onto a third capacitor that is configured to selectively couple to the analog input of a comparator.

Abstract: Methods and systems for analog-to-digital conversion using two side branches that may be operated with overlapped timing such that a sampling phase may be overlapped with a previous conversion phase. Some embodiments provide a method of successive approximation A/D converting, comprising sampling a first signal onto a first capacitor that is configured to selectively couple to an analog input of a comparator, sampling a second signal onto capacitors that are coupled to a second analog input of the comparator and configured for charge redistribution successive approximation A/D conversion; carrying out, based on the first signal and the second signal, a charge redistribution successive approximation A/D conversion using the capacitors; and while carrying out the charge redistribution successive approximation A/D conversion based on the first and second signals, sampling a third signal onto a third capacitor that is configured to selectively couple to the analog input of a comparator.

Abstract: The invention provides the art with novel image sensor pixel designs comprising stacked, pinned photodiodes. The stacked pinned photodiodes provide pixels with greatly increased dynamic range. The stacked pinned photodiodes also allow improved color discrimination for low light imaging, for example utilizing pixels with no overlaying color filter array.

Abstract: Methods and systems for analog-to-digital conversion applicable to an image sensor, such as a CMOS image sensor, in which an ADC comprises built-in redundancy such that the ADC can start its conversion cycle before the ADC input settles to a desired resolution and the ADC can yet accurately convert the ADC input to a digital value with the desired resolution. In a CMOS image sensor, such an ADC configuration enables the pixel readout time to overlap with the ADC conversion time, reducing the total time needed to convert the pixel signal value to a digital value with the desired resolution.

Abstract: An image sensor system that compensates the amplifier in a column of a pixel array. This uses a sampling capacitor, that receives a signal from a pixel of the pixel array. A first plate of the sampling capacitor receives a value from the amplifier representing an offset level of the amplifier. While receiving the offset level from the amplifier on the first plate, the capacitor receives information from the pixel on a second plate of the same capacitor that is receiving the offset, thereby canceling the offset. The value from said sampling capacitor indicative of said information from said pixel with said offset cancelled being coupled to said amplifier to amplify said value as a first pixel value. The amplifier is also connected to other selecting switches from other pixels of said column of the pixel array.

Abstract: Provided herein is a novel stacked pixel design for image sensor applications. The stacked pixel designs may comprise a first and second wafer, wherein the first wafer is an elemental wafer comprising a photodiode and minimal additional components, such that material selection and processing steps of the first wafer may be optimized for the creation of a high quality photodiode. The second wafer comprises components necessary for the readout and reset of the photodiode on the first wafer.

Abstract: The invention provides the art with novel image sensor pixel designs comprising stacked, pinned photodiodes. The stacked pinned photodiodes provide pixels with greatly increased dynamic range. The stacked pinned photodiodes also allow improved color discrimination for low light imaging, for example utilizing pixels with no overlaying color filter array.

Abstract: Methods and systems for analog-to-digital conversion using two side branches that may be operated with overlapped timing such that a sampling phase may be overlapped with a previous conversion phase. Some embodiments provide a method of successive approximation A/D converting, comprising sampling a first signal onto a first capacitor that is configured to selectively couple to an analog input of a comparator, sampling a second signal onto capacitors that are coupled to a second analog input of the comparator and configured for charge redistribution successive approximation A/D conversion; carrying out, based on the first signal and the second signal, a charge redistribution successive approximation A/D conversion using the capacitors; and while carrying out the charge redistribution successive approximation A/D conversion based on the first and second signals, sampling a third signal onto a third capacitor that is configured to selectively couple to the analog input of a comparator.

Abstract: A successive approximation A/D converter which includes a sub ranging classifier that receives an input signal and classifies said input signal according to plural different highest resolution bits, to determine a range of the input signal, and creating a set of most significant bits based on said range, said subranging classifier also setting and determining an offset based on said range, and a successive approximation A/D converted that converting lowest resolution parts of the input signal as adjusted by the offset.

Abstract: A successive approximation A/D converter which includes a sub ranging classifier that receives an input signal and classifies said input signal according to plural different highest resolution bits, to determine a range of the input signal, and creating a set of most significant bits based on said range, said subranging classifier also setting and determining an offset based on said range, and a successive approximation A/D converted that converting lowest resolution parts of the input signal as adjusted by the offset.

Abstract: An image sensor that uses the same capacitor to sample the image and the amplifier offset. Readout is thus inherently compensated.

Abstract: A switched capacitor sample and hold buffer that can be used, for example, in a CMOS image sensor. The switched capacitor sample and hold circuit has large output swings, low noise and reduced capacitor area compared to the traditional switched capacitor approach.

Abstract: The present invention relates to improved imaging devices having high dynamic range and to monitoring and automatic control systems incorporating the improved imaging devices.

Abstract: A switched capacitor sample and hold buffer that can be used, for example, in a CMOS image sensor. The switched capacitor sample and hold circuit has large output swings, low noise and reduced capacitor area compared to the traditional switched capacitor approach.

Abstract: The present invention relates to improved imaging devices having high dynamic range and to monitoring and automatic control systems incorporating the improved imaging devices.

Abstract: CMOS image sensor with a rolling shutter that uses two separate clocks. One of the clocks is used during normal operation. When timing is changed, the other clock is started and used during an interim period to avoid distortion in the image. After that interim period, the new clock timing is coupled to the original clock circuit.

Abstract: The present invention relates to improved imaging devices having high dynamic range and to monitoring and automatic control systems incorporating the improved imaging devices.

Abstract: The present invention relates to improved imaging devices having high dynamic range and to monitoring and automatic control systems incorporating the improved imaging devices.

Abstract: Imaging sensors having dual-port for digital readout to pipeline readout processes of two different groups of pixels.