Abstract: An ADC includes a plurality of sub ADCs configured to operate in a time-interleaved manner and a sampling circuit configured to receive an analog input signal of the ADC, wherein the sampling circuit is common to all sub ADCs. The ADC includes a test signal generation circuit configured to generate a test signal for calibration of the ADC. The sampling circuit has a first input configured to receive the analog input signal and a second input configured to receive the test signal. The sampling circuit includes an amplifier circuit and a first feedback switch connected between an output of the amplifier circuit and an input of the amplifier circuit. The first feedback switch is configured to be closed during a first clock phase and open during a second clock phase, which is non-overlapping with the first clock phase.

Abstract: A multipath bootstrapped sampling circuit includes a sampling capacitor, a sampling transistor interposed between the sampling capacitor and the analog input signal voltage, two bootstrap capacitors, and a bootstrap switching network periodically transitioning between a holding phase and a tracking phase. The bootstrap switching network includes a primary bootstrap path that drives only one load: the gate terminal of the sampling transistor. One or more auxiliary bootstrap paths drive other transistors in the bootstrap switching network. This absolutely minimizes the parasitic capacitance due to fan-out on the primary bootstrap path. Additionally, the provision of two (or more) bootstrap capacitors allows bulk terminals of transistors on the primary bootstrap path to be connected to an auxiliary bootstrap path, further reducing parasitic capacitance on the primary bootstrap path.

Abstract: An ADC includes a plurality of sub ADCs configured to operate in a time-interleaved manner and a sampling circuit configured to receive an analog input signal of the ADC, wherein the sampling circuit is common to all sub ADCs. The ADC includes a test signal generation circuit configured to generate a test signal for calibration of the ADC. The sampling circuit has a first input configured to receive the analog input signal and a second input configured to receive the test signal. The sampling circuit includes an amplifier circuit and a first feedback switch connected between an output of the amplifier circuit and an input of the amplifier circuit. The first feedback switch is configured to be closed during a first clock phase and open during a second clock phase, which is non-overlapping with the first clock phase.

Abstract: The present disclosure generally relates to the field of receiver structures in radio communication systems and more specifically to passive mixers in the receiver structure and to a technique for converting a first signal having a first frequency into a second signal having a second frequency by using a third signal having a third frequency.

Abstract: A pipelined ADC includes a first sub ADC and a second sub ADC. The second sub ADC is configured to receive, as an input, an analog residue generated by the first sub ADC. The first sub ADC is configured to operate in a first conversion phase, generating a digital output of the first sub ADC, and a second conversion phase, generating the analog residue. The first sub ADC includes a reference-voltage generator circuit configured to generate a reference voltage of the first sub ADC and having a first mode of operation and a second mode of operation, in which the noise power of the reference voltage is less than in the first mode of operation. The reference-voltage generator circuit is configured to operate in its first mode of operation in the first conversion phase and in its second mode of operation in the second conversion phase.

Abstract: The present disclosure generally relates to the field of receiver structures in radio communication systems and more specifically to passive mixers in the receiver structure and to a technique for converting a first signal having a first frequency into a second signal having a second frequency by using a third signal having a third frequency.

Abstract: The present disclosure generally relates to the field of receiver structures in radio communication systems and more specifically to passive mixers in the receiver structure and to a technique for converting a first signal having a first frequency into a second signal having a second frequency by using a third signal having a third frequency.

Abstract: Systems and methods of noise suppression by an amplifier are presented. In one exemplary embodiment, an amplifier comprises first and fourth transistors configured as a first differential pair of transistors in a common-gate configuration, and second and third transistors configured as a second differential pair of transistors in a common-source configuration. The first and fourth transistors are operative to receive, from a differential input, by a source of each first and fourth transistor, a differential input signal. Further, a drain of each first and fourth transistor is coupled to respective first and second outputs configured as a differential output. The second and third transistors are operative to output, from a drain of each second and third transistor, to the respective second and first outputs, a differential output signal. Further, a gate of each second and third transistor is coupled to the respective first and second inputs.

Abstract: A pipelined ADC (25) is disclosed, comprising a first sub ADC (50) and a second sub ADC (60). The second sub ADC (60) is configured to receive, as an input, an analog residue generated by the first sub ADC (50). The first sub ADC (50) is configured to operate in a first conversion phase, in which it generates a digital output of the first sub ADC (50), and a second conversion phase, in which it generates the analog residue. The first sub ADC (50) comprises a reference-voltage generator circuit (52) configured to generate a reference voltage (vref) of the first sub ADC (50) and having a first mode of operation and a second mode of operation, in which the noise power of the reference voltage (vref) is less than in the first mode of operation. The reference-voltage generator circuit (52) is configured to operate in its first mode of operation in the first conversion phase and in its second mode of operation in the second conversion phase.

Abstract: A radio frequency receiver having a plurality of parallel receiving paths, wherein each path can receive a radio frequency signal in one of a plurality of radio frequency bands and amplify the received signal in a low noise amplifier. The amplified signals from the plurality of parallel paths are combined to one combined radio frequency signal in a common summation node and down-converted to a lower frequency signal in a mixer circuit. Each low noise amplifier comprises a low noise transconductance circuit providing a current signal to drive the common summation node, and an automatic gain control circuit in each path compensates for variations in signal strength independently of signal strengths of signals received by the other receiving paths. The receiver is suitable for simultaneous multiple band reception, where received signal strength can vary between the frequency bands.

Abstract: A receiver front end arrangement comprises a radio frequency signal input suitable to be connected to an antenna arrangement, a filter bank of non-overlapping band filters associated with respective band for the multi-band reception, a signal conditioning arrangement connected to the filter bank, and a low-noise amplifier arrangement connected to the signal conditioning arrangement. The low-noise amplifier arrangement comprises a path for each band of bands of the multi-band reception. For each path associated with a band for the multi-band reception the low-noise amplifier arrangement comprises a low-noise amplifier. The respective low-noise amplifier has band pass characteristics, or has a band filter connected where the band filter output has a direct connection to the input of the low-noise amplifier, corresponding to a band of the multi-band reception, respectively.

Abstract: The present disclosure generally relates to the field of receiver structures in radio communication systems and more specifically to passive mixers in the receiver structure and to a technique for converting a first signal having a first frequency into a second signal having a second frequency by using a third signal having a third frequency.

Abstract: Systems and methods of noise suppression by an amplifier are presented. In one exemplary embodiment, an amplifier comprises first and fourth transistors configured as a first differential pair of transistors in a common-gate configuration, and second and third transistors configured as a second differential pair of transistors in a common-source configuration. The first and fourth transistors are operative to receive, from a differential input, by a source of each first and fourth transistor, a differential input signal. Further, a drain of each first and fourth transistor is coupled to respective first and second outputs configured as a differential output. The second and third transistors are operative to output, from a drain of each second and third transistor, to the respective second and first outputs, a differential output signal. Further, a gate of each second and third transistor is coupled to the respective first and second inputs.

Abstract: The present disclosure generally relates to the field of receiver structures in radio communication systems and more specifically to passive mixers in the receiver structure and to a technique for converting a first signal having a first frequency into a second signal having a second frequency by using a third signal having a third frequency.

Abstract: A radio frequency receiver having a plurality of parallel receiving paths, wherein each path can receive a radio frequency signal in one of a plurality of radio frequency bands and amplify the received signal in a low noise amplifier. The amplified signals from the plurality of parallel paths are combined to one combined radio frequency signal in a common summation node and down-converted to a lower frequency signal in a mixer circuit. Each low noise amplifier comprises a low noise transconductance circuit providing a current signal to drive the common summation node, and an automatic gain control circuit in each path compensates for variations in signal strength independently of signal strengths of signals received by the other receiving paths. The receiver is suitable for simultaneous multiple band reception, where received signal strength can vary between the frequency bands.

Abstract: An amplifier (100) adapted for noise suppression comprises a first input (102) for receiving a first input signal and a second input (104) for receiving a second input signal, the first and second input signals constituting a differential pair. A first output (106) delivers a first output signal and a second output (108) delivers a second output signal, the first and second output signals constituting a differential pair. A first transistor (MCG1) has a first drain (110) coupled to the first output (106) such that all signal current, except parasitic losses, flowing through the first drain (110) flows through the first output (106), and the first transistor (MCG1) further having a first source (112) coupled to the first input (102).

Abstract: A radio frequency receiver comprises a plurality of parallel receiving paths, wherein each path can receive a radio frequency signal in one of a plurality of radio frequency bands and amplify the received signal in a low noise amplifier. The amplified signals from the plurality of parallel paths are combined to one combined radio frequency signal in a common summation node and down-converted to a lower frequency signal in a mixer circuit. Each low noise amplifier comprises a low noise transconductance circuit providing a current signal to drive the common summation node, and an automatic gain control circuit in each path compensates for variations in signal strength independently of signal strengths of signals received by the other receiving paths. The receiver is suitable for simultaneous multiple band reception, where received signal strength can vary between the frequency bands.

Abstract: A receiver front end arrangement comprises a radio frequency signal input suitable to be connected to an antenna arrangement, a filter bank of non-overlapping band filters associated with respective band for the multi-band reception, a signal conditioning arrangement connected to the filter bank, and a low-noise amplifier arrangement connected to the signal conditioning arrangement. The low-noise amplifier arrangement comprises a path for each band of bands of the multi-band reception. For each path associated with a band for the multi-band reception the low-noise amplifier arrangement comprises a low-noise amplifier. The respective low-noise amplifier has band pass characteristics, or has a band filter connected where the band filter output has a direct connection to the input of the low-noise amplifier, corresponding to a band of the multi-band reception, respectively.

Abstract: A radio frequency receiver comprises a plurality of parallel receiving paths, wherein each path can receive a radio frequency signal in one of a plurality of radio frequency bands and amplify the received signal in a low noise amplifier. The amplified signals from the plurality of parallel paths are combined to one combined radio frequency signal in a common summation node and down-converted to a lower frequency signal in a mixer circuit. Each low noise amplifier comprises a low noise transconductance circuit providing a current signal to drive the common summation node, and an automatic gain control circuit in each path compensates for variations in signal strength independently of signal strengths of signals received by the other receiving paths. The receiver is suitable for simultaneous multiple band reception, where received signal strength can vary between the frequency bands.

Abstract: An amplifier (100) adapted for noise suppression comprises a first input (102) for receiving a first input signal and a second input (104) for receiving a second input signal, the first and second input signals constituting a differential pair. A first output (106) delivers a first output signal and a second output (108) delivers a second output signal, the first and second output signals constituting a differential pair. A first transistor (MCG1) has a first drain (110) coupled to the first output (106) such that all signal current, except parasitic losses, flowing through the first drain (110) flows through the first output (106), and the first transistor (MCG1) further having a first source (112) coupled to the first input (102).