Abstract: An improved TTL tristate device with reduced output capacitance incorporates an active discharge sequence of three elements including first and second active transistor elements (Q8, Q7) in an inversion coupling and a third passive element comprising a passive diode cluster (D3, D4, D5) coupled between the base of the second transistor element (Q7) and the enable gate. The passive diode cluster is operatively arranged for delivering base drive current to the base of the second transistor (Q7) when the enable gate (A) is at high potential for operation of the output device in the bistate mode. The passive diode cluster also operatively diverts base drive current away from the base of the second transistor (Q7) when the enable gate (A) is at low potential for operation of the output device in the high impedance third state with reduced output capacitance.

Abstract: A data latch of the kind having at least two operative modes, a transmitting or transparent mode or condition for transmitting data signals through the latch, and a latching mode or condition for latching and temporary storage by feedback of data signals in the latch. According to the invention there is provided in the data latch a pregate for pregating feedback signals in the latch. The pregate is adapted and coupled to provide positive feedback data signals for reinforcing previously entered data in the latching mode, and gating signals for passing input data in the transmitting mode.

Abstract: A transistor logic tristate output gate or device is provided with active or passive element arrangements coupled between the enable gate on the one hand and the base of the pull down element transistor on the other hand. This coupling affords a low impedance route to ground or low potential from the base of the pull down element when the enable gate is at low potential and the output device is in the high impedance third state. Miller feedback current at the base of the pull down element transistor is thereby diverted to ground. The coupling arrangement affords high impedance to current flow in the opposite direction thereby blocking current flow from the enable gate when the enable gate is at high potential. For active discharge of Miller current three transistors are provided in a double inversion series coupling between the enable gate and pull down element. Alternately a multiple emitter junction transistor is used.