Patents by Inventor David A. Wells

David A. Wells has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090287048
    Abstract: A method and apparatus for imaging within a living body is described. The method includes directing a micro-guidewire along a primary path of the living body, the micro-guidewire having an imaging device including a SSID with an imaging array and a GRIN lens optically coupled to the imaging array. A secondary path can be identified, laterally branching from the primary path, the secondary path being of much smaller dimensions than the primary path. The distal end of the micro-guidewire can be turned and advanced into the secondary path by applied pressure at a proximal end of the micro-guidewire.
    Type: Application
    Filed: May 16, 2008
    Publication date: November 19, 2009
    Inventors: Stephen C. Jacobson, David Wells
  • Publication number: 20090204723
    Abstract: A system and method for handling a digital electronic flow between a first and second entity in which a flow policy is determined that is to be applied to the flow and the flow is then directed along a path in accordance with the policy. An ID is supplied for each flow and a tag associated with each flow which indicates the policy to be applied to its associated flow. Flows are also associated with one another, with associated flows having associated policies. In particular the flow may be processed or forwarded. The path may include a graph structure and virtual applications.
    Type: Application
    Filed: August 23, 2006
    Publication date: August 13, 2009
    Applicant: NETRONOME SYSTEMS INC.
    Inventors: Johann Heinrich Tonsing, Roelof Nico DuToit, Gysbert Floris van Beek Van Leeuwen, Jan Niel Viljoen, David Wells, Leon Johannes Brits, Jan Christoffel DuToit
  • Patent number: 7539148
    Abstract: Techniques for performing a continuity check operation include sending a pattern of bits over a packet network connection through a first interface on a packet network to a second interface on the packet network. The first interface is monitored for return of the pattern of bits over the packet network connection. A decision whether the continuity check is successful is based on whether the pattern of bits is detected at the first interface during the monitoring. The techniques can be used for both narrowband as well as broadband calls over the packet network.
    Type: Grant
    Filed: January 20, 2006
    Date of Patent: May 26, 2009
    Assignee: Tellabs Operations, Inc.
    Inventors: Dale A. Scholtens, David Wells
  • Publication number: 20090050867
    Abstract: A method for forming a first feature within a dielectric, metal, or semiconductor material and, optionally, under an existing second feature, comprises the use of an anisotropic etch, the formation of a spacer used to prevent lateral etching, a subsequent isotropic etch to form a hollow opening, and the formation of one or more conductive and/or dielectric materials within the opening. The anisotropic etch may expose a conductive feature to which contact is to be made, depending on the particular use of the inventive method. An inventive structure is also described.
    Type: Application
    Filed: August 20, 2007
    Publication date: February 26, 2009
    Inventors: David Wells, Chandra Mouli
  • Patent number: 7456452
    Abstract: Light sensors in an imager having sloped features including, but not limited to, hemispherical, v-shaped, or other sloped shapes. Light sensors having such a sloped feature can redirect incident light that is not absorbed by one portion of the photosensor to another portion of the photosensor for absorption there.
    Type: Grant
    Filed: December 15, 2005
    Date of Patent: November 25, 2008
    Assignee: Micron Technology, Inc.
    Inventors: David Wells, Shane P. Leiphart
  • Publication number: 20080261349
    Abstract: Various pattern transfer and etching steps can be used to create features. Conventional photolithography steps can be used in combination with pitch-reduction techniques to form superimposed, pitch-reduced patterns of crossing elongate features that can be consolidated into a single layer. Planarizing techniques using a filler layer and a protective layer are disclosed. Portions of an integrated circuit having different heights can be etched to a common plane.
    Type: Application
    Filed: May 19, 2008
    Publication date: October 23, 2008
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Mirzafer Abatchev, David Wells, Baosuo Zhou, Krupakar M. Subramanian
  • Publication number: 20080249841
    Abstract: A system and method is disclosed for providing targeted advertising for association with retrieved content on media, such as the Internet or World Wide Web, in such a way that it is not susceptible to click fraud. This system and method are directed to a “pay for share” system that provides billing before targeted advertisements are made available for selection for display.
    Type: Application
    Filed: April 2, 2008
    Publication date: October 9, 2008
    Inventors: William Marcus RUARK, Matthew Trent SABINO, Matthew David WELLS
  • Publication number: 20080217518
    Abstract: An electronic detecting apparatus is provided for detecting an output of an external device such as a light emitter. The apparatus comprises a detector operative to detect a variable relating to the output of the external device, and a controller operative to receive a detector signal from the detector indicative of an initial non-steady state value of the detected variable. The controller is further operative to process the detector signal to generate a processed signal, the controller combining the detector signal and the processed signal to generate an output signal indicative of a future steady state value of the variable. The apparatus thus speeds up the time taken for the steady state value of the variable to be determined.
    Type: Application
    Filed: March 3, 2008
    Publication date: September 11, 2008
    Inventors: John Hewinson, Bryan Allen Tozer, David Wells
  • Publication number: 20080180729
    Abstract: A method and system is provided for printing jobs received from enterprise customers through a global printing network. One aspect relates to an architecture that interfaces customers, communication service firms (CSFs), and downstream digital print service providers (PSPs) in a global communications network. Such an architecture permits last-mile production functions that allow the distribution of print jobs to be optimized, containing costs, maintaining quality, and performing billing functions that improve the quality of such networks and make a global print network feasible. As a result, Enterprise customers benefit from lower costs and global sourcing while print service providers and graphics service firms benefit from increased revenue due to increased utilization of the overall global network.
    Type: Application
    Filed: June 18, 2007
    Publication date: July 31, 2008
    Applicant: HubCast, Inc.
    Inventors: Toby LaVigne, Christopher David Wells, Aron Blume
  • Patent number: 7393789
    Abstract: Various pattern transfer and etching steps can be used to create features. Conventional photolithography steps can be used in combination with pitch-reduction techniques to form superimposed, pitch-reduced patterns of crossing elongate features that can be consolidated into a single layer. Planarizing techniques using a filler layer and a protective layer are disclosed. Portions of an integrated circuit having different heights can be etched to a common plane.
    Type: Grant
    Filed: September 1, 2005
    Date of Patent: July 1, 2008
    Assignee: MICRON Technology, Inc.
    Inventors: Mirzafer Abatchev, David Wells, Baosuo Zhou, Krupakar M. Subramanian
  • Publication number: 20080143859
    Abstract: The invention relates to an imaging device having a pixel cell with a transparent conductive material interconnect line for focusing incident light onto a photosensor and providing an electrical connection to pixel circuitry, and the method of making the same.
    Type: Application
    Filed: February 5, 2008
    Publication date: June 19, 2008
    Inventor: David Wells
  • Publication number: 20080085661
    Abstract: A polishing pad is provided herein, which may include a plurality of soluble fibers having a diameter in the range of about 5 to 80 micrometers, and an insoluble component. The pad may also pad include a first surface having a plurality of micro-grooves, wherein the soluble fibers form the micro-grooves in the pad. The micro-grooves may have a width and/or depth up to about 150 micrometers. In addition, a method of forming the polishing pad and a method of polishing a surface with the polishing pad is disclosed.
    Type: Application
    Filed: July 19, 2007
    Publication date: April 10, 2008
    Applicant: INNOPAD, INC.
    Inventors: Oscar HSU, Marc JIN, David WELLS, John ALDEBORGH
  • Patent number: 7355222
    Abstract: The invention relates to an imaging device having a pixel cell with a transparent conductive material interconnect line for focusing incident light onto a photosensor and providing an electrical connection to pixel circuitry, and the method of making the same.
    Type: Grant
    Filed: May 19, 2005
    Date of Patent: April 8, 2008
    Assignee: Micron Technology, Inc.
    Inventor: David Wells
  • Publication number: 20080073687
    Abstract: A method of forming a buried digit line is disclosed. Sacrificial spacers are formed along the sidewalls of an isolation trench, which is then filled with a sacrificial material. One spacer is masked while the other spacer is removed and an etch step into the substrate beneath the removed spacer forms an isolation window. Insulating liners are then formed along the sidewalls of the emptied trench, including into the isolation window. A digit line recess is then formed through the bottom of the trench between the insulating liners, which double as masks to self-align this etch. The digit line recess is then filled with metal and recessed back, with an optional prior insulating element deposited and recessed back in the bottom of the recess.
    Type: Application
    Filed: October 31, 2007
    Publication date: March 27, 2008
    Applicant: Micron Technology, Inc.
    Inventor: David Wells
  • Publication number: 20070249138
    Abstract: A substrate structure, and method of forming the structure, are provided. The structure, which may be used for a CMOS imager device, is provided with a buried dielectric structure. Recesses are formed on a semiconductor substrate, e.g., silicon, and a dielectric material is used to fill the recesses. A layer of semiconductor material, e.g., silicon, is then formed over the surface of the substrate material and dielectric-filled trenches.
    Type: Application
    Filed: April 24, 2006
    Publication date: October 25, 2007
    Inventors: Jiutao Li, David Wells
  • Publication number: 20070184554
    Abstract: The invention disclosed herein demonstrates that that the adaptive process in the intestine can be tracked using plasma citrulline. It further demonstrates that plasma citrulline is of clinical utility as a biomarker for improvements in intestinal function.
    Type: Application
    Filed: December 1, 2006
    Publication date: August 9, 2007
    Applicant: NPS ALLELIX CORP.
    Inventors: Nathan Teuscher, Lidia Demchyshyn, David Wells
  • Publication number: 20070173014
    Abstract: A memory cell, device, and system include a memory cell having a shared digitline, a storage capacitor, and a plurality of access transistors configured to selectively electrically couple the storage capacitor with the shared digitline. The digitline couples with adjacent memory cells and the access transistors selects which adjacent memory cell is coupled to the shared digitline. A method of forming the memory cell includes forming a buried digitline in the substrate and a vertical pillar in the substrate immediately adjacent to the buried digitline. A dual gate transistor is formed on the vertical pillar with a first end electrically coupled to the buried digitline and a second end coupled to a storage capacitor formed thereto.
    Type: Application
    Filed: February 26, 2007
    Publication date: July 26, 2007
    Inventors: H. Manning, David Wells
  • Publication number: 20070138590
    Abstract: Light sensors in an imager having sloped features including, but not limited to, hemispherical, v-shaped, or other sloped shapes. Light sensors having such a sloped feature can redirect incident light that is not absorbed by one portion of the photosensor to another portion of the photosensor for absorption there.
    Type: Application
    Filed: December 15, 2005
    Publication date: June 21, 2007
    Inventors: David Wells, Shane Leiphart
  • Publication number: 20070049032
    Abstract: Various pattern transfer and etching steps can be used to create features. Conventional photolithography steps can be used in combination with pitch-reduction techniques to form superimposed, pitch-reduced patterns of crossing elongate features that can be consolidated into a single layer. Planarizing techniques using a filler layer and a protective layer are disclosed. Portions of an integrated circuit having different heights can be etched to a common plane.
    Type: Application
    Filed: September 1, 2005
    Publication date: March 1, 2007
    Inventors: Mirzafer Abatchev, David Wells, Baosuo Zhou, Krupakar Subramanian
  • Patent number: D567776
    Type: Grant
    Filed: June 13, 2006
    Date of Patent: April 29, 2008
    Assignee: Thureon Limited
    Inventor: Robbie David Wells