Abstract: In an embodiment, in response to receiving from a client computer a client request to connect to a server: processing the client request in a network protection device including applying one or more translations and one or more security checks, generating a server acknowledgment to the client computer as if the server acknowledged receiving the client request from the client computer, processing the server acknowledgement in the network protection device including applying one or more translations and one or more security checks and sending the server acknowledgment to the client computer; in response to receiving a client acknowledgment of receiving the server acknowledgment, determining that a first path between the client computer and the network protection device is operational; generating a server request to the server; processing the server request in the network protection device, determining that a second path between the network protection device and the server is operational.

Abstract: The present invention concerns an apparatus for protecting a satellite reception system from strong terrestrial signals. A high Q tunable trap is used to help reject strong ATSC signals or other signals that may be present on the input coaxial cable of a satellite receiver that operates in a single-wire multi-switch (SWM) environment.

Abstract: The present invention concerns a system and associated method for providing attenuation of a received signal in a two-way communication circuit without the use of a separate switchable attenuator. Specifically, the attenuation provided by a transmit/receive switch set to the transmit position during reception is used to provide attenuation to a signal reception path.

Abstract: The present disclosure concerns a compound, or a pharmaceutically acceptable salt thereof, having a formula: where at least one of R1-R4 is a heterocycle, at least one of R1-R4 is an aryl group coupled to the ring by a linker atom, functional group, or other moiety, or where none of R1-R4 is an amide, and any and all combinations thereof. Remaining R1-R4 substituents independently are aliphatic, substituted aliphatic, amine, substituted amine, aryl, substituted aryl, cyclic, substituted cyclic, halide, heteroaryl, substituted heteroaryl, heterocyclic, substituted heterocyclic, hydrogen or hydroxyl. A method for treating a subject also is provided comprising administering a disclosed compound or compounds, or a prodrug that is converted into the disclosed compound or compounds, or a composition comprising the compound, compounds, or prodrugs thereof, to a subject. A method for making disclosed compounds also is provided.

Abstract: The present invention allows for a robust design using manufacturability models. A method, system and/or computer usable medium may be provided in an integrated circuit design to track sensitivity to a variation of process from wafer to wafer and/or fab to fab in order to assist the designers to anticipate the variations to improve the final yield of the products.

Abstract: A battery pack system module may include a module bypass switch for allowing charge current to bypass the battery pack system module. A charge switch and a discharge switch may be coupled with the module bypass switch. When other battery pack system modules are coupled in series with the module, balancing between modules may be achieved by allowing charge current to bypass the unbalanced modules and charge other modules. For example, when an unbalanced module is at a higher level of charge than other modules, a charge switch and a discharge switch in the unbalanced module de-activate and a module bypass switch activates to allow charge current to rapidly bring other modules into balance. The discharge switch and the charge switch allow the charging current to bypass the unbalanced module creating little or no additional heat dissipation.

Abstract: In the case of printing at high addressability, where the cell size is smaller than the spot size, an image can be decimated in a manner that will limit the large accumulation of printed material. The proper decimation of the image will depend on the spot size, the physics of drop coalescence and the addressability during printing. A simple method of using concentric decimation is disclosed herein to enable this process.

Abstract: Silicon and glass micromachined (MEMS) acoustic sensors incorporating trapped-liquid architectures are disclosed. The trapped liquid serves as an acoustic transmission medium allowing the input port to the system to be physically separated from the sensing location. The trapped liquid interacts with a conductive, flexible sensing membrane. Sound pressure waves enter the trapped liquid through an input membrane, travel to the sensing membrane, and excite vibrations of the sensing membrane. The vibrations of the sensing membrane are measured using on-chip capacitive sensing. The capacitive sensing structure is formed by the conductive sensing membrane and a fixed conducting top electrode. As the gap between the conductive sensing membrane and the fixed top electrode varies, the capacitance varies, leading to an electrical signal which is the electrical output of the system.

Abstract: The present invention allows for a robust design using manufacturability models. A method, system and/or computer usable medium may be provided in an integrated circuit design to track sensitivity to a variation of process from wafer to wafer and/or fab to fab in order to assist the designers to anticipate the variations to improve the final yield of the products.

Abstract: Disclosed are methods, systems, and articles of manufacture for implementing electronic designs with simulation awareness. A schematic is identified or created and simulated at the schematic level to characterize the functional behavior of the circuit or to ensure the circuit design meets the required design specifications. Physical data of a component of the design is identified, created, or updated, and the electrical parasitic associated with physical data is characterized. One or more electrical characteristics associated with the parasitic is further characterized and mapped to the simulator to re-simulate the circuit design to analyze the impact of parasitics. Some embodiments re-run the same simulation process incrementally in an interactive manner by accepting incremental design or parameter changes from the design environment.

Abstract: Disclosed are a method, system, and computer program product for providing customizable information in designing electronic circuits with electrical awareness. The method or the system displays a portion of a physical design of an electronic circuit in a first display area. The method or the system receives or identifies a user's or a system's manipulation of the portion of the physical design of the electronic circuit. The method or the system then determines and displays an in situ response to the manipulation in the first display area. The method or the system may further display, in the first display area or in another display area, result(s) relating to the physical data of a component, electrical parasitic(s) associated with the physical data, electrical characteristic(s) associated with the physical data or the electrical characteristic(s), or other element(s) of the physical design that is impacted by the manipulation.

Abstract: Disclosed are methods, systems, and articles of manufacture for implementing electronic circuit designs with electro-migration awareness. Some embodiments perform schematic level simulation(s) to determine electrical characteristics, identifies physical parasitics of a layout component, determines the electrical or physical characteristics associated to electro-migration analysis on the component, and determines whether the component meets EM related constraint(s) while implementing the physical design of the electronic circuit in some embodiments. Some embodiments further determine adjustment(s) to the component or related data where the EM related constraints are not met and/or and present the adjustment(s) in the form of hints. Various data and information, such as currents in various forms or voltages, are passed between various schematic level tools and physical level tools.

Abstract: Disclosed are a method, system, and computer program product for implementing electronic circuit designs with electrical awareness. The method or the system updates the schematic level tool(s) and physical design tool(s) with electrical parasitic data or electrical characteristic data associated with electrical parasitics so both schematic and physical design tools are aware of the electrical parasitic or characteristic data in performing their functions such as extraction based simulations. The methods or systems are also aware of EM or IR-drop constraint(s) while implementing or creating a partial layout less than a complete layout. The method or the system also provides a user interface for a design tool to provide in situ, customizable, real-time information for implementing electronic circuit designs with electrical awareness. The methods or systems also support constraint verification for electronic circuit design implementation with electrical awareness.

Abstract: Disclosed are methods, systems, and articles of manufacture for constraint verification for implementing electronic circuit designs with electrical awareness. Some embodiments identify or set parasitic constraint(s) and compare the electrical parasitic(s) with corresponding parasitic constraint(s) to determine whether the parasitic constraints are met. Some embodiments first identify, determine, or update the physical data of a component of a partial layout and characterize the electrical parasitics associated with the physical data of the component. Some embodiments identify or determine some schematic level performance constraints and estimate parasitic constraints based on schematic simulation results and the performance constraints; the estimated parasitic constraints are then compared with the corresponding electrical parasitics to determine whether the constraints are satisfied.

Abstract: Disclosed are a method, system, and computer program product for providing customizable information in designing electronic circuits with electrical awareness. The method or the system displays a portion of a physical design of an electronic circuit in a first display area. The method or the system receives or identifies a user's or a system's manipulation of the portion of the physical design of the electronic circuit. The method or the system then determines and displays an in situ response to the manipulation in the first display area. The method or the system may further display, in the first display area or in another display area, result(s) relating to the physical data of a component, electrical parasitic(s) associated with the physical data, electrical characteristic(s) associated with the physical data or the electrical characteristic(s), or other element(s) of the physical design that is impacted by the manipulation.

Abstract: Devices and treatments for various joint conditions include a resilient elongate orthopedic device inserted into a joint space using a suture. The suture is passed through the joint space and used to pull the orthopedic device into the joint space. The suture may be using a percutaneously inserted needle or other type of needle-based delivery instrument. The resilient elongate orthopedic device may be restrained to a reduced profile that permits minimally invasive implantation, but assume an enlarged profile when positioned at an implantation site.

Abstract: Methods, systems and apparatus, including computer program products, for transferring, receiving, and storing multiple element data in a string of characters. Multiple data elements are sent in a string of delimited characters and have respective project identifiers, data types, and index numbers used to extract and store the data elements at a receiving computer.

Abstract: In the case of printing at high addressability, where the cell size is smaller than the spot size, an image can be decimated in a manner that will limit the large accumulation of printed material. The proper decimation of the image will depend on the spot size, the physics of drop coalescence and the addressability during printing. A simple method of using concentric decimation is disclosed herein to enable this process.

Abstract: A drop generator having a via structure configured for electrical and fluidic interconnection. The via structure includes an electrically conductive layer and an electrically insulating layer disposed on the electrically conductive layer.

Abstract: A process for the recovery of nickel and/or cobalt from a nickel and/or cobalt containing solution comprising: (i) contacting the nickel and/or cobalt containing solution with metallic particles of at least one metal that is more electronegative than nickel and/or cobalt thereby enabling a cementation process to occur between the nickel and/or cobalt in the solution and the metallic particles to produce a nickel and/or cobalt cementate; and (ii) separating the nickel and/or cobalt cementate from the metallic particles thereby producing a slurry including nickel and/or cobalt cementate.