Patents by Inventor David Aherne

David Aherne has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240087828
    Abstract: Microelectromechanical systems (MEMS) switches are disclosed. Parallel configurations of back-to-back MEMS switches are disclosed in some embodiments. An isolation connection of constant electrical potential may be made to a midpoint of the back-to-back switches. In some embodiments, a separate MEMS switch is provided as a shunt switch for the main MEMS switch. MEMS switch device configurations having multiple switchable signal paths each coupling a common input electrode to a respective output electrode are also disclosed. The MEMS switch device includes shunt switches each coupling a respective output electrode to a reference potential. The presence of a shunt switch coupled to an output electrode enhances the isolation of the signal path corresponding to that output electrode when the path is open.
    Type: Application
    Filed: November 17, 2023
    Publication date: March 14, 2024
    Applicant: Analog Devices International Unlimited Company
    Inventors: Padraig Fitzgerald, Philip James Brennan, Jiawen Bai, Michael James Twohig, Bernard Patrick Stenson, Raymond C. Goggin, Mark Schirmer, Paul Lambkin, Donal P. McAuliffe, David Aherne, Cillian Burke, James Lee Lampen, Sumit Majumder
  • Publication number: 20240036114
    Abstract: A signal driver system can include one or more force amplifiers configured to provide drive signals to an output node, such as a device under test (DUT) node. The system can include a first switch circuit coupled between a first force amplifier and the output node, and the first switch circuit can include multiple parallel instances of switch circuits with respective different resistance characteristics. The system can include a second switch circuit coupled between a second force amplifier and the output node. The system can include a control circuit configured to control the switch circuit instances of the first switch circuit to mitigate glitch at the output node, for example, when switching between the first and second drive signals.
    Type: Application
    Filed: December 2, 2021
    Publication date: February 1, 2024
    Inventors: David Aherne, Barry P Kinsella
  • Publication number: 20230375600
    Abstract: The disclosed technology generally relates to electrical overstress protection devices, and more particularly to electrical overstress monitoring devices for detecting electrical overstress events in semiconductor devices. In one aspect, an electrical overstress monitor and/or protection device includes a two different conductive structures configured to electrically arc in response to an EOS event and a sensing circuit configured to detect a change in a physical property of the two conductive structures caused by the EOS event.
    Type: Application
    Filed: May 15, 2023
    Publication date: November 23, 2023
    Inventors: David J. Clarke, Stephen Denis Heffernan, Nijun Wei, Alan J. O'Donnell, Patrick Martin McGuinness, Shaun Bradley, Edward John Coyne, David Aherne, David M. Boland
  • Publication number: 20230366924
    Abstract: The disclosed technology generally relates to integrated circuit devices with wear out monitoring capability. An integrated circuit device includes a wear-out monitor device configured to record an indication of wear-out of a core circuit separated from the wear-out monitor device, wherein the indication is associated with localized diffusion of a diffusant within the wear-out monitor device in response to a wear-out stress that causes the wear-out of the core circuit.
    Type: Application
    Filed: May 16, 2023
    Publication date: November 16, 2023
    Inventors: Edward John Coyne, Alan J. O'Donnell, Shaun Bradley, David Aherne, David Boland, Thomas G. O'Dwyer, Colm Patrick Heffernan, Kevin B. Manning, Mark Forde, David J. Clarke, Michael A. Looby
  • Publication number: 20230221360
    Abstract: Aspects of this disclosure relate to detecting and recording information associated with electrical overstress (EOS) events, such as electrostatic discharge (ESD) events. For example, in one embodiment, an apparatus includes an electrical overstress protection device, a detection circuit configured to detect an occurrence of the EOS event, and a memory configured to store information indicative of the EOS event.
    Type: Application
    Filed: March 22, 2023
    Publication date: July 13, 2023
    Inventors: Alan J. O'Donnell, David Aherne, Javier Alejandro Salcedo, David J. Clarke, John A. Cleary, Patrick Martin McGuinness, Albert C. O'Grady
  • Patent number: 11686763
    Abstract: The disclosed technology generally relates to integrated circuit devices with wear out monitoring capability. An integrated circuit device includes a wear-out monitor device configured to record an indication of wear-out of a core circuit separated from the wear-out monitor device, wherein the indication is associated with localized diffusion of a diffusant within the wear-out monitor device in response to a wear-out stress that causes the wear-out of the core circuit.
    Type: Grant
    Filed: February 28, 2022
    Date of Patent: June 27, 2023
    Assignee: Analog Devices International Unlimited Company
    Inventors: Edward John Coyne, Alan J. O'Donnell, Shaun Bradley, David Aherne, David Boland, Thomas G. O'Dwyer, Colm Patrick Heffernan, Kevin B. Manning, Mark Forde, David J. Clarke, Michael A. Looby
  • Patent number: 11668734
    Abstract: The disclosed technology generally relates to electrical overstress protection devices, and more particularly to electrical overstress monitoring devices for detecting electrical overstress events in semiconductor devices. In one aspect, an electrical overstress monitor and/or protection device includes a two different conductive structures configured to electrically arc in response to an EOS event and a sensing circuit configured to detect a change in a physical property of the two conductive structures caused by the EOS event. The two conductive structures have facing surfaces that have different shapes.
    Type: Grant
    Filed: September 3, 2021
    Date of Patent: June 6, 2023
    Assignee: Analog Devices International Unlimited Company
    Inventors: David J. Clarke, Stephen Denis Heffernan, Nijun Wei, Alan J. O'Donnell, Patrick Martin McGuinness, Shaun Bradley, Edward John Coyne, David Aherne, David M. Boland
  • Patent number: 11644497
    Abstract: Aspects of this disclosure relate to detecting and recording information associated with electrical overstress (EOS) events, such as electrostatic discharge (ESD) events. For example, in one embodiment, an apparatus includes an electrical overstress protection device, a detection circuit configured to detect an occurrence of the EOS event, and a memory configured to store information indicative of the EOS event.
    Type: Grant
    Filed: November 23, 2021
    Date of Patent: May 9, 2023
    Assignee: Analog Devices International Unlimited Company
    Inventors: Alan J. O'Donnell, David Aherne, Javier Alejandro Salcedo, David J. Clarke, John A. Cleary, Patrick Martin McGuinness, Albert C. O'Grady
  • Publication number: 20220252664
    Abstract: The disclosed technology generally relates to integrated circuit devices with wear out monitoring capability. An integrated circuit device includes a wear-out monitor device configured to record an indication of wear-out of a core circuit separated from the wear-out monitor device, wherein the indication is associated with localized diffusion of a diffusant within the wear-out monitor device in response to a wear-out stress that causes the wear-out of the core circuit.
    Type: Application
    Filed: February 28, 2022
    Publication date: August 11, 2022
    Inventors: Edward John Coyne, Alan J. O'Donnell, Shaun Bradley, David Aherne, David Boland, Thomas G. O'Dwyer, Colm Patrick Heffernan, Kevin B. Manning, Mark Forde, David J. Clarke, Michael A. Looby
  • Patent number: 11362504
    Abstract: Circuits and methods for protecting against over-current conditions of switches are described. Over-current conditions can damage switches and the circuits they connect. Some embodiments of the present application provide a sense switch in parallel with the load switch. The sense switch is smaller than the load switch, and is used to sense an over-current condition of the load switch. The sense switch can remain on even when the load switch is turned off in response to detection of an over-current condition.
    Type: Grant
    Filed: July 20, 2020
    Date of Patent: June 14, 2022
    Assignee: Analog Devices International Unlimited Company
    Inventors: Jofrey Generalao Santillan, David Aherne
  • Publication number: 20220082605
    Abstract: Aspects of this disclosure relate to detecting and recording information associated with electrical overstress (EOS) events, such as electrostatic discharge (ESD) events. For example, in one embodiment, an apparatus includes an electrical overstress protection device, a detection circuit configured to detect an occurrence of the EOS event, and a memory configured to store information indicative of the EOS event.
    Type: Application
    Filed: November 23, 2021
    Publication date: March 17, 2022
    Inventors: Alan J. O'Donnell, David Aherne, Javier Alejandro Salcedo, David J. Clarke, John A. Cleary, Patrick Martin McGuinness, Albert C. O'Grady
  • Patent number: 11269006
    Abstract: The disclosed technology generally relates to integrated circuit devices with wear out monitoring capability. An integrated circuit device includes a wear-out monitor device configured to record an indication of wear-out of a core circuit separated from the wear-out monitor device, wherein the indication is associated with localized diffusion of a diffusant within the wear-out monitor device in response to a wear-out stress that causes the wear-out of the core circuit.
    Type: Grant
    Filed: October 2, 2020
    Date of Patent: March 8, 2022
    Assignee: Analog Devices International Unlimited Company
    Inventors: Edward John Coyne, Alan J. O'Donnell, Shaun Bradley, David Aherne, David Boland, Thomas G. O'Dwyer, Colm Patrick Heffernan, Kevin B. Manning, Mark Forde, David J. Clarke, Michael A. Looby
  • Publication number: 20220021196
    Abstract: Circuits and methods for protecting against over-current conditions of switches are described. Over-current conditions can damage switches and the circuits they connect. Some embodiments of the present application provide a sense switch in parallel with the load switch. The sense switch is smaller than the load switch, and is used to sense an over-current condition of the load switch. The sense switch can remain on even when the load switch is turned off in response to detection of an over-current condition.
    Type: Application
    Filed: July 20, 2020
    Publication date: January 20, 2022
    Applicant: Analog Devices International Unlimited Company
    Inventors: Jofrey Generalao Santillan, David Aherne
  • Patent number: 11222834
    Abstract: A package with a laminate substrate is disclosed. The laminate substrate includes a first layer with a first terminal and a second terminal. The laminate substrate also includes a second layer with a conductive element. The laminate substrate further includes a first via and a second via that electrically connect the first terminal to the conductive element and the second terminal to the conductive element, respectively. The package can include a die mounted on and electrically connected to the laminate substrate.
    Type: Grant
    Filed: January 22, 2020
    Date of Patent: January 11, 2022
    Assignee: Analog Devices International Unlimited Company
    Inventors: Jonathan Kraft, David Aherne
  • Publication number: 20210396788
    Abstract: The disclosed technology generally relates to electrical overstress protection devices, and more particularly to electrical overstress monitoring devices for detecting electrical overstress events in semiconductor devices. In one aspect, an electrical overstress monitor and/or protection device includes a two different conductive structures configured to electrically arc in response to an EOS event and a sensing circuit configured to detect a change in a physical property of the two conductive structures caused by the EOS event.
    Type: Application
    Filed: September 3, 2021
    Publication date: December 23, 2021
    Inventors: David J. Clarke, Stephen Denis Heffernan, Nijun Wei, Alan J. O'Donnell, Patrick Martin McGuinness, Shaun Bradley, Edward John Coyne, David Aherne, David M. Boland
  • Patent number: 11193967
    Abstract: Aspects of this disclosure relate to detecting and recording information associated with electrical overstress (EOS) events, such as electrostatic discharge (ESD) events. For example, in one embodiment, an apparatus includes an electrical overstress protection device, a detection circuit configured to detect an occurrence of the EOS event, and a memory configured to store information indicative of the EOS event.
    Type: Grant
    Filed: January 15, 2020
    Date of Patent: December 7, 2021
    Assignee: Analog Devices Global
    Inventors: Alan J. O'Donnell, David Aherne, Javier Alejandro Salcedo, David J. Clarke, John A. Cleary, Patrick Martin McGuinness, Albert C. O'Grady
  • Patent number: 11121547
    Abstract: The present disclosure provides a method and device for overvoltage protection. Specifically, the present disclosure provides an overvoltage protection device which provides a feedback loop for electronic components such as amplifiers and digital to analog converters which require feedback. The overvoltage protection device also includes overvoltage switches in both the signal and feedback channels, which may be opened by a fault detector in the event of an overvoltage. The device also includes an overvoltage feedback channel coupled between the signal and feedback channels, and which also includes a switch which may be closed in the event of an overvoltage event. As such, the overvoltage device provides a closed loop feedback channel during an overvoltage event.
    Type: Grant
    Filed: April 2, 2019
    Date of Patent: September 14, 2021
    Assignee: Analog Devices International Unlimited Company
    Inventors: Alan Kelly, David Aherne, Aidan J. Cahalane
  • Patent number: 11112436
    Abstract: The disclosed technology generally relates to electrical overstress protection devices, and more particularly to electrical overstress monitoring devices for detecting electrical overstress events in semiconductor devices. In one aspect, an electrical overstress monitor and/or protection device includes a two different conductive structures configured to electrically arc in response to an EOS event and a sensing circuit configured to detect a change in a physical property of the two conductive structures caused by the EOS event. The two conductive structures have facing surfaces that have different shapes.
    Type: Grant
    Filed: March 21, 2019
    Date of Patent: September 7, 2021
    Assignee: Analog Devices International Unlimited Company
    Inventors: David J. Clarke, Stephen Denis Heffernan, Nijun Wei, Alan J. O'Donnell, Patrick Martin McGuinness, Shaun Bradley, Edward John Coyne, David Aherne, David M. Boland
  • Publication number: 20210088580
    Abstract: The disclosed technology generally relates to integrated circuit devices with wear out monitoring capability. An integrated circuit device includes a wear-out monitor device configured to record an indication of wear-out of a core circuit separated from the wear-out monitor device, wherein the indication is associated with localized diffusion of a diffusant within the wear-out monitor device in response to a wear-out stress that causes the wear-out of the core circuit.
    Type: Application
    Filed: October 2, 2020
    Publication date: March 25, 2021
    Inventors: Edward John Coyne, Alan J. O'Donnell, Shaun Bradley, David Aherne, David Boland, Thomas G. O'Dwyer, Colm Patrick Heffernan, Kevin B. Manning, Mark Forde, David J. Clarke, Michael A. Looby
  • Patent number: 10917102
    Abstract: There is provided an analog signal gauge that monitors an analog signal at a node and a non-volatile memory element to store an event that occurs at the node when a certain criteria, such as exceeding a maximum safe threshold, is satisfied. This way, the analog signal gauge can help to provide an accurate picture of the operating characteristics in the analog circuit which it is monitoring, including indications of faults that occur in the analog system.
    Type: Grant
    Filed: March 18, 2019
    Date of Patent: February 9, 2021
    Assignee: Analog Devices International Unlimited Company
    Inventors: Shaun Bradley, David Aherne