Abstract: Apparatuses including spark gap structures for electrical overstress (EOS) monitoring or protection, and associated methods, are disclosed. In an aspect, an energy management system includes an electric charging system that transmits electric energy to an electric energy storage system to charge a secondary battery, where one or both of the energy management system and the electric charging system include one or more EOS protection or monitoring devices for monitoring and/or protecting the respective system(s) from an EOS signal during energy transfer from the electric charging system to the electric energy storage system. The EOS protection or monitor device includes a spark gap formed by a pair of arcing electrodes fabricated on a substrate and configured to generate an arc discharge in response to the EOS signal.

Abstract: Apparatuses including spark gap structures for electrical overstress (EOS) monitoring or protection, and associated methods, are disclosed. In an aspect, a vertical spark gap device and a MEMS switch are formed on the substrate having a horizontal main surface. The MEMS switch includes a switch beam anchored at one end over the horizontal main surface and the vertical spark gap device includes one or more pairs of arcing electrodes fabricated on the substrate, where the arcing electrodes of each pair are vertically separated by an arcing gap and generate an arc discharge in response to an EOS signal received by the MEMS switch received between a first voltage node and a second voltage node. The MEMS switch and the vertical spark gap device have one or more corresponding structures that are co-fabricated such that the corresponding structures include the same material or have at least one common feature dimension.

Abstract: Microelectromechanical systems (MEMS) switches are disclosed. Parallel configurations of back-to-back MEMS switches are disclosed in some embodiments. An isolation connection of constant electrical potential may be made to a midpoint of the back-to-back switches. In some embodiments, a separate MEMS switch is provided as a shunt switch for the main MEMS switch. MEMS switch device configurations having multiple switchable signal paths each coupling a common input electrode to a respective output electrode are also disclosed. The MEMS switch device includes shunt switches each coupling a respective output electrode to a reference potential. The presence of a shunt switch coupled to an output electrode enhances the isolation of the signal path corresponding to that output electrode when the path is open.

Abstract: Apparatuses including spark gap structures for electrical overstress (EOS) monitoring or protection, and associated methods, are disclosed. In an aspect, a spark gap device includes first and second conductive layers formed over a substrate, where the first and second conductive layers are electrically connected to first and second voltage nodes, respectively. The first conductive layer includes a plurality of arcing tips configured to form arcing electrode pairs with the second conductive layer to form an arc discharge in response to an EOS voltage between the first and second voltage nodes. The spark gap device further includes a series ballast resistor electrically connected between the arcing tips and the first voltage node, where the ballast resistor in formed in a metallization layer over the substrate and a resistance of the series ballast resistor is substantially higher than a resistance of the second conductive layer.

Abstract: The disclosed technology relates generally to switching devices and more particularly to switching devices employing micro-electromechanical system (MEMS) switches. The switching devices can serve as circuit breakers for protecting electrical systems against certain electrical events. The switching devices can be configured to monitor and control one or both the MEMS switches and the electrical systems being protected. The disclosed technology additionally relates to systems including the switching devices and methods of using the switching devices.

Abstract: The disclosed technology relates generally to switching devices and more particularly to switching devices employing micro-electromechanical system (MEMS) switches. The switching devices can serve as circuit breakers for protecting electrical systems against certain electrical events. The switching devices can be configured to monitor and control one or both the MEMS switches and the electrical systems being protected. The disclosed technology additionally relates to systems including the switching devices and methods of using the switching devices.

Abstract: The disclosed technology relates generally to switching devices and more particularly to switching devices employing micro-electromechanical system (MEMS) switches. The switching devices can serve as circuit breakers for protecting electrical systems against certain electrical events. The switching devices can be configured to monitor and control one or both the MEMS switches and the electrical systems being protected. The disclosed technology additionally relates to systems including the switching devices and methods of using the switching devices.

Abstract: The disclosed technology relates generally to switching devices and more particularly to switching devices employing micro-electromechanical system (MEMS) switches. The switching devices can serve as circuit breakers for protecting electrical systems against certain electrical events. The switching devices can be configured to monitor and control one or both the MEMS switches and the electrical systems being protected. The disclosed technology additionally relates to systems including the switching devices and methods of using the switching devices.

Abstract: The disclosed technology relates generally to switching devices and more particularly to switching devices employing micro-electromechanical system (MEMS) switches. The switching devices can serve as circuit breakers for protecting electrical systems against certain electrical events. The switching devices can be configured to monitor and control one or both the MEMS switches and the electrical systems being protected. The disclosed technology additionally relates to systems including the switching devices and methods of using the switching devices.

Abstract: The disclosed technology relates generally to switching devices and more particularly to switching devices employing micro-electromechanical system (MEMS) switches. The switching devices can serve as circuit breakers for protecting electrical systems against certain electrical events. The switching devices can be configured to monitor and control one or both the MEMS switches and the electrical systems being protected. The disclosed technology additionally relates to systems including the switching devices and methods of using the switching devices.

Abstract: A method and circuit arrangement for voltage protection is disclosed. In certain embodiments, a controllable switch comprises a control terminal, a first channel terminal, and a second channel terminal, and arranged to be switched between an off-state and an on-state. In the on-state the controllable switch allows a current to flow between the first channel terminal and the second channel terminal. An overvoltage protection circuit is configured to determine a voltage difference between a first voltage of the first channel terminal and a second voltage of the second channel terminal. The overvoltage protection circuit also sets a control signal to a protection value to operate the controllable switch in the off-state in response to determining that the voltage difference is greater than or equal to a switch threshold.

Abstract: A method and circuit arrangement for a solid state switch device is disclosed. In certain embodiment, a solid state switch device comprising a controllable switch comprising a control terminal, a first channel terminal, and a second channel terminal, and arranged to be switched between an off-state and an on-state, wherein in the on-state the switch allows a current to flow between the first channel terminal and the second channel terminal. The solid state switch device further comprising: a first compensation circuit configured to: generate a first boost current based on a voltage difference between the first channel terminal and the second channel terminal; and apply the first boost current to the control terminal to charge a switch capacitance of the controllable switch.

Abstract: Microelectromechanical systems (MEMS) switches are disclosed. Parallel configurations of back-to-back MEMS switches are disclosed in some embodiments. An isolation connection of constant electrical potential may be made to a midpoint of the back-to-back switches. In some embodiments, a separate MEMS switch is provided as a shunt switch for the main MEMS switch. MEMS switch device configurations having multiple switchable signal paths each coupling a common input electrode to a respective output electrode are also disclosed. The MEMS switch device includes shunt switches each coupling a respective output electrode to a reference potential. The presence of a shunt switch coupled to an output electrode enhances the isolation of the signal path corresponding to that output electrode when the path is open.

Abstract: A signal driver system can include one or more force amplifiers configured to provide drive signals to an output node, such as a device under test (DUT) node. The system can include a first switch circuit coupled between a first force amplifier and the output node, and the first switch circuit can include multiple parallel instances of switch circuits with respective different resistance characteristics. The system can include a second switch circuit coupled between a second force amplifier and the output node. The system can include a control circuit configured to control the switch circuit instances of the first switch circuit to mitigate glitch at the output node, for example, when switching between the first and second drive signals.

Abstract: Impedance paths for integrated circuits having microelectromechanical systems (MEMS) switches that allow for electrical charge to bleed from circuit nodes to fixed electric potentials (e.g., ground) are described. Such paths are referred to herein as charge bleed circuits. The circuit nodes may be circuit locations where electrical charge may accumulate because there is no other path for the electrical charge to dissipate. In some embodiments, a charge bleed circuit includes a switchable device (e.g., a MEMS switch, a solid-state device switch, or a circuit including various solid-state device switches that, collectively, implement a device that can be switched on and off) that connects and disconnects the impedance path from a circuit node. This may allow the device to perform different types of measurements at desired performance levels.

Abstract: The disclosed technology generally relates to electrical overstress protection devices, and more particularly to electrical overstress monitoring devices for detecting electrical overstress events in semiconductor devices. In one aspect, an electrical overstress monitor and/or protection device includes a two different conductive structures configured to electrically arc in response to an EOS event and a sensing circuit configured to detect a change in a physical property of the two conductive structures caused by the EOS event.

Abstract: The disclosed technology generally relates to electrical overstress protection devices, and more particularly to electrical overstress monitoring devices for detecting electrical overstress events in semiconductor devices. In one aspect, an electrical overstress monitor and/or protection device includes a two different conductive structures configured to electrically arc in response to an EOS event and a sensing circuit configured to detect a change in a physical property of the two conductive structures caused by the EOS event. The two conductive structures have facing surfaces that have different shapes.

Abstract: A solid state switch, comprising a first metal-oxide-semiconductor field-effect transistor (MOSFET). The first MOSFET has a first terminal, a second terminal, a bulk terminal and a gate terminal, and is configured to be switched between an on-state and an off-state. The solid state switch also comprises a second MOSFET in series with the first MOSFET. The second MOSFET has a first terminal, a second terminal, a bulk terminal, and a gate terminal. The second terminal of the first MOSFET is connected to the second terminal of the second MOSFET. The solid state switch comprises a first buffer comprises an output terminal coupled to the bulk terminal of the first MOSFET, and an input terminal coupled to the first terminal of the first MOSFET.

Abstract: A solid state switch, comprising a first field-effect transistor (FET). The first FET has a first terminal, a second terminal, a bulk terminal and a gate terminal, and is configured to be switched between an on-state and an off-state. The solid state switch also comprises a second FET in series with the first FET. The second FET has a first terminal, a second terminal, a bulk terminal, and a gate terminal. The second terminal of the first FET is connected to the second terminal of the second FET. The solid state switch comprises a first buffer comprises an output terminal coupled to the bulk terminal of the first FET, and an input terminal coupled to the first terminal of the first FET.

Abstract: A solid state switch, comprising a first field-effect transistor (FET). The first FET has a first terminal, a second terminal, a bulk terminal and a gate terminal, and is configured to be switched between an on-state and an off-state. The solid state switch also comprises a second FET in series with the first FET. The second FET has a first terminal, a second terminal, a bulk terminal, and a gate terminal. The second terminal of the first FET is connected to the second terminal of the second FET. The solid state switch comprises a first buffer comprises an output terminal coupled to the bulk terminal of the first FET, and an input terminal coupled to the first terminal of the first FET.