Patents by Inventor David Aherns

David Aherns has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220252664
    Abstract: The disclosed technology generally relates to integrated circuit devices with wear out monitoring capability. An integrated circuit device includes a wear-out monitor device configured to record an indication of wear-out of a core circuit separated from the wear-out monitor device, wherein the indication is associated with localized diffusion of a diffusant within the wear-out monitor device in response to a wear-out stress that causes the wear-out of the core circuit.
    Type: Application
    Filed: February 28, 2022
    Publication date: August 11, 2022
    Inventors: Edward John Coyne, Alan J. O'Donnell, Shaun Bradley, David Aherne, David Boland, Thomas G. O'Dwyer, Colm Patrick Heffernan, Kevin B. Manning, Mark Forde, David J. Clarke, Michael A. Looby
  • Patent number: 11362504
    Abstract: Circuits and methods for protecting against over-current conditions of switches are described. Over-current conditions can damage switches and the circuits they connect. Some embodiments of the present application provide a sense switch in parallel with the load switch. The sense switch is smaller than the load switch, and is used to sense an over-current condition of the load switch. The sense switch can remain on even when the load switch is turned off in response to detection of an over-current condition.
    Type: Grant
    Filed: July 20, 2020
    Date of Patent: June 14, 2022
    Assignee: Analog Devices International Unlimited Company
    Inventors: Jofrey Generalao Santillan, David Aherne
  • Publication number: 20220082605
    Abstract: Aspects of this disclosure relate to detecting and recording information associated with electrical overstress (EOS) events, such as electrostatic discharge (ESD) events. For example, in one embodiment, an apparatus includes an electrical overstress protection device, a detection circuit configured to detect an occurrence of the EOS event, and a memory configured to store information indicative of the EOS event.
    Type: Application
    Filed: November 23, 2021
    Publication date: March 17, 2022
    Inventors: Alan J. O'Donnell, David Aherne, Javier Alejandro Salcedo, David J. Clarke, John A. Cleary, Patrick Martin McGuinness, Albert C. O'Grady
  • Patent number: 11269006
    Abstract: The disclosed technology generally relates to integrated circuit devices with wear out monitoring capability. An integrated circuit device includes a wear-out monitor device configured to record an indication of wear-out of a core circuit separated from the wear-out monitor device, wherein the indication is associated with localized diffusion of a diffusant within the wear-out monitor device in response to a wear-out stress that causes the wear-out of the core circuit.
    Type: Grant
    Filed: October 2, 2020
    Date of Patent: March 8, 2022
    Assignee: Analog Devices International Unlimited Company
    Inventors: Edward John Coyne, Alan J. O'Donnell, Shaun Bradley, David Aherne, David Boland, Thomas G. O'Dwyer, Colm Patrick Heffernan, Kevin B. Manning, Mark Forde, David J. Clarke, Michael A. Looby
  • Publication number: 20220021196
    Abstract: Circuits and methods for protecting against over-current conditions of switches are described. Over-current conditions can damage switches and the circuits they connect. Some embodiments of the present application provide a sense switch in parallel with the load switch. The sense switch is smaller than the load switch, and is used to sense an over-current condition of the load switch. The sense switch can remain on even when the load switch is turned off in response to detection of an over-current condition.
    Type: Application
    Filed: July 20, 2020
    Publication date: January 20, 2022
    Applicant: Analog Devices International Unlimited Company
    Inventors: Jofrey Generalao Santillan, David Aherne
  • Patent number: 11222834
    Abstract: A package with a laminate substrate is disclosed. The laminate substrate includes a first layer with a first terminal and a second terminal. The laminate substrate also includes a second layer with a conductive element. The laminate substrate further includes a first via and a second via that electrically connect the first terminal to the conductive element and the second terminal to the conductive element, respectively. The package can include a die mounted on and electrically connected to the laminate substrate.
    Type: Grant
    Filed: January 22, 2020
    Date of Patent: January 11, 2022
    Assignee: Analog Devices International Unlimited Company
    Inventors: Jonathan Kraft, David Aherne
  • Publication number: 20210396788
    Abstract: The disclosed technology generally relates to electrical overstress protection devices, and more particularly to electrical overstress monitoring devices for detecting electrical overstress events in semiconductor devices. In one aspect, an electrical overstress monitor and/or protection device includes a two different conductive structures configured to electrically arc in response to an EOS event and a sensing circuit configured to detect a change in a physical property of the two conductive structures caused by the EOS event.
    Type: Application
    Filed: September 3, 2021
    Publication date: December 23, 2021
    Inventors: David J. Clarke, Stephen Denis Heffernan, Nijun Wei, Alan J. O'Donnell, Patrick Martin McGuinness, Shaun Bradley, Edward John Coyne, David Aherne, David M. Boland
  • Patent number: 11193967
    Abstract: Aspects of this disclosure relate to detecting and recording information associated with electrical overstress (EOS) events, such as electrostatic discharge (ESD) events. For example, in one embodiment, an apparatus includes an electrical overstress protection device, a detection circuit configured to detect an occurrence of the EOS event, and a memory configured to store information indicative of the EOS event.
    Type: Grant
    Filed: January 15, 2020
    Date of Patent: December 7, 2021
    Assignee: Analog Devices Global
    Inventors: Alan J. O'Donnell, David Aherne, Javier Alejandro Salcedo, David J. Clarke, John A. Cleary, Patrick Martin McGuinness, Albert C. O'Grady
  • Patent number: 11121547
    Abstract: The present disclosure provides a method and device for overvoltage protection. Specifically, the present disclosure provides an overvoltage protection device which provides a feedback loop for electronic components such as amplifiers and digital to analog converters which require feedback. The overvoltage protection device also includes overvoltage switches in both the signal and feedback channels, which may be opened by a fault detector in the event of an overvoltage. The device also includes an overvoltage feedback channel coupled between the signal and feedback channels, and which also includes a switch which may be closed in the event of an overvoltage event. As such, the overvoltage device provides a closed loop feedback channel during an overvoltage event.
    Type: Grant
    Filed: April 2, 2019
    Date of Patent: September 14, 2021
    Assignee: Analog Devices International Unlimited Company
    Inventors: Alan Kelly, David Aherne, Aidan J. Cahalane
  • Patent number: 11112436
    Abstract: The disclosed technology generally relates to electrical overstress protection devices, and more particularly to electrical overstress monitoring devices for detecting electrical overstress events in semiconductor devices. In one aspect, an electrical overstress monitor and/or protection device includes a two different conductive structures configured to electrically arc in response to an EOS event and a sensing circuit configured to detect a change in a physical property of the two conductive structures caused by the EOS event. The two conductive structures have facing surfaces that have different shapes.
    Type: Grant
    Filed: March 21, 2019
    Date of Patent: September 7, 2021
    Assignee: Analog Devices International Unlimited Company
    Inventors: David J. Clarke, Stephen Denis Heffernan, Nijun Wei, Alan J. O'Donnell, Patrick Martin McGuinness, Shaun Bradley, Edward John Coyne, David Aherne, David M. Boland
  • Patent number: 11020549
    Abstract: A dry powder inhalation device is disclosed. In one optional aspect, the device includes a housing, a base plate, a receptacle for a medicament and a mouthpiece. The base plate is engageable with the housing to form a main space with a main air inlet. The mouthpiece includes an inner conduit connected to its outlet and is engageable with the base plate to fluidly connect the inner conduit to the receptacle. The receptacle is fluidly connected to the main space, so that upon inhalation by a user, air can be drawn through the main air inlet into the main space and onward through the receptacle into the inner conduit. The mouthpiece and the base plate form an auxiliary space with an auxiliary air inlet, wherein the auxiliary space is fluidly connected to the main space.
    Type: Grant
    Filed: August 14, 2017
    Date of Patent: June 1, 2021
    Assignee: Alfred E. Tiefenbacher (GmbH & Co. KG)
    Inventors: David Ahern, Arron Danson, James Tibatts, Ewen Christie, Tim Evans
  • Publication number: 20210088580
    Abstract: The disclosed technology generally relates to integrated circuit devices with wear out monitoring capability. An integrated circuit device includes a wear-out monitor device configured to record an indication of wear-out of a core circuit separated from the wear-out monitor device, wherein the indication is associated with localized diffusion of a diffusant within the wear-out monitor device in response to a wear-out stress that causes the wear-out of the core circuit.
    Type: Application
    Filed: October 2, 2020
    Publication date: March 25, 2021
    Inventors: Edward John Coyne, Alan J. O'Donnell, Shaun Bradley, David Aherne, David Boland, Thomas G. O'Dwyer, Colm Patrick Heffernan, Kevin B. Manning, Mark Forde, David J. Clarke, Michael A. Looby
  • Patent number: 10917102
    Abstract: There is provided an analog signal gauge that monitors an analog signal at a node and a non-volatile memory element to store an event that occurs at the node when a certain criteria, such as exceeding a maximum safe threshold, is satisfied. This way, the analog signal gauge can help to provide an accurate picture of the operating characteristics in the analog circuit which it is monitoring, including indications of faults that occur in the analog system.
    Type: Grant
    Filed: March 18, 2019
    Date of Patent: February 9, 2021
    Assignee: Analog Devices International Unlimited Company
    Inventors: Shaun Bradley, David Aherne
  • Publication number: 20200321777
    Abstract: The present disclosure provides a method and device for overvoltage protection. Specifically, the present disclosure provides an overvoltage protection device which provides a feedback loop for electronic components such as amplifiers and digital to analog converters which require feedback. The overvoltage protection device also includes overvoltage switches in both the signal and feedback channels, which may be opened by a fault detector in the event of an overvoltage. The device also includes an overvoltage feedback channel coupled between the signal and feedback channels, and which also includes a switch which may be closed in the event of an overvoltage event. As such, the overvoltage device provides a closed loop feedback channel during an overvoltage event.
    Type: Application
    Filed: April 2, 2019
    Publication date: October 8, 2020
    Inventors: Alan Kelly, David Aherne, Aidan J. Cahalane
  • Patent number: 10794950
    Abstract: The disclosed technology generally relates to integrated circuit devices with wear out monitoring capability. An integrated circuit device includes a wear-out monitor device configured to record an indication of wear-out of a core circuit separated from the wear-out monitor device, wherein the indication is associated with localized diffusion of a diffusant within the wear-out monitor device in response to a wear-out stress that causes the wear-out of the core circuit.
    Type: Grant
    Filed: July 16, 2019
    Date of Patent: October 6, 2020
    Assignee: Analog Devices Global
    Inventors: Edward John Coyne, Alan J. O'Donnell, Shaun Bradley, David Aherne, David Boland, Thomas G. O'Dwyer, Colm Patrick Heffernan, Kevin B. Manning, Mark Forde, David J. Clarke, Michael A. Looby
  • Publication number: 20200304134
    Abstract: There is provided an analog signal gauge that monitors an analog signal at a node and a non-volatile memory element to store an event that occurs at the node when a certain criteria, such as exceeding a maximum safe threshold, is satisfied. This way, the analog signal gauge can help to provide an accurate picture of the operating characteristics in the analog circuit which it is monitoring, including indications of faults that occur in the analog system.
    Type: Application
    Filed: March 18, 2019
    Publication date: September 24, 2020
    Inventors: Shaun Bradley, David Aherne
  • Publication number: 20200303292
    Abstract: A package with a laminate substrate is disclosed. The laminate substrate includes a first layer with a first terminal and a second terminal. The laminate substrate also includes a second layer with a conductive element. The laminate substrate further includes a first via and a second via that electrically connect the first terminal to the conductive element and the second terminal to the conductive element, respectively. The package can include a die mounted on and electrically connected to the laminate substrate.
    Type: Application
    Filed: January 22, 2020
    Publication date: September 24, 2020
    Inventors: Jonathan Kraft, David Aherne
  • Patent number: 10725959
    Abstract: SPI Round Robin Mode for Single-Cycle MUX Channel Sequencing. SPI round robin mode is an SPI mode applicable for MUX devices control. It allows the MUX output to connect to the next input channel sequentially in just one clock cycle. Configurations can be made such as: clock edge to use (rising/falling), ascending/descending channel sequence, and enabling/disabling the channels to go through. The device supersedes an ADC with built in sequencing and is applicable to multiplexing, switching, instrumentation, process control and isolation application—while retaining SPI device control and operation.
    Type: Grant
    Filed: March 11, 2019
    Date of Patent: July 28, 2020
    Assignee: Analog Devices Global Unlimited Company, Inc.
    Inventors: David Aherne, Jofrey Santillan, Wes Vernon Lofamia, Paul O'Sullivan, Padraig McDaid
  • Publication number: 20200158771
    Abstract: Aspects of this disclosure relate to detecting and recording information associated with electrical overstress (EOS) events, such as electrostatic discharge (ESD) events. For example, in one embodiment, an apparatus includes an electrical overstress protection device, a detection circuit configured to detect an occurrence of the EOS event, and a memory configured to store information indicative of the EOS event.
    Type: Application
    Filed: January 15, 2020
    Publication date: May 21, 2020
    Inventors: Alan J. O'Donnell, David Aherne, Javier Alejandro Salcedo, David J. Clarke, John A. Cleary, Patrick Martin McGuinness, Albert C. O'Grady
  • Patent number: 10642769
    Abstract: SPI frame for simultaneously entering 8 bit daisy-chain mode from 16 bit register addressable mode. Some products that implement SPI may be connected in a daisy chain configuration, the first slave output being connected to the second slave input, etc. The SPI port of each slave is designed to send out during the second group of clock pulses an exact copy of the data it received during the first group of clock pulses. The whole chain acts as a communication shift register; daisy chaining is often done with shift registers to provide a bank of inputs or outputs through SPI. Large latency occurs during the entry into daisy-chain mode which increases as a function of the number of linked SPI devices. A means for simultaneously instructing all connected devices to enter/enable daisy-chain mode is disclosed.
    Type: Grant
    Filed: March 24, 2017
    Date of Patent: May 5, 2020
    Assignee: ANALOG DEVICES GLOBAL UNLIMITED COMPANY
    Inventors: Wes Vernon Lofamia, Jofrey Santillan, David Aherne