Abstract: A caching system including a first sub-cache, a second sub-cache, coupled in parallel with the first sub-cache, for storing write-memory commands that are not cached in the first sub-cache, the second sub-cache including privilege bits configured to store an indication that a corresponding cache line of the second sub-cache is associated with a level of privilege, and wherein the second sub-cache is further configured to receive a first write memory command for a memory address associated with a first level of privilege, store, in the second sub-cache, first data associated with the first write memory command and the level of privilege associated with the cache line, receive a second write memory command for the cache line, the second write memory command associated with a second level of privilege, merge the first level of privilege with the second level of privilege, and output the merged privilege level with the cache line.

Abstract: Devices, systems, and methods directed to evaluating a vessel of a patient are provided. The method includes outputting, to a display, a screen display including: a visual representation of a pressure ratio of pressure measurements obtained by first and second instruments positioned within a vessel while the second instrument is moved longitudinally through the vessel and the first instrument remains stationary within the vessel; and a visual representation of the vessel; receiving a user input to modify one of the visual representations of the pressure ratio and the vessel to simulate a therapeutic procedure; and updating the screen display, in response to the user input, including: modifying the selected one of the visual representation of the pressure ratio and the vessel based on the received user input; and correspondingly modifying the unselected one of the visual representation of the pressure ratio and the vessel.

Abstract: A load control system may be provided including control devices and a system controller. The system controller may be configured to broadcast a service set identifier (SSID) and provide a wireless network connection to a network device. The system controller may provide a web page to the network device, wherein the web page may include an indication of target system controllers. The target system controllers may be used for configuring (e.g., associating) the control devices. The system controller may receive an indication of a target system controller selected to associate the control devices. The system controller may determine an address and port number of the target system controller identified by the network device. The system controller may provide, to the network device, the web page from the target system controller while the network device is connected to the system controller via the wireless network connection.

Abstract: A caching system including a first sub-cache and a second sub-cache in parallel with the first sub-cache, wherein the second sub-cache includes: line type bits configured to store an indication that a corresponding cache line of the second sub-cache is configured to store write-miss data, and an eviction controller configured to evict a cache line of the second sub-cache storing write-miss data based on an indication that the cache line has been fully written.

Abstract: The present embodiments provide systems and methods for aggregating measurements captured by different technologies during a golf swing. By capturing measurements using different technologies, more accurate measurements may be provided to a user by selecting from the measurements, offsetting measurements based on the technologies used, and aligning measurements between devices. Further, by aggregating measurements received from different devices, additional features and functionality may be provided to the user that is absent from any one device used alone. Additionally, by storing the aggregated measurements, users, club fitters and instructors may access and leverage larger databases of measurements to better understand the user's golf swing and to provide better recommendations and instruction to the user.

Abstract: In some examples, a device includes at least three electrodes a first pair of electrodes and a second pair of electrodes. The device also includes circuitry configured to generate a first cardiac signal based on a first differential signal received across the first pair, generate a first brain signal based on the first differential signal received across the first pair, generate a second cardiac signal based on a second differential signal received across the second pair, and generate a second brain signal based on the second differential signal received across the second pair. The circuitry is also configured to output a composite cardiac signal based on the first cardiac signal and the second cardiac signal and to output a composite brain signal based on the first brain signal and the second brain signal.

Abstract: An integrated circuit, comprising an instruction pipeline that includes instruction fetch phase circuitry, instruction decode phase circuitry, and instruction execution circuitry. The instruction execution circuitry includes transformation circuitry for receiving an interleaved dual vector operand as an input and for outputting a first natural order vector including a first set of data values from the interleaved dual vector operand and a second natural order vector including a second set of data values from the interleaved dual vector operand.

Abstract: An example method includes generating a first interleave instruction based on compilation of a source file configured for execution by the first processor; generating a predication instruction to mask lane(s) of a first source register and a second source register of the second processor, in which the first source register stores a first vector and the second source register stores a second vector, based on translation of the source file; and generating a second interleave instruction based on compilation of the translated source file. The method further includes, based on the predication instruction and the second interleave instruction, reading respective portions of the first and second vectors from unmasked lanes of the first and second source registers, and interleaving the read portions to produce a third vector, which is then stored in a destination register of the second processor.

Abstract: An implantable medical device has a therapy module configured to generate a composite pacing pulse including a series of at least two individual pulses. The therapy module is configured to generate the composite pacing pulse by generating a first pulse of the at least two individual pulses by selectively coupling a first portion of a plurality of capacitors to an output signal line and generate a second pulse of the at least two individual pulses by selectively coupling a second portion of the plurality of capacitors to the output signal line.

Abstract: An apparatus and method for producing a vehicle interior component may include creating a plurality of molten polymeric filaments, and applying a fluid stream to the molten filaments to impart the desired shape while in a bath to cool them to form a consolidated filament structure. An assembly, system, and method are provided for shaping a plurality of strands of a molten thermoplastic resin as a contoured unitary mesh product via at least one shaping conveyor. Another assembly, system, and method are provided for shaping a plurality of strands of a molten thermoplastic resin as a contoured unitary mesh product via an actuator assembly having one or more actuators.

Abstract: Methods, apparatus, systems and articles of manufacture to facilitate atomic compare and swap in cache for a coherent level 1 data cache system are disclosed. An example system includes a cache storage; a cache controller coupled to the cache storage wherein the cache controller is operable to: receive a memory operation that specifies a key, a memory address, and a first set of data; retrieve a second set of data corresponding to the memory address; compare the second set of data to the key; based on the second set of data corresponding to the key, cause the first set of data to be stored at the memory address; and based on the second set of data not corresponding to the key, complete the memory operation without causing the first set of data to be stored at the memory address.

Abstract: Methods, apparatus, systems and articles of manufacture are disclosed for allocation in a victim cache system. An example apparatus includes a first cache storage, a second cache storage, a cache controller coupled to the first cache storage and the second cache storage and operable to receive a memory operation that specifies an address, determine, based on the address, that the memory operation evicts a first set of data from the first cache storage, determine that the first set of data is unmodified relative to an extended memory, and cause the first set of data to be stored in the second cache storage.

Abstract: In a very long instruction word (VLIW) central processing unit instructions are grouped into execute packets that execute in parallel. A constant may be specified or extended by bits in a constant extension instruction in the same execute packet. If an instruction includes an indication of constant extension, the decoder employs bits of a constant extension instruction to extend the constant of an immediate field. Two or more constant extension slots are permitted in each execute packet, each extending constants for a different predetermined subset of functional unit instructions. In an alternative embodiment, more than one functional unit may have constants extended from the same constant extension instruction employing the same extended bits. A long extended constant may be formed using the extension bits of two constant extension instructions.

Abstract: A caching system including a first sub-cache, and a second sub-cache, coupled in parallel with the first cache, for storing cache data evicted from the first sub-cache and write-memory commands that are not cached in the first sub-cache, and wherein the second sub-cache includes: color tag bits configured to store an indication that a corresponding cache line of the second sub-cache storing write miss data is associated with a color tag, and an eviction controller configured to evict cache lines of the second sub-cache storing write-miss data based on the color tag associated with the cache line.

Abstract: Methods, apparatus, systems and articles of manufacture are disclosed for multi-banked victim cache with dual datapath. An example cache system includes a storage element that includes banks operable to store data, ports operable to receive memory operations in parallel, wherein each of the memory operations has a respective address, and a plurality of comparators coupled such that each of the comparators is coupled to a respective port of the ports and a respective bank of the banks and is operable to determine whether a respective address of a respective memory operation received by the respective port corresponds to the data stored in the respective bank.

Abstract: Techniques including receiving configuration information for a trigger control channel of the one or more trigger control channels, the configuration information defining a first one or more triggering events, receiving a first memory management command, store the first memory management command, detecting a first one or more triggering events, and triggering the stored first memory management command based on the detected first one or more triggering events.

Abstract: Methods, apparatus, systems and articles of manufacture are disclosed to facilitate fully pipelined read-modify-write support in level 1 data cache using store queue and data forwarding. An example apparatus includes a first storage, a second storage, a store queue coupled to the first storage and the second storage, the store queue operable to receive a first memory operation specifying a first set of data, process the first memory operation for storing the first set of data in at least one of the first storage and the second storage, receive a second memory operation, and prior to storing the first set of data in the at least one of the first storage and the second storage, feedback the first set of data for use in the second memory operation.

Abstract: Methods, apparatus, systems and articles of manufacture to reduce bank pressure using aggressive write merging are disclosed. An example apparatus includes a first cache storage; a second cache storage; a store queue coupled to at least one of the first cache storage and the second cache storage and operable to: receive a first memory operation; process the first memory operation for storing the first set of data in at least one of the first cache storage and the second cache storage; receive a second memory operation; and prior to storing the first set of data in the at least one of the first cache storage and the second cache storage, merge the first memory operation and the second memory operation.

Abstract: A system for measurement is provided. The system comprises a core optical module and a scanning interface module. The core optical module is configured to generate a light for generating signals for analyzing an object through the scanning interface module and detect a light including the signals from the object through the scanning interface module. The scanning interface module is changeable for each application and configured to connect with the core optical module by a light transferring unit to scan the object with the transferred light from the core optical module and to receive the light from the object to transfer to the core optical module.

Abstract: A protection circuit may be electrically connected to a transformer neutral of a power grid transformer. The protection circuit may include a direct current (DC) blocking component electrically connected between the transformer neutral and a ground connection, as well as a direct current switch assembly positioned in parallel with the direct current blocking component between the transformer neutral and the ground connection. The direct current switch assembly includes at least one direct current switch having a switching element that is electrically controllable between a closed position and an open position. In some examples, a conductive housing encloses one or more switching elements. The conductive housing is electrically isolated from the ground connection. In further examples, one or more direct current switches may be electrically connected in series to provide greater voltage withstand and safety due to operational redundancy.