Patents by Inventor David Bour

David Bour has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8927999
    Abstract: An edge terminated semiconductor device is described including a GaN substrate; a doped GaN epitaxial layer grown on the GaN substrate including an ion-implanted insulation region, wherein the ion-implanted region has a resistivity that is at least 90% of maximum resistivity and a conductive layer, such as a Schottky metal layer, disposed over the GaN epitaxial layer, wherein the conductive layer overlaps a portion of the ion-implanted region. A Schottky diode is prepared using the Schottky contact structure.
    Type: Grant
    Filed: November 21, 2011
    Date of Patent: January 6, 2015
    Assignee: Avogy, Inc.
    Inventors: Isik C. Kizilyalli, Hui Nie, Andrew P. Edwards, Linda Romano, David Bour, Richard J. Brown, Thomas R. Prunty
  • Patent number: 8910644
    Abstract: Embodiments of the invention generally relate to apparatus and methods for cleaning chamber components using a cleaning plate. The cleaning plate is adapted to be positioned on a substrate support during a cleaning process, and includes a plurality of turbulence-inducing structures. The turbulence-inducing structures induce a turbulent flow of cleaning gas while the cleaning plate is rotated during a cleaning process. The cleaning plate increases the retention time of the cleaning gas near the showerhead during cleaning. Additionally, the cleaning plate reduces concentration gradients within the cleaning plate to provide a more effective clean. The method includes positioning a cleaning plate adjacent to a showerhead, and introducing cleaning gas to the space between the showerhead and the cleaning plate. A material deposited on the surface of the showerhead is then heated and vaporized in the presence of the cleaning gas, and then exhausted from the processing chamber.
    Type: Grant
    Filed: March 4, 2011
    Date of Patent: December 16, 2014
    Assignee: Applied Materials, Inc.
    Inventors: Hua Chung, Xizi Dong, Kyawwin Jason Maung, Hiroji Hanawa, Sang Won Kang, David H. Quach, Donald J. K. Olgado, David Bour, Wei-Yung Hsu, Alexander Tam, Anzhong Chang, Sumedh Acharya
  • Patent number: 8558242
    Abstract: A semiconductor structure includes a III-nitride substrate having a top surface and an opposing bottom surface and a first III-nitride layer of a first conductivity type coupled to the top surface of the III-nitride substrate. The semiconductor structure also includes a second III-nitride layer of a second conductivity type coupled to the first III-nitride layer along a vertical direction and a third III-nitride layer of a third conductivity type coupled to the second III-nitride layer along the vertical direction. The semiconductor structure further includes a first trench extending through a portion of the third III-nitride layer to the first III-nitride layer, a second trench extending through another portion of the third III-nitride layer to the second III-nitride layer, and a first metal layer coupled to the second and the third III-nitride layers.
    Type: Grant
    Filed: December 9, 2011
    Date of Patent: October 15, 2013
    Assignee: Avogy, Inc.
    Inventors: Richard J. Brown, Hui Nie, Andrew Edwards, Isik Kizilyalli, David Bour, Thomas Prunty, Linda Romano, Madhan Raj
  • Publication number: 20130146885
    Abstract: A semiconductor structure includes a III-nitride substrate having a top surface and an opposing bottom surface and a first III-nitride layer of a first conductivity type coupled to the top surface of the III-nitride substrate. The semiconductor structure also includes a second III-nitride layer of a second conductivity type coupled to the first III-nitride layer along a vertical direction and a third III-nitride layer of a third conductivity type coupled to the second III-nitride layer along the vertical direction. The semiconductor structure further includes a first trench extending through a portion of the third III-nitride layer to the first III-nitride layer, a second trench extending through another portion of the third III-nitride layer to the second III-nitride layer, and a first metal layer coupled to the second and the third III-nitride layers.
    Type: Application
    Filed: December 9, 2011
    Publication date: June 13, 2013
    Applicant: EPOWERSOFT, INC.
    Inventors: Richard J. Brown, Hui Nei, Andrew Edwards, Isik Kizilyalli, David Bour, Thomas Prunty, Linda Romano, Madhan Raj
  • Publication number: 20130126888
    Abstract: An edge terminated semiconductor device is described including a GaN substrate; a doped GaN epitaxial layer grown on the GaN substrate including an ion-implanted insulation region, wherein the ion-implanted region has a resistivity that is at least 90% of maximum resistivity and a conductive layer, such as a Schottky metal layer, disposed over the GaN epitaxial layer, wherein the conductive layer overlaps a portion of the ion-implanted region. A Schottky diode is prepared using the Schottky contact structure.
    Type: Application
    Filed: November 21, 2011
    Publication date: May 23, 2013
    Inventors: Isik C. Kizilyalli, Hui Nie, Andrew P. Edwards, Linda Romano, David Bour, Richard J. Brown, Thomas R. Prunty
  • Publication number: 20120315741
    Abstract: Enhanced magnesium incorporation into gallium nitride films through high pressure or ALD-type processing is described. In an example, a method of fabricating a group III-nitride film includes flowing a group III precursor, a nitrogen precursor, and a p-type dopant precursor into a reaction chamber having a substrate therein. A p-type doped group III-nitride layer is formed in the reaction chamber, above the substrate, while a total pressure in the reaction chamber is approximately in the range of 300-760 Torr.
    Type: Application
    Filed: May 31, 2012
    Publication date: December 13, 2012
    Inventors: Jie Su, Jiang Lu, Hua Chung, Wei-Yung Hsu, David Bour
  • Publication number: 20120258581
    Abstract: The metal-organic chemical vapor deposition (MOCVD) fabrication of group III-nitride materials using in-situ generated hydrazine or fragments there from is described. For example, a method of fabricating a group III-nitride material includes forming hydrazine in an in-situ process. The hydrazine, or fragments there from, is reacted with a group III precursor in a metal-organic chemical vapor deposition (MOCVD) chamber. From the reacting, a group III-nitride layer is formed above a substrate.
    Type: Application
    Filed: March 6, 2012
    Publication date: October 11, 2012
    Applicant: APPLIED MATERIALS, INC.
    Inventors: Karl Brown, Kevin Griffin, David Bour, Olga Kryliouk
  • Publication number: 20120258580
    Abstract: The plasma-assisted metal-organic chemical vapor deposition (MOCVD) fabrication of a p-type group III-nitride material is described. For example, a method of fabricating a p-type group III-nitride material includes generating a nitrogen-based plasma. A nitrogen-containing species from the nitrogen-based plasma is reacted with a group III precursor and a p-type dopant precursor in a metal-organic chemical vapor deposition (MOCVD) chamber. A group III-nitride layer including p-type dopants is then formed above a substrate.
    Type: Application
    Filed: March 6, 2012
    Publication date: October 11, 2012
    Applicant: APPLIED MATERIALS, INC.
    Inventors: Karl Brown, Kevin Griffin, David Bour, Olga Kryliouk
  • Publication number: 20120235115
    Abstract: Methods, semiconductor material stacks and equipment for manufacture of light emitting diodes (LEDs) with improve crystal quality. A growth stopper is deposited between nuclei for a group III-V material, such as GaN, to form a nano mask. The group III-V material is laterally overgrown from a region of the nuclei not covered by the nano mask to form a continuous material layer with reduced dislocation density in preparation for subsequent growth of n-type and p-type layers of the LED. The lateral overgrowth from the nuclei may further recover the surface morphology of the buffer layer despite the presence of the nano mask. Presence of the growth stopper may further result in void formation on a substrate side of an LED stack to improve light extraction efficiency.
    Type: Application
    Filed: January 20, 2012
    Publication date: September 20, 2012
    Applicant: APPLIED MATERIALS, INC.
    Inventors: Sang Won Kang, Jie Su, Tuoh-Bin NG, David Bour, Wei-Yung Hsu
  • Publication number: 20120227667
    Abstract: Substrate carrier having multiple emissivity coefficients for thin film processing and more particularly for support of a substrate during a deposition process epitaxially growing a film on the substrate. A front side of the carrier has a first carrier surface upon which the substrate is to be disposed, the first carrier surface having a first emissivity coefficient different than a second emissivity coefficient of a second carrier surface adjacent to the first carrier surface. Selection of the second emissivity coefficient independent of the first emissivity coefficient may modify an amount of energy radiated from the second carrier surface during processing of the substrate. In one embodiment, the second carrier surface has a second emissivity coefficient which is lower than the first emissivity coefficient to reduce heat loss from the carrier surface while maintaining high efficiency energy transfer between the carrier and a substrate.
    Type: Application
    Filed: March 6, 2012
    Publication date: September 13, 2012
    Applicant: APPLIED MATERIALS, INC.
    Inventors: Juno Yu-Ting HUANG, Suresh M. SHRAUTI, Alain DUBOUST, David BOUR, Wei-Yung HSU, Liang-Yun CHEN
  • Publication number: 20120083060
    Abstract: The integration of cluster metal-organic chemical vapor deposition (MOCVD) and hydride vapor phase epitaxy (HVPE) reactors with other process chambers is described. For example, a method of fabricating a light-emitting diode (LED) structure described herein includes forming, in a first chamber of a cluster tool, a P-type group III-V material layer above a substrate. Without removing the substrate from the cluster tool a metal contact layer is formed directly on the P-type group III-V material layer in a second chamber of the cluster tool.
    Type: Application
    Filed: September 27, 2011
    Publication date: April 5, 2012
    Inventors: Jie Cui, David Bour, Liang-Yuh Chen
  • Publication number: 20120052216
    Abstract: Embodiments of the present invention provide methods and apparatus for surface coatings applied to process chamber components utilized in chemical vapor deposition processes. In one embodiment, the apparatus provides a showerhead apparatus comprising a body, a plurality of conduits extending through the body, each of the plurality of conduits having an opening extending to a processing surface of the body, and a coating disposed on the processing surface, the coating being about 50 microns to about 200 microns thick and comprising a coefficient of emissivity of about 0.8, an average surface roughness of about 180 micro-inches to about 220 micro-inches, and a porosity of about 15% or less.
    Type: Application
    Filed: June 6, 2011
    Publication date: March 1, 2012
    Applicant: APPLIED MATERIALS, INC.
    Inventors: Hiroji Hanawa, Kyawwin Jason Maung, Hua Chung, Jie Cui, David Bour, Wei-Yung Hsu, Liang-Yuh Chen
  • Publication number: 20120015502
    Abstract: Methods and systems for the fabrication of p-GaN, and related, films utilizing a dedicated chamber in a multi-chamber tool are described. Also described are methods of fabricating a magnesium doped group III-V material layer, such as a GaN layer, with a sharp magnesium decay profile.
    Type: Application
    Filed: June 30, 2011
    Publication date: January 19, 2012
    Inventors: Jie Cui, David Bour, Wei-Yung Hsu
  • Publication number: 20110308551
    Abstract: Embodiments of the invention generally relate to apparatus and methods for cleaning chamber components using a cleaning plate. The cleaning plate is adapted to be positioned on a substrate support during a cleaning process, and includes a plurality of turbulence-inducing structures. The turbulence-inducing structures induce a turbulent flow of cleaning gas while the cleaning plate is rotated during a cleaning process. The cleaning plate increases the retention time of the cleaning gas near the showerhead during cleaning. Additionally, the cleaning plate reduces concentration gradients within the cleaning plate to provide a more effective clean. The method includes positioning a cleaning plate adjacent to a showerhead, and introducing cleaning gas to the space between the showerhead and the cleaning plate. A material deposited on the surface of the showerhead is then heated and vaporized in the presence of the cleaning gas, and then exhausted from the processing chamber.
    Type: Application
    Filed: March 4, 2011
    Publication date: December 22, 2011
    Applicant: APPLIED MATERIALS, INC.
    Inventors: Hua Chung, Xizi Dong, Kyawwin Jason Maung, Hiroji Hanawa, Sang Won Kang, David H. Quach, Donald J.K. Olgado, David Bour, Wei-Yung Hsu, Alexander Tam, Anzhong Chang, Sumedh Acharya
  • Publication number: 20110308453
    Abstract: A method and apparatus are provided for monitoring and controlling substrate processing parameters for a cluster tool that utilizes chemical vapor deposition and/or hydride vapor phase epitaxial (HVPE) deposition. In one embodiment, a metal organic chemical vapor deposition (MOCVD) process is used to deposit a Group III-nitride film on a plurality of substrates within a processing chamber. A closed-loop control system performs in-situ monitoring of the Group III-nitride film growth rate and adjusts film growth parameters as required to maintain a target growth rate. In another embodiment, a closed-loop control system performs in-situ monitoring of film growth parameters for multiple processing chambers for one or more film deposition systems.
    Type: Application
    Filed: January 23, 2009
    Publication date: December 22, 2011
    Applicant: Applied Materials, Inc.
    Inventors: Jie Su, Lori D. Washington, David Bour, Jacob Grayson, Sandeep Nijhawan, Ronald Stevens
  • Publication number: 20110204376
    Abstract: Apparatus and method for growth of non-p-type GaN layers over p-type GaN layers. Embodiments include multi-junction LED film stacks, multi-junction LED devices paired into units and multi-junction LED arrays of the paired units. Epitaxial growths of p-type and non-p-type material layers are split between epitaxial chambers clustered onto a single platform to reduce p-type dopant cross-contamination. Arrayed multi-junction LED devices provide improved packing density and reduced blinking during AC operation.
    Type: Application
    Filed: August 30, 2010
    Publication date: August 25, 2011
    Applicant: APPLIED MATERIALS, INC.
    Inventors: Jie Su, David Bour
  • Publication number: 20110070721
    Abstract: Apparatus and methods are described for fabricating a compound nitride semiconductor structure. Group-III and nitrogen precursors are flowed into a first processing chamber to deposit a first layer over a substrate with a thermal chemical-vapor-deposition process. The substrate is transferred from the first processing chamber to a second processing chamber. Group-III and nitrogen precursors are flowed into the second processing chamber to deposit a second layer over the first layer with a thermal chemical-vapor-deposition process. The first and second group-III precursors have different group-III elements.
    Type: Application
    Filed: November 24, 2010
    Publication date: March 24, 2011
    Applicant: Applied Materials, Inc.
    Inventors: Sandeep NIJHAWAN, David Bour, Lori Washington, Jacob Smith, Ronald Stevens, David Eaglesham
  • Patent number: 7674352
    Abstract: A gaseous mixture is deposited onto a substrate surface using a showerhead. A first plenum of the showerhead has a plurality of channels fluidicly coupled with an interior of a processing chamber. A second plenum gas flows through a plurality of tubes extending from a second plenum of the showerhead through the channels into the interior of the processing chamber. The diameter of the tubes is smaller than the diameter of the channels such that a first plenum gas flows into the interior of the processing chamber through a space defined between the outer surface of the tubes and the surface of the channels. The length and diameter of the tubes determine the level of distribution and the molar ratio of the first gas and the second gas in the gaseous mixture that is deposited on the surface of the substrate.
    Type: Grant
    Filed: November 28, 2006
    Date of Patent: March 9, 2010
    Assignee: Applied Materials, Inc.
    Inventors: David Bour, Lori Washington, Sandeep Nijhawan, Ronald Stevens, Jacob Smith, Alexander Tam, Nyi Oo Myo, Steve Park, Rosemary Twist, Garry Kwong, Jie Su
  • Patent number: 7585769
    Abstract: A method of suppressing parasitic particle formation in a metal organic chemical vapor deposition process is described. The method may include providing a substrate to a reaction chamber, and introducing an organometallic precursor, a particle suppression compound and at least a second precursor to the reaction chamber. The second precursor reacts with the organometallic precursor to form a nucleation layer on the substrate. Also, a method of suppressing parasitic particle formation during formation of a III-V nitride layer is described. The method includes introducing a group III metal containing precursor to a reaction chamber. The group III metal precursor may include a halogen. A hydrogen halide gas and a nitrogen containing gas are also introduced to the reaction chamber. The nitrogen containing gas reacts with the group III metal precursor to form the III-V nitride layer on the substrate.
    Type: Grant
    Filed: May 5, 2006
    Date of Patent: September 8, 2009
    Assignee: Applied Materials, Inc.
    Inventors: David Bour, Jacob W. Smith, Sandeep Nijhawan, Lori D. Washington, David Eaglesham
  • Patent number: D664170
    Type: Grant
    Filed: March 4, 2011
    Date of Patent: July 24, 2012
    Assignee: Applied Materials, Inc.
    Inventors: Hua Chung, Xizi Dong, Kyawwin Jason Maung, Hiroji Hanawa, Sang Won Kang, David H. Quach, Donald J. K. Olgado, David Bour, Wei-Yung Hsu, Alexander Tam, Anzhong Chang, Sumedh Acharya