Patents by Inventor David Callahan

David Callahan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100131720
    Abstract: A method to exchange data in a shared memory system includes the use of a buffer in communication with a producer processor and a consumer processor. The cache data is temporarily stored in the buffer. The method includes for the consumer and the producer to indicate intent to acquire ownership of the buffer. In response to the indication of intent, the producer, consumer, buffer are prepared for the access. If the consumer intends to acquire the buffer, the producer places the cache data into the buffer. If the producer intends to acquire the buffer, the consumer removes the cache data from the buffer. The access to the buffer, however, is delayed until the producer, consumer, and the buffer are prepared.
    Type: Application
    Filed: November 26, 2008
    Publication date: May 27, 2010
    Applicant: MICROSOFT CORPORATION
    Inventors: David T. Harper, III, Charles David Callahan, II
  • Publication number: 20090320027
    Abstract: Methods and systems for statistically eliding fences in a work stealing algorithm are disclosed. A data structure comprising a head pointer, tail pointer, barrier pointer and an advertising flag allows for dynamic load-balancing across processing resources in computer applications.
    Type: Application
    Filed: June 18, 2008
    Publication date: December 24, 2009
    Applicant: MICROSOFT CORPORATION
    Inventors: Paul F. Ringseth, Bill Messmer, Charles David Callahan, II, Stephen Toub
  • Publication number: 20090300650
    Abstract: A compositional model referred to as a source-target pattern for connecting processes into process networks in a general, flexible, and extensible manner is provided. The model allows common process algebra constructs to be combined with data flow networks to form process networks. Process algebraic operations may be expressed in terms of the compositional model to form data flow networks that provide fully interoperable process algebraic operations between processes.
    Type: Application
    Filed: June 2, 2008
    Publication date: December 3, 2009
    Applicant: MICROSOFT CORPORATION
    Inventors: Niklas Gustafsson, David Callahan
  • Patent number: 7584332
    Abstract: Embodiments of the present invention provide a class of computer architectures generally referred to as lightweight multi-threaded architectures (LIMA). Other embodiments may be described and claimed.
    Type: Grant
    Filed: February 15, 2007
    Date of Patent: September 1, 2009
    Assignees: University of Notre Dame du Lac, Cray, Inc.
    Inventors: Peter M. Kogge, Jay B. Brockman, David Tennyson Harper, III, Burton Smith, Charles David Callahan, II
  • Patent number: 7558889
    Abstract: Various techniques for manipulating data using access states of memory, access control fields of pointers and operations, and exception raising and exception trapping in a multithreaded computer system. In particular, the techniques include synchronization support for a thread blocked in a word, demand evalution of values, parallel access of multiple threads to a list, synchronized and unsynchronized access to a data buffer, use of fowarding to avoid checking for an end of a buffer, use of sentinel work to detect access past a data structure, concurrent access to a word of memory using different synchronization access modes, and use of trapping to detect access to restricted memory.
    Type: Grant
    Filed: October 30, 2003
    Date of Patent: July 7, 2009
    Assignee: Cray Inc.
    Inventors: Gail A. Alverson, Charles David Callahan, II, Simon H. Kahan, Brian D. Koblenz, Allan Porterfield, Burton J. Smith
  • Patent number: 7558910
    Abstract: Various techniques for manipulating data using access states of memory, access control fields of pointers and operations, and exception raising and exception trapping in a multithreaded computer system. In particular, the techniques include synchronization support for a thread blocked in a word, demand evaluation of values, parallel access of multiple threads to a list, synchronized and unsynchronized access to a data buffer, use of forwarding to avoid checking for an end of a buffer, use of sentinel word to detect access past a data structure, concurrent access to a word of memory using different synchronization access modes, and use of trapping to detect access to restricted memory.
    Type: Grant
    Filed: October 30, 2003
    Date of Patent: July 7, 2009
    Assignee: Cray Inc.
    Inventors: Gail A. Alverson, Charles David Callahan, II, Simon H. Kahan, Brian D. Koblenz, Allan Porterfield, Burton J. Smith
  • Patent number: 7536690
    Abstract: A method and system that prepares a task for being swapped out from processor utilization that is executing on a computer with multiple processors that each support multiple streams. The task has one or more teams of threads, where each team represents threads executing on a single processor. The task designates, for each stream that is executing a thread, one stream as a team master stream and one stream as a task master stream. For each team master stream, the task notifies the operating system that the team is ready to be swapped out when each other thread of the team has saved its state and has quit its stream. Finally, for the task master stream, the task notifies the operating system that the task is ready to be swapped when it has saved its state and each other team has notified that it is ready to be swapped out.
    Type: Grant
    Filed: September 16, 2003
    Date of Patent: May 19, 2009
    Assignee: Cray Inc.
    Inventors: Gail A. Alverson, Charles David Callahan, II, Susan L. Coatney, Brian D. Koblenz, Richard D. Korry, Burton J. Smith
  • Publication number: 20090117146
    Abstract: A system is provided for promoting hair growth comprising one or more extracts from a steroidal alkaloid-containing plant selected from a Veratrum plant, a Buxus plant, a Holarrhena plant, a Solarium plant and a Rauwolfia plant. The system can further comprise an extract from a Pilocarpus plant and a seaweed extract. The system can also be used in reducing hair loss, enhancing or restoring hair colour, increasing the thickness of hair, improving the genera appearance of hair, and/or reducing or eliminating dandruff. Methods of promoting the growth of hair are also provided.
    Type: Application
    Filed: May 16, 2006
    Publication date: May 7, 2009
    Applicant: Island Laboratories, Inc.
    Inventors: Mohammed Alal Khan, David Callahan
  • Publication number: 20090007116
    Abstract: Various technologies and techniques are disclosed for handling data parallel operations. Data parallel operations are composed together to create a more complex data parallel operation. A fusion plan process is performed on a particular complex operation dynamically at runtime. As part of the fusion plan process, an analysis is performed of a structure of the complex operation and input data. One particular algorithm that best preserves parallelism is chosen from multiple algorithms. The structure of the complex operation is revised based on the particular algorithm chosen. A nested complex operation can also be fused, by inlining its contents into an outer complex operation so that parallelism is preserved across nested operation boundaries.
    Type: Application
    Filed: June 27, 2007
    Publication date: January 1, 2009
    Applicant: Microsoft Corporation
    Inventors: John Joseph Duffy, David Callahan
  • Publication number: 20090007137
    Abstract: Various technologies and techniques are disclosed for preserving input element ordering in data parallel operations. This ordering may be based on element ordinal position in the input or a programmer-specified key-selection routine that generates sortable keys for each input element. Complex data parallel operations are re-written to contain individual data parallel operations that introduce partitioning and merging. Each partition is then processed independently in parallel. The system ensures that downstream operations remember ordering information established by certain other operations, using techniques that vary depending upon which categories the consumer operations are in. Data is merged back into one output stream using a final merge process that is aware of the ordering established among data elements.
    Type: Application
    Filed: June 27, 2007
    Publication date: January 1, 2009
    Applicant: Microsoft Corporation
    Inventors: John Joseph Duffy, David Callahan, Edward George Essey
  • Publication number: 20080320291
    Abstract: Various technologies and techniques are disclosed for providing concurrent exception handling. When one or more exceptions are received from concurrent workers, one or more exception handler functions are supplied. For each respective exception in the exception results, determine if the respective exception is one of a kind of exceptions handled by the one or more exception handler functions. If the respective exception is one of a kind handled by the exception handler functions, then run a particular handler of the exception handler functions and mark the respective exception as handled. Any unhandled exceptions are then processed appropriately. In one implementation, a collection of input data is processed to produce a collection of output results, with the exceptions being interleaved with other output results. In another implementation, a particular exception is selected that represents the multiple exceptions. The selected one particular exception is then thrown.
    Type: Application
    Filed: June 25, 2007
    Publication date: December 25, 2008
    Applicant: Microsoft Corporation
    Inventors: John Joseph Duffy, David Callahan, David Detlefs, Vance Morrison, Brian Grunkemeyer, Eric Dean Tribble
  • Publication number: 20080320275
    Abstract: Various technologies and techniques are disclosed for providing concurrent exception handling. Exceptions that occur in concurrent workers are caught. The caught exceptions are then forwarded from the concurrent workers to a coordination worker. The caught exceptions are finally aggregated into an aggregation structure, such as an aggregate exception object. This aggregation structure is rethrown and the individual caught exceptions may then be handled at a proper time.
    Type: Application
    Filed: June 25, 2007
    Publication date: December 25, 2008
    Applicant: Microsoft Corporation
    Inventors: John Joseph Duffy, David Callahan, David Detlefs, Vance Morrison, Brian Grunkemeyer, Eric Dean Tribble
  • Publication number: 20080301664
    Abstract: Various technologies and techniques are disclosed for creating and/or locating transactional code blocks in a transactional memory system. A user such as a software developer can decorate a particular function with an identifier to indicate that the particular function is transaction-safe. A normal version and a transactional version are then created for each function of a software application that is marked as transaction-safe. A normal version is created for each function that is not marked as transaction-safe. For the normal version of each function that is marked as transaction-safe, a stub pointer in the normal version is pointed to the transactional version. The proper version of the function is then called depending on the execution context.
    Type: Application
    Filed: June 1, 2007
    Publication date: December 4, 2008
    Applicant: Microsoft Corporation
    Inventors: David Callahan, Vinod K. Grover
  • Patent number: 7426732
    Abstract: A method and system that prepares a task for being swapped out from processor utilization that is executing on a computer with multiple processors that each support multiple streams. The task has one or more teams of threads, where each team represents threads executing on a single processor. The task designates, for each stream that is executing a thread, one stream as a team master stream and one stream as a task master stream. For each team master stream, the task notifies the operating system that the team is ready to be swapped out when each other thread of the team has saved its state and has quit its stream. Finally, for the task master stream, the task notifies the operating system that the task is ready to be swapped when it has saved its state and each other team has notified that it is ready to be swapped out.
    Type: Grant
    Filed: October 10, 2003
    Date of Patent: September 16, 2008
    Assignee: Cray Inc.
    Inventors: Gail A. Alverson, Charles David Callahan, II, Susan L. Coatney, Brian D. Koblenz, Richard D. Korry, Burton J. Smith
  • Patent number: 7392525
    Abstract: A method and system that prepares a task for being swapped out from processor utilization that is executing on a computer with multiple processors that each support multiple streams. The task has one or more teams of threads, where each team represents threads executing on a single processor. The task designates, for each stream that is executing a thread, one stream as a team master stream and one stream as a task master stream. For each team master stream, the task notifies the operating system that the team is ready to be swapped out when each other thread of the team has saved its state and has quit its stream. Finally, for the task master stream, the task notifies the operating system that the task is ready to be swapped when it has saved its state and each other team has notified that it is ready to be swapped out.
    Type: Grant
    Filed: October 1, 2003
    Date of Patent: June 24, 2008
    Assignee: Cray Inc.
    Inventors: Gail A. Alverson, Charles David Callahan, II, Susan L. Coatney, Brian D. Koblenz, Richard D. Korry, Burton J. Smith
  • Patent number: 7360221
    Abstract: A method and system that prepares a task for being swapped out from processor utilization that is executing on a computer with multiple processors that each support multiple streams. The task has one or more teams of threads, where each team represents threads executing on a single processor. The task designates, for each stream that is executing a thread, one stream as a team master stream and one stream as a task master stream. For each team master stream, the task notifies the operating system that the team is ready to be swapped out when each other thread of the team has saved its state and has quit its stream. Finally, for the task master stream, the task notifies the operating system that the task is ready to be swapped when it has saved its state and each other team has notified that it is ready to be swapped out.
    Type: Grant
    Filed: September 10, 2003
    Date of Patent: April 15, 2008
    Assignee: Cray Inc.
    Inventors: Gail A. Alverson, Charles David Callahan, II, Susan L. Coatney, Brian D. Koblenz, Richard D. Korry, Burton J. Smith
  • Publication number: 20080046020
    Abstract: A medical device programmer graphical user interface, wherein the graphical user interface provides a programmer user with a method of automatically adjusting parameters to be programmed to a medical device in direct response to a user modifying related parameters that are to be programmed to the medical device. The programming interface implements the method in response to the programmer user's use of slide controllers on the programmer display screen to adjust parameters. In response to the on screen parameter changes implemented by the user via slide controller movement, the programmer automatically adjusts related parameters on the display screen by moving slide controllers for related parameters. This automatic adjustment by the programmer graphically illustrates to the user the automatic adjustments being made to the related parameters.
    Type: Application
    Filed: September 17, 2007
    Publication date: February 21, 2008
    Applicant: Cardiac Pacemakers, Inc.
    Inventors: Les Peterson, Paula Dieterle, Par Lindh, James Kalgren, James Gilkerson, Dorothy Naumann, Kenneth Persen, Mark Schwartz, Allan Koshiol, Tala Bynum, David Callahan
  • Publication number: 20070198785
    Abstract: Embodiments of the present invention provide a class of computer architectures generally referred to as lightweight multi-threaded architectures (LIMA). Other embodiments may be described and claimed.
    Type: Application
    Filed: February 15, 2007
    Publication date: August 23, 2007
    Inventors: Peter M. Kogge, Jay B. Brockman, David Tennyson Harper, Burton Smith, Charles David Callahan
  • Patent number: 7191444
    Abstract: A method and system that prepares a task for being swapped out from processor utilization that is executing on a computer with multiple processors that each support multiple streams. The task has one or more teams of threads, where each team represents threads executing on a single processor. The task designates, for each stream that is executing a thread, one stream as a team master stream and one stream as a task master stream. For each team master stream, the task notifies the operating system that the team is ready to be swapped out when each other thread of the team has saved its state and has quit its stream. Finally, for the task master stream, the task notifies the operating system that the task is ready to be swapped when it has saved its state and each other team has notified that it is ready to be swapped out.
    Type: Grant
    Filed: September 16, 2003
    Date of Patent: March 13, 2007
    Assignee: Cray Inc.
    Inventors: Gail A. Alverson, Charles David Callahan, II, Susan L. Coatney, Brian D. Koblenz, Richard D. Korry, Burton J. Smith
  • Patent number: 7165150
    Abstract: Various techniques for manipulating data using access states of memory, access control fields of pointers and operations, and exception raising and exception trapping in a multithreaded computer system. In particular, the techniques include synchronization support for a thread blocked in a word, demand evaluation of values, parallel access of multiple threads to a list, synchronized and unsynchronized access to a data buffer, use of forwarding to avoid checking for an end of a buffer, use of sentinel word to detect access past a data structure, concurrent access to a word of memory using different synchronization access modes, and use of trapping to detect access to restricted memory.
    Type: Grant
    Filed: October 30, 2003
    Date of Patent: January 16, 2007
    Assignee: Cray Inc.
    Inventors: Gail A. Alverson, Charles David Callahan, II, Simon H. Kahan, Brian D. Koblenz, Allan Porterfield, Burton J. Smith