Patents by Inventor David Callahan

David Callahan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060239281
    Abstract: Capacity management is described. In an implementation, a method includes executing a module on a computing device to monitor use of a product during a measurement interval to determine a maximum capacity of the product used during the measurement interval and whether a capacity failure point is reached during the measurement interval. A learned capacity limit is set based on the monitoring for determining whether one or more of a plurality of clients, if any, are to receive a list which references at least the monitored product, wherein the learned capacity limit is set such that when the capacity failure point is not reached, the learned capacity limit is set according to the maximum capacity.
    Type: Application
    Filed: March 30, 2006
    Publication date: October 26, 2006
    Applicant: Microsoft Corporation
    Inventors: Gurdev Sethi, Mohanraj Dharmarajan, Kirk Brackebusch, David Callahan, Manish Tangri, Mitchell Lacey, Aravind Seshadri
  • Patent number: 7117330
    Abstract: Various techniques for manipulating data using access states of memory, access control fields of pointers and operations, and exception raising and exception trapping in a multithreaded computer system. In particular, the techniques include synchronization support for a thread blocked in a word, demand evaluation of values, parallel access of multiple threads to a list, synchronized and unsynchronized access to a data buffer, use of forwarding to avoid checking for an end of a buffer, use of sentinel word to detect access past a data structure, concurrent access to a word of memory using different synchronization access modes, and use of trapping to detect access to restricted memory.
    Type: Grant
    Filed: June 12, 2003
    Date of Patent: October 3, 2006
    Assignee: Cray Inc.
    Inventors: Gail A. Alverson, Charles David Callahan, II, Simon H. Kahan, Brian D. Koblenz, Allan Porterfield, Burton J. Smith
  • Publication number: 20060215668
    Abstract: Access point management is described. In an implementation, a method includes selecting one of a plurality of clients, in which each of the clients has a client profile which describes the client's experience with one or more of a plurality of access points. The selecting is performed based on one or more of the client profiles. A determination is made as to whether at least one of the access points utilized by the selected client should be replaced by another one of the access points. The determination includes establishing whether a difference between a connectivity score for the at least one access point and a connectivity score for the other access point exceeds an inertia value.
    Type: Application
    Filed: March 25, 2005
    Publication date: September 28, 2006
    Applicant: Microsoft Corporation
    Inventors: Gurdev Sethi, David Callahan, Mitchell Lacey, Kirk Brackebusch, Aravind Seshadri, Manish Tangri, Mohanraj Dharmarajan
  • Publication number: 20060179108
    Abstract: Relatively quality value is described. In an implementation, a method includes calculating a mean success rate for a plurality of products utilized by a plurality of clients. For each of the products, a degree is determined, to which, either a first set of the clients or a second set of the clients predominate. The first set of clients have a success rate that is greater than or equal to the mean success rate and the second set of clients have a success rate that is less than or equal to the mean success rate. For each of the products, a relative quality value is calculated based on the mean success rate and the determined degree.
    Type: Application
    Filed: February 4, 2005
    Publication date: August 10, 2006
    Applicant: Microsoft Corporation
    Inventors: Manish Tangri, David Callahan
  • Patent number: 7020767
    Abstract: A method and system in a multithreaded processor for processing events without interrupt notifications. In one aspect of the present invention, an operating system creates a thread to execute on a stream of the processor. During execution of the thread, the thread executes a loop that determines whether an event has occurred and, in response to determining whether an event has occurred, assigns a different thread to process the event so that multiple events can be processed in parallel and so that interrupts are not needed to signal that the event has occurred. Another aspect of the present invention provides a method and system for processing asynchronously occurring events without interrupt notifications. To achieve this processing, a first thread is executed to generate a notification that the event has occurred upon receipt of the asynchronously occurring event.
    Type: Grant
    Filed: February 23, 2001
    Date of Patent: March 28, 2006
    Assignee: Cray Inc.
    Inventors: Gail A. Alverson, Charles David Callahan, II, Susan L. Coatney, Laurence S. Kaplan, Richard D. Korry
  • Patent number: 6961925
    Abstract: A system for conducting performance analysis for executing tasks. The analysis involves generating a variety of trace information related to performance measures, including parallelism-related information, during execution of the task. In order to generate the trace information, target source code of interest is compiled in such a manner that executing the resulting executable code will generate execution trace information composed of a series of events. Each event stores trace information related to a variety of performance measures for the one or more processors and protection domains used. After the execution trace information has been generated, the system can use that trace information and a trace information description file to produce useful performance measure information. The trace information description file contains information that describes the types of execution events as well as the structure of the stored information.
    Type: Grant
    Filed: April 3, 2001
    Date of Patent: November 1, 2005
    Assignee: Cray Inc.
    Inventors: Charles David Callahan, II, Keith Arnett Shields, Preston Pengra Briggs, III
  • Patent number: 6952827
    Abstract: A method and system that prepares a task for being swapped out from processor utilization that is executing on a computer with multiple processors that each support multiple streams. The task has one or more teams of threads, where each team represents threads executing on a single processor. The task designates, for each stream, one stream that is executing a thread as a team master stream. The task designates one stream that is executing a thread as a task master stream. For each team master stream, the task notifies the operating system that the team is ready to be swapped out when each other thread of the team has saved its state and has quit its stream. Finally, for the task master stream, the task notifies the operating system that the task is ready to be swapped when it has saved its state and each of the other teams have notified the operating system that that team is ready to be swapped out.
    Type: Grant
    Filed: November 13, 1998
    Date of Patent: October 4, 2005
    Assignee: Cray Inc.
    Inventors: Gail A. Alverson, Charles David Callahan, II, Susan L. Coatney, Brian D. Koblenz, Richard D. Korry, Burton J. Smith
  • Patent number: 6862635
    Abstract: Various techniques for manipulating data using access states of memory, access control fields of pointers and operations, and exception raising and exception trapping in a multithreaded computer system. In particular, the techniques include synchronization support for a thread blocked in a word, demand evaluation of values, parallel access of multiple threads to a list, synchronized and unsynchronized access to a data buffer, use of forwarding to avoid checking for an end of a buffer, use of sentinel word to detect access past a data structure, concurrent access to a word of memory using different synchronization access modes, and use of trapping to detect access to restricted memory.
    Type: Grant
    Filed: July 27, 1999
    Date of Patent: March 1, 2005
    Assignee: Cray Inc.
    Inventors: Gail A. Alverson, Charles David Callahan, II, Simon H. Kahan, Brian D. Koblenz, Allan Porterfield, Burton J. Smith
  • Publication number: 20050010258
    Abstract: A medical device programmer graphical user interface, wherein the graphical user interface provides a programmer user with a method of automatically adjusting parameters to be programmed to a medical device in direct response to a user modifying related parameters that are to be programmed to the medical device. The programming interface implements the method in response to the programmer user's use of slide controllers on the programmer display screen to adjust parameters. In response to the on screen parameter changes implemented by the user via slide controller movement, the programmer automatically adjusts related parameters on the display screen by moving slide controllers for related parameters. This automatic adjustment by the programmer graphically illustrates to the user the automatic adjustments being made to the related parameters.
    Type: Application
    Filed: May 6, 2004
    Publication date: January 13, 2005
    Inventors: Les Peterson, Paula Dieterle, Par Lindh, James Kalgren, James Gilkerson, Dorothy Nauman, Kenneth Persen, Mark Schwartz, Allan Koshiol, Tala Bynum, David Callahan
  • Publication number: 20040098721
    Abstract: Various techniques for manipulating data using access states of memory, access control fields of pointers and operations, and exception raising and exception trapping in a multithreaded computer system. In particular, the techniques include synchronization support for a thread blocked in a word, demand evaluation of values, parallel access of multiple threads to a list, synchronized and unsynchronized access to a data buffer, use of forwarding to avoid checking for an end of a buffer, use of sentinel word to detect access past a data structure, concurrent access to a word of memory using different synchronization access modes, and use of trapping to detect access to restricted memory.
    Type: Application
    Filed: October 30, 2003
    Publication date: May 20, 2004
    Inventors: Gail A. Alverson, Charles David Callahan, Simon H. Kahan, Brian D. Koblenz, Allan Porterfield, Burton J. Smith
  • Publication number: 20040093603
    Abstract: A method and system that prepares a task for being swapped out from processor utilization that is executing on a computer with multiple processors that each support multiple streams. The task has one or more teams of threads, where each team represents threads executing on a single processor. The task designates, for each stream that is executing a thread, one stream as a team master stream and one stream as a task master stream. For each team master stream, the task notifies the operating system that the team is ready to be swapped out when each other thread of the team has saved its state and has quit its stream. Finally, for the task master stream, the task notifies the operating system that the task is ready to be swapped when it has saved its state and each other team has notified that it is ready to be swapped out.
    Type: Application
    Filed: September 16, 2003
    Publication date: May 13, 2004
    Inventors: Gail A. Alverson, Charles David Callahan, Susan L. Coatney, Brian D. Koblenz, Richard D. Korry, Burton J. Smith
  • Publication number: 20040093605
    Abstract: Various techniques for manipulating data using access states of memory, access control fields of pointers and operations, and exception raising and exception trapping in a multithreaded computer system. In particular, the techniques include synchronization support for a thread blocked in a word, demand evalution of values, parallel access of multiple threads to a list synchronized and unsynchronized access to a data buffer, use of fowarding to avoid checking for an end of a buffer, use of sentinel work to detect access past a data structure, concurrent access to a word of memory using different synchronization access modes, and use of trapping to detect access to restricted memory.
    Type: Application
    Filed: October 29, 2003
    Publication date: May 13, 2004
    Inventors: Gail A. Alverson, Charles David Callahan, Simon H. Kahan, Brian D. Koblenz, Allan Porterfield, Burton J. Smith
  • Publication number: 20040088711
    Abstract: A method and system that prepares a task for being swapped out from processor utilization that is executing on a computer with multiple processors that each support multiple streams. The task has one or more teams of threads, where each team represents threads executing on a single processor. The task designates, for each stream that is executing a thread, one stream as a team master stream and one stream as a task master stream. For each team master stream, the task notifies the operating system that the team is ready to be swapped out when each other thread of the team has saved its state and has quit its stream. Finally, for the task master stream, the task notifies the operating system that the task is ready to be swapped when it has saved its state and each other team has notified that it is ready to be swapped out.
    Type: Application
    Filed: September 10, 2003
    Publication date: May 6, 2004
    Inventors: Gail A. Alverson, Charles David Callahan, Susan L. Coatney, Brian D. Koblenz, Richard D. Korry, Burton J. Smith
  • Publication number: 20040078795
    Abstract: A method and system that prepares a task for being swapped out from processor utilization that is executing on a computer with multiple processors that each support multiple streams. The task has one or more teams of threads, where each team represents threads executing on a single processor. The task designates, for each stream that is executing a thread, one stream as a team master stream and one stream as a task master stream. For each team master stream, the task notifies the operating system that the team is ready to be swapped out when each other thread of the team has saved its state and has quit its stream. Finally, for the task master stream, the task notifies the operating system that the task is ready to be swapped when it has saved its state and each other team has notified that it is ready to be swapped out.
    Type: Application
    Filed: October 10, 2003
    Publication date: April 22, 2004
    Inventors: Gail A. Alverson, Charles David Callahan, Susan L. Coatney, Brian D. Koblenz, Richard D. Korry, Burton J. Smith
  • Publication number: 20040064816
    Abstract: A method and system that prepares a task for being swapped out from processor utilization that is executing on a computer with multiple processors that each support multiple streams. The task has one or more teams of threads, where each team represents threads executing on a single processor. The task designates, for each stream that is executing a thread, one stream as a team master stream and one stream as a task master stream. For each team master stream, the task notifies the operating system that the team is ready to be swapped out when each other thread of the team has saved its state and has quit its stream. Finally, for the task master stream, the task notifies the operating system that the task is ready to be swapped when it has saved its state and each other team has notified that it is ready to be swapped out.
    Type: Application
    Filed: October 1, 2003
    Publication date: April 1, 2004
    Inventors: Gail A. Alverson, Charles David Callahan, Susan L. Coatney, Brian D. Koblenz, Richard D. Korry, Burton J. Smith
  • Publication number: 20040064818
    Abstract: A method and system that prepares a task for being swapped out from processor utilization that is executing on a computer with multiple processors that each support multiple streams. The task has one or more teams of threads, where each team represents threads executing on a single processor. The task designates, for each stream that is executing a thread, one stream as a team master stream and one stream as a task master stream. For each team master stream, the task notifies the operating system that the team is ready to be swapped out when each other thread of the team has saved its state and has quit its stream. Finally, for the task master stream, the task notifies the operating system that the task is ready to be swapped when it has saved its state and each other team has notified that it is ready to be swapped out.
    Type: Application
    Filed: September 16, 2003
    Publication date: April 1, 2004
    Inventors: Gail A. Alverson, Charles David Callahan, Susan L. Coatney, Brian D. Koblenz, Richard D. Korry, Burton J. Smith
  • Patent number: 6665688
    Abstract: A replay method and system for monitoring the generating of a data set from input data sets and, when the data set is subsequently accessed, automatically regenerating the data set if the data set is out-of-date. The replay system only regenerates those input data sets that are determined to be out-of-date and only regenerates the output data set if it is determined to be out-of-date. A data set is determined to be out-of-date only when an input data set has actually changed since the data set was last generated.
    Type: Grant
    Filed: December 23, 1998
    Date of Patent: December 16, 2003
    Assignee: Cray Inc.
    Inventors: Charles David Callahan, II, Brian D. Koblenz
  • Publication number: 20020129339
    Abstract: A system for conducting performance analysis for executing tasks. The analysis involves generating a variety of trace information related to performance measures, including parallelism-related information, during execution of the task. In order to generate the trace information, target source code of interest is compiled in such a manner that executing the resulting executable code will generate execution trace information composed of a series of events. Each event stores trace information related to a variety of performance measures for the one or more processors and protection domains used. After the execution trace information has been generated, the system can use that trace information and a trace information description file to produce useful performance measure information. The trace information description file contains information that describes the types of execution events as well as the structure of the stored information.
    Type: Application
    Filed: April 3, 2001
    Publication date: September 12, 2002
    Inventors: Charles David Callahan, Keith Arnett Shields, Preston Pengra Briggs
  • Patent number: 6415433
    Abstract: A method system for optimizing a computer program. In one embodiment, the system identifies depths of blocks of a computer program and identifies the availability of expressions of the computer program. The system then modifies the computer program when he identified availability of the expression and the identified depth of a block indicate that the expression can be moved to the block. The depth of the block may represent the number of dominator blocks of that block. The availability of the expression may represent the depth of a block to which the expression may be moved. In one embodiment, when the identified availability of the expression is less than the identified depth of the block, the expression can be moved to the block.
    Type: Grant
    Filed: December 23, 1998
    Date of Patent: July 2, 2002
    Assignee: Cray Inc.
    Inventors: Charles David Callahan, II, Brian D. Koblenz
  • Publication number: 20020038332
    Abstract: A method and system in a multithreaded processor for processing events without interrupt notifications. In one aspect of the present invention, an operating system creates a thread to execute on a stream of the processor. During execution of the thread, the thread executes a loop that determines whether an event has occurred and, in response to determining whether an event has occurred, assigns a different thread to process the event so that multiple events can be processed in parallel and so that interrupts are not needed to signal that the event has occurred. Another aspect of the present invention provides a method and system for processing asynchronously occurring events without interrupt notifications. To achieve this processing, a first thread is executed to generate a notification that the event has occurred upon receipt of the asynchronously occurring event.
    Type: Application
    Filed: February 23, 2001
    Publication date: March 28, 2002
    Inventors: Gail A. Alverson, Charles David Callahan, Susan L. Coatney, Laurence S. Kaplan, Richard D. Korry