Patents by Inventor David Chesneau

David Chesneau has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20030222688
    Abstract: A ramp capacitor CAP1 has a first terminal connected to a power supply voltage VBAT. A generator circuit is connected to a second terminal of the ramp capacitor and adapted to generate a voltage ramp at the terminals of the ramp capacitor. The generator circuit includes a constant current source SCC connected to the second terminal B12 of the ramp capacitor CAP1 and auxiliary circuit MAX adapted in the presence of a transient variation of the power supply voltage to determine the transient current flowing in said ramp capacitor and generated by said transient variation. Responsive thereto, delivery is made to the second terminal B12 of the ramp capacitor CAP1 of a charging current equal to the algebraic sum of the constant current delivered by the constant current source and an auxiliary current equal and opposite to the transient current.
    Type: Application
    Filed: January 28, 2003
    Publication date: December 4, 2003
    Inventors: Christophe Premont, David Chesneau, Christophe Bernard
  • Patent number: 5731771
    Abstract: The present invention relates to a circuit for locking an analog signal to a reference value, including an analog-to-digital converter receiving the analog signal modified by the charge stored in a capacitor. A digital comparator receives the output of the converter and a reference digital value, and controls capacitor charging and discharging sources. A memory point is a stability condition flag for inhibiting the charging and discharging of the capacitor. A circuit for analyzing the converter output activates the flag when the successive values of the converter output meet a predetermined stability condition, and deactivates the flag when the successive values of the converter output meet a predetermined divergence condition.
    Type: Grant
    Filed: November 21, 1995
    Date of Patent: March 24, 1998
    Assignee: SGS-Thomson Microelectronics S.A.
    Inventor: David Chesneau