Abstract: According to some embodiments, apparatus and methods are provided comprising a connector attachment including a housing, wherein the connector attachment is selectively connectable to a mobile device; and a first token stored within the connector attachment, wherein the first token is operative to execute a transaction with a second token. Numerous other aspects are provided.

Abstract: The present invention is directed to a method of sealing the free end of a hollow fiber membrane for use in a single header filtration module by dipping the end of the membrane into a low-viscosity light-curable adhesive and curing the adhesive. The invention further encompasses the resulting sealed hollow fiber membrane with a diameter that is only slightly larger than the diameter of the unsealed membrane.

Abstract: The present invention is directed to a method of sealing the free end of a hollow fiber membrane for use in a single header filtration module by dipping the end of the membrane into a low-viscosity light-curable adhesive and curing the adhesive. The invention further encompasses the resulting sealed hollow fiber membrane with a diameter that is only slightly larger than the diameter of the unsealed membrane.

Abstract: The present invention relates to compositions, for example, the DBU/Hexafluoroacetone hydrate salt, and processes of preparing and using the same for the modification of chemical compounds via the release of trifluoroacetate. The DBU/Hexafluoroacetone hydrate salt can perform trifluoromethylation reactions on chemical compounds, such as carbonyl group-containing compounds.

Abstract: One or more embodiments provide a system and method comprising receiving at a device a first token associated with a first account; executing a transaction; recording the executed transaction at each of the device and the first token, wherein the execution of the transaction is offline; and balancing the account associated with the first token per the transaction when the first token is online after the executed transaction. Numerous other aspects are provided.

Abstract: A method includes receiving, in a computer, a request for a funds transfer from a sender to a recipient. The method also includes sending, from the computer, a message to the recipient. The message indicates to the recipient that the funds transfer has been made and that the recipient has a number of options for receiving the funds transfer. The method further includes receiving, in the computer, from the recipient, an indication for indicating selection of one of the options for receiving the funds transfer.

Abstract: A clock generator with glitchless phase adjustment having a phase locked loop with a controlled oscillator providing an output representing a phase value. One or more output modules generate one or more output clocks from the output. One or more adjustment modules add a requested phase adjustment to an output clock. The phase adjustment modules are configured to break the requested phase adjustment into smaller increments and apply the increments to an output clock generated in said at the output modules one cycle at a time.

Abstract: A digital phase locked loop has a phase acquisition module that outputs a first phase value representative of the phase of a reference signal expressed with respect to an internal phase reference. A phase offset write module convert a phases offset commanded from an external source into a phase offset correction value expressed with respect to the internal phase reference. A phase offset controller sums the phase offset correction values to produce a second phase value, which is added to the first phase value to produce a third phase value expressed with respect to the internal phase reference. A digital controlled oscillator (DCO) outputs a fourth phase value expressed with respect to the internal phase reference. A phase detector outputs a fifth phase value representing the difference between the third and fourth phase values. A loop filter derives a frequency offset for the DCO based on the fifth phase value. An output module generates one or more output clocks from the fourth phase value.

Abstract: A digital phase locked loop has a phase acquisition module that outputs a first phase value representative of the phase of a reference signal expressed with respect to an internal phase reference. A phase offset write module convert a phases offset commanded from an external source into a phase offset correction value expressed with respect to the internal phase reference. A phase offset controller sums the phase offset correction values to produce a second phase value, which is added to the first phase value to produce a third phase value expressed with respect to the internal phase reference. A digital controlled oscillator (DCO) outputs a fourth phase value expressed with respect to the internal phase reference. A phase detector outputs a fifth phase value representing the difference between the third and fourth phase values. A loop filter derives a frequency offset for the DCO based on the fifth phase value. An output module generates one or more output clocks from the fourth phase value.

Abstract: A clock generator with glitchless phase adjustment having a phase locked loop with a controlled oscillator providing an output representing a phase value. One or more output modules generate one or more output clocks from the output. One or more adjustment modules add a requested phase adjustment to an output clock. The phase adjustment modules are configured to break the requested phase adjustment into smaller increments and apply the increments to an output clock generated in said at the output modules one cycle at a time.

Abstract: A phase-locked loop to is simultaneously synchronized to high and low frequency clocks by (i) locking an output of the phase-locked loop to a high-frequency reference clock, (ii) measuring at a high rate a first phase difference between the high-frequency reference clock and the output of the phase-locked loop, (iii) measuring at a high rate a second phase difference between a low-frequency reference clock and the output of the phase-locked loop; (iv) computing at a low rate from said first and second phase differences a third phase difference between the high-frequency and low frequency clocks; (v) combining at a low rate said third phase difference with said second phase-difference to obtain a total phase difference; and (vi) adjusting the output of the phase-locked loop at a low rate to reduce the obtained total phase difference.

Abstract: A phase-locked loop to is simultaneously synchronized to high and low frequency clocks by (i) locking an output of the phase-locked loop to a high-frequency reference clock, (ii) measuring at a high rate a first phase difference between the high-frequency reference clock and the output of the phase-locked loop, (iii) measuring at a high rate a second phase difference between a low-frequency reference clock and the output of the phase-locked loop; (iv) computing at a low rate from said first and second phase differences a third phase difference between the high-frequency and low frequency clocks; (v) combining at a low rate said third phase difference with said second phase-difference to obtain a total phase difference; and (vi) adjusting the output of the phase-locked loop at a low rate to reduce the obtained total phase difference.

Abstract: A computerized method and system for demonstrating and teaching electron configurations in atomic structure are disclosed. One method includes presenting to a user one or more user interfaces stored in memory of the computing system, the one or more user interfaces includes a plurality of electron configuration diagrams. The method also includes receiving user input into an orbital box diagram displayed in the one or more user interfaces, the user input defining a possible electron configuration. The method further includes in response to the user input, updating the one or more user interfaces to illustrate the electron configuration received from the user, and if instructed by the user, generates a report regarding the compliance of the user-entered electron configuration with one or more electron configuration rules.

Abstract: The present invention relates to compositions, for example, the DBU/Hexafluoroacetone hydrate salt, and processes of preparing and using the same for the modification of chemical compounds via the release of trifluoroacetate. The DBU/Hexafluoroacetone hydrate salt can perform trifluoromethylation reactions on chemical compounds, such as carbonyl group-containing compounds.

Abstract: The present invention is directed to a method of sealing the free end of a hollow fiber membrane for use in a single header filtration module by dipping the end of the membrane into a low-viscosity light-curable adhesive and curing the adhesive. The invention further encompasses the resulting sealed hollow fiber membrane with a diameter that is only slightly larger than the diameter of the unsealed membrane.

Abstract: A reverse osmosis pressure vessel end cap assembly includes a seal plate positioned within a pressure vessel shell, with one or more load plates positioned to retain the seal plate in position. A load ring is captured or expanded by the load plates to secure the load ring into a channel in the interior surface of the pressure vessel shell. The end cap assembly thus provides secure yet easily removable access to the pressure vessel, capable of withstanding the high pressures of a reverse osmosis filtration system. Various exemplary embodiments of the assembly are provided.

Abstract: A coupler for a spiral membrane filtration element having a spiral membrane enclosed within a rigid outerwrap includes a center support, a plurality of spokes extending outwardly from the center support, a circular rim coupled with the spokes, with the face of the rim being perpendicular to the axis of the overwrap. The rim includes a channel on its face for receiving a compressible seal, and a plurality of receptacles around its outer surface for joining two face-to-face adjacent couplers when a pair of aligned keepers is place in each receptacle. Exemplary embodiments of the coupler and filtration elements and filtration assemblies are provided, as well as an associated method.

Abstract: A coupler for a spiral membrane filtration element having a spiral membrane enclosed within a rigid outerwrap includes a center support, a plurality of spokes extending outwardly from the center support, a circular rim coupled with the spokes, with the face of the rim being perpendicular to the axis of the overwrap. The rim includes a channel on its face for receiving a compressible seal, and a plurality of receptacles around its outer surface for joining two face-to-face adjacent couplers when a pair of aligned keepers is place in each receptacle. Exemplary embodiments of the coupler and filtration elements and filtration assemblies are provided, as well as an associated method.

Abstract: The invention relates in part to methods of making single-domain antibodies and methods of using single-domain antibodies to diagnose and treat disease. The invention also relates to methods and products for modulating target protein activity, including methods to inhibit huntingtin protein aggregation in Huntington's disease. The invention also includes methods and compounds for identifying pharmaceutical agents for preventing and treating diseases and for monitoring the efficacy of treatments for target protein-associated diseases.

Abstract: A coupler for a spiral membrane filtration element having a spiral membrane enclosed within a rigid outerwrap includes a center support, a plurality of spokes extending outwardly from the center support, a circular rim coupled with the spokes, with the face of the rim being perpendicular to the axis of the overwrap. The rim includes a channel on its face for receiving a compressible seal, and a plurality of receptacles around its outer surface for joining two face-to-face adjacent couplers when a pair of aligned keepers is place in each receptacle. Exemplary embodiments of the coupler and filtration elements and filtration assemblies are provided, as well as an associated method.