Patents by Inventor David D. Smith

David D. Smith has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140166089
    Abstract: Solar cells with silicon oxynitride dielectric layers and methods of forming silicon oxynitride dielectric layers for solar cell fabrication are described. For example, an emitter region of a solar cell includes a portion of a substrate having a back surface opposite a light receiving surface. A silicon oxynitride (SiOxNy, 0<x, y) dielectric layer is disposed on the back surface of the portion of the substrate. A semiconductor layer is disposed on the silicon oxynitride dielectric layer.
    Type: Application
    Filed: December 19, 2012
    Publication date: June 19, 2014
    Inventors: Michael Shepherd, David D. Smith
  • Publication number: 20140170800
    Abstract: Methods of fabricating solar cell emitter regions using silicon nano-particles and the resulting solar cells are described. In an example, a method of fabricating an emitter region of a solar cell includes forming a region of doped silicon nano-particles above a dielectric layer disposed above a surface of a substrate of the solar cell. A layer of silicon is formed on the region of doped silicon nano-particles. At least a portion of the layer of silicon is mixed with at least a portion of the region of doped silicon nano-particles to form a doped polycrystalline silicon layer disposed on the dielectric layer.
    Type: Application
    Filed: December 19, 2012
    Publication date: June 19, 2014
    Inventors: Paul Loscutoff, David D. Smith, Michael Morse, Ann Waldhauer, Taeseok Kim, Steven Edward Molesa
  • Publication number: 20140134788
    Abstract: Method of fabricating solar cells with tunnel dielectric layers are described. Solar cells with tunnel dielectric layers are also described.
    Type: Application
    Filed: January 16, 2014
    Publication date: May 15, 2014
    Inventors: Tim Dennis, Scott Harrington, Jane Manning, David D. Smith, Ann Waldhauer
  • Publication number: 20140134787
    Abstract: The formation of solar cell contacts using a laser is described. A method of fabricating a back-contact solar cell includes forming a poly-crystalline material layer above a single-crystalline substrate. The method also includes forming a dielectric material stack above the poly-crystalline material layer. The method also includes forming, by laser ablation, a plurality of contacts holes in the dielectric material stack, each of the contact holes exposing a portion of the poly-crystalline material layer; and forming conductive contacts in the plurality of contact holes.
    Type: Application
    Filed: November 5, 2012
    Publication date: May 15, 2014
    Applicant: SUNPOWER CORPORATION
    Inventors: Gabriel Harley, David D. Smith, Peter John Cousins
  • Patent number: 8709851
    Abstract: Methods of fabricating solar cells with tunnel dielectric layers are described. Solar cells with tunnel dielectric layers are also described.
    Type: Grant
    Filed: November 15, 2012
    Date of Patent: April 29, 2014
    Assignee: SunPower Corporation
    Inventors: Tim Dennis, Scott Harrington, Jane Manning, David D. Smith, Ann Waldhauer
  • Publication number: 20140096824
    Abstract: Contact holes of solar cells are formed by laser ablation to accommodate various solar cell designs. Use of a laser to form the contact holes is facilitated by replacing films formed on the diffusion regions with a film that has substantially uniform thickness. Contact holes may be formed to deep diffusion regions to increase the laser ablation process margins. The laser configuration may be tailored to form contact holes through dielectric films of varying thicknesses.
    Type: Application
    Filed: October 23, 2013
    Publication date: April 10, 2014
    Applicant: SUNPOWER CORPORATION
    Inventors: Gabriel HARLEY, David D. SMITH, Tim DENNIS, Ann WALDHAUER, Taeseok KIM, Peter John COUSINS
  • Patent number: 8692111
    Abstract: Contact holes of solar cells are formed by laser ablation to accommodate various solar cell designs. Throughput of the solar cell ablation process is improved by incorporating linear base diffusion regions with narrow width, for example as compared to an overlying metal contact. Throughput of the solar cell ablation process may also be improved by having contact holes to base diffusion regions that are perpendicular to contact holes to emitter diffusion regions. To allow for continuous laser scanning, a laser blocking layer may be located over an interlayer dielectric to prevent contact hole formation on certain regions, such as regions where a metal contact of one polarity may electrically shunt to a diffusion region of opposite polarity. In a hybrid design, a solar cell may have both linear and dotted base diffusion regions. An electro-optical modulator may be employed to allow for continuous laser scanning in dotted base diffusion designs.
    Type: Grant
    Filed: November 16, 2011
    Date of Patent: April 8, 2014
    Assignee: SunPower Corporation
    Inventors: Taeseok Kim, Gabriel Harley, David D. Smith, Peter John Cousins
  • Publication number: 20140090701
    Abstract: A solar cell is disclosed. The solar cell has a front side facing the sun during normal operation, and a back side facing away from the sun. The solar cell comprises a silicon substrate, a first polysilicon layer with a region of doped polysilicon on the back side of the substrate. The solar cell also comprises a second polysilicon layer with a second region of doped polysilicon on the back side of the silicon substrate. The second polysilicon layer at least partially covers the region of doped polysilicon. The solar cell also comprises a resistive region disposed in the first polysilicon layer. The resistive region extends from an edge of the second region of doped polysilicon. The resistive region can be formed by ion implantation of oxygen into the first polysilicon layer.
    Type: Application
    Filed: September 28, 2012
    Publication date: April 3, 2014
    Applicant: SUNPOWER CORPORATION
    Inventors: Seung RIM, David D. SMITH
  • Patent number: 8679889
    Abstract: A method for manufacturing high efficiency solar cells is disclosed. The method comprises providing a thin dielectric layer and a doped polysilicon layer on the back side of a silicon substrate. Subsequently, a high quality oxide layer and a wide band gap doped semiconductor layer can both be formed on the back and front sides of the silicon substrate. A metallization process to plate metal fingers onto the doped polysilicon layer through contact openings can then be performed. The plated metal fingers can form a first metal gridline. A second metal gridline can be formed by directly plating metal to an emitter region on the back side of the silicon substrate, eliminating the need for contact openings for the second metal gridline. Among the advantages, the method for manufacture provides decreased thermal processes, decreased etching steps, increased efficiency and a simplified procedure for the manufacture of high efficiency solar cells.
    Type: Grant
    Filed: December 21, 2011
    Date of Patent: March 25, 2014
    Assignee: SunPower Corporation
    Inventors: Peter J. Cousins, David D. Smith, Seung B. Rim
  • Publication number: 20140080251
    Abstract: A method for manufacturing high efficiency solar cells is disclosed. The method comprises providing a thin dielectric layer and a doped polysilicon layer on the back side of a silicon substrate. Subsequently, a high quality oxide layer and a wide band gap doped semiconductor layer can both be formed on the back and front sides of the silicon substrate. A metallization process to plate metal fingers onto the doped polysilicon layer through contact openings can then be performed. The plated metal fingers can form a first metal gridline. A second metal gridline can be formed by directly plating metal to an emitter region on the back side of the silicon substrate, eliminating the need for contact openings for the second metal gridline. Among the advantages, the method for manufacture provides decreased thermal processes, decreased etching steps, increased efficiency and a simplified procedure for the manufacture of high efficiency solar cells.
    Type: Application
    Filed: November 18, 2013
    Publication date: March 20, 2014
    Inventors: Peter J. Cousins, David D. Smith, Seung Bum Rim
  • Patent number: 8673673
    Abstract: A solar cell includes polysilicon P-type and N-type doped regions on a backside of a substrate, such as a silicon wafer. An interrupted trench structure separates the P-type doped region from the N-type doped region in some locations but allows the P-type doped region and the N-type doped region to touch in other locations. Each of the P-type and N-type doped regions may be formed over a thin dielectric layer. Among other advantages, the resulting solar cell structure allows for increased efficiency while having a relatively low reverse breakdown voltage.
    Type: Grant
    Filed: April 29, 2013
    Date of Patent: March 18, 2014
    Assignee: SunPower Corporation
    Inventors: Denis De Ceuster, Peter John Cousins, David D. Smith
  • Patent number: 8647911
    Abstract: A solar cell includes abutting P-type and N-type doped regions in a contiguous portion of a polysilicon layer. The polysilicon layer may be formed on a thin dielectric layer, which is formed on a backside of a solar cell substrate (e.g., silicon wafer). The polysilicon layer has a relatively large average grain size to reduce or eliminate recombination in a space charge region between the P-type and N-type doped regions, thereby increasing efficiency.
    Type: Grant
    Filed: July 12, 2012
    Date of Patent: February 11, 2014
    Assignee: SunPower Corporation
    Inventor: David D. Smith
  • Patent number: 8597970
    Abstract: A method for manufacturing high efficiency solar cells is disclosed. The method comprises providing a thin dielectric layer and a doped polysilicon layer on the back side of a silicon substrate. Subsequently, a high quality oxide layer and a wide band gap doped semiconductor layer can both be formed on the back and front sides of the silicon substrate. A metallization process to plate metal fingers onto the doped polysilicon layer through contact openings can then be performed. The plated metal fingers can form a first metal gridline. A second metal gridline can be formed by directly plating metal to an emitter region on the back side of the silicon substrate, eliminating the need for contact openings for the second metal gridline. Among the advantages, the method for manufacture provides decreased thermal processes, decreased etching steps, increased efficiency and a simplified procedure for the manufacture of high efficiency solar cells.
    Type: Grant
    Filed: December 21, 2011
    Date of Patent: December 3, 2013
    Assignee: SunPower Corporation
    Inventors: Peter J. Cousins, David D. Smith, Seung B. Rim
  • Patent number: 8586403
    Abstract: Contact holes of solar cells are formed by laser ablation to accommodate various solar cell designs. Use of a laser to form the contact holes is facilitated by replacing films formed on the diffusion regions with a film that has substantially uniform thickness. Contact holes may be formed to deep diffusion regions to increase the laser ablation process margins. The laser configuration may be tailored to form contact holes through dielectric films of varying thicknesses.
    Type: Grant
    Filed: February 15, 2011
    Date of Patent: November 19, 2013
    Assignee: SunPower Corporation
    Inventors: Gabriel Harley, David D. Smith, Tim Dennis, Ann Waldhauer, Taeseok Kim, Peter John Cousins
  • Patent number: 8580599
    Abstract: Methods of fabricating bypass diodes for solar cells are described. In one embodiment, a method includes forming a first conductive region of a first conductivity type above a substrate of a solar cell. A second conductive region of a second conductivity type is formed on the first conductive region. In another embodiment, a method includes forming a first conductive region of a first conductivity type above a substrate of a solar cell. A second conductive region of a second conductivity type is formed within, and surrounded by, an uppermost portion of the first conductive region but is not formed in a lowermost portion of the first conductive region.
    Type: Grant
    Filed: February 10, 2012
    Date of Patent: November 12, 2013
    Assignee: SunPower Corporation
    Inventors: Seung Bum Rim, Taeseok Kim, David D. Smith, Peter J. Cousins
  • Publication number: 20130247965
    Abstract: Solar cells having emitter regions composed of wide bandgap semiconductor material are described. In an example, a method includes forming, in a process tool having a controlled atmosphere, a thin dielectric layer on a surface of a semiconductor substrate of the solar cell. The semiconductor substrate has a bandgap. Without removing the semiconductor substrate from the controlled atmosphere of the process tool, a semiconductor layer is formed on the thin dielectric layer. The semiconductor layer has a bandgap at least approximately 0.2 electron Volts (eV) above the bandgap of the semiconductor substrate.
    Type: Application
    Filed: March 23, 2012
    Publication date: September 26, 2013
    Inventors: Richard M. Swanson, Marius M. Bunea, Michael C. Johnson, David D. Smith, Yu-Chen Shen, Peter J. Cousins, Tim Dennis
  • Publication number: 20130240029
    Abstract: A solar cell includes polysilicon P-type and N-type doped regions on a backside of a substrate, such as a silicon wafer. A trench structure separates the P-type doped region from the N-type doped region. Each of the P-type and N-type doped regions may be formed over a thin dielectric layer. The trench structure may include a textured surface for increased solar radiation collection. Among other advantages, the resulting structure increases efficiency by providing isolation between adjacent P-type and N-type doped regions, thereby preventing recombination in a space charge region where the doped regions would have touched.
    Type: Application
    Filed: May 13, 2013
    Publication date: September 19, 2013
    Inventor: David D. SMITH
  • Publication number: 20130237007
    Abstract: A solar cell includes polysilicon P-type and N-type doped regions on a backside of a substrate, such as a silicon wafer. An interrupted trench structure separates the P-type doped region from the N-type doped region in some locations but allows the P-type doped region and the N-type doped region to touch in other locations. Each of the P-type and N-type doped regions may be formed over a thin dielectric layer. Among other advantages, the resulting solar cell structure allows for increased efficiency while having a relatively low reverse breakdown voltage.
    Type: Application
    Filed: April 29, 2013
    Publication date: September 12, 2013
    Inventors: Denis DE CEUSTER, Peter John COUSINS, David D. SMITH
  • Patent number: 8527945
    Abstract: A method of testing the server implementation of the Domain Name System protocol by using a first body of computer code in a first programming language capable of sending and receiving DNS requests, and a second body of computer readable code in a second programming language capable of generating DNS requests and verifying responses. The second programming language may be tailored to writing code being capable of generating Domain Name System requests and verifying the response thereby allowing the program to be efficiently reconfigured to test different aspects of the server.
    Type: Grant
    Filed: May 7, 2010
    Date of Patent: September 3, 2013
    Assignee: Verisign, Inc.
    Inventors: David D. Smith, John Colosi
  • Publication number: 20130164878
    Abstract: A method for manufacturing high efficiency solar cells is disclosed. The method comprises providing a thin dielectric layer and a doped polysilicon layer on the back side of a silicon substrate. Subsequently, a high quality oxide layer and a wide band gap doped semiconductor layer can both be formed on the back and front sides of the silicon substrate. A metallization process to plate metal fingers onto the doped polysilicon layer through contact openings can then be performed. The plated metal fingers can form a first metal gridline. A second metal gridline can be formed by directly plating metal to an emitter region on the back side of the silicon substrate, eliminating the need for contact openings for the second metal gridline. Among the advantages, the method for manufacture provides decreased thermal processes, decreased etching steps, increased efficiency and a simplified procedure for the manufacture of high efficiency solar cells.
    Type: Application
    Filed: December 21, 2011
    Publication date: June 27, 2013
    Inventors: Peter J. Cousins, David D. Smith, Seung B. Rim