Patents by Inventor David D. Smith

David D. Smith has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9559246
    Abstract: Methods of fabricating solar cell emitter regions using silicon nano-particles and the resulting solar cells are described. In an example, a method of fabricating an emitter region of a solar cell includes forming a region of doped silicon nano-particles above a dielectric layer disposed above a surface of a substrate of the solar cell. A layer of silicon is formed on the region of doped silicon nano-particles. At least a portion of the layer of silicon is mixed with at least a portion of the region of doped silicon nano-particles to form a doped polycrystalline silicon layer disposed on the dielectric layer.
    Type: Grant
    Filed: November 18, 2015
    Date of Patent: January 31, 2017
    Assignee: SunPower Corporation
    Inventors: Paul Loscutoff, David D. Smith, Michael Morse, Ann Waldhauer, Taeseok Kim, Steven Edward Molesa
  • Patent number: 9553229
    Abstract: A solar cell is fabricated by etching one or more of its layers without substantially etching another layer of the solar cell. In one embodiment, a copper layer in the solar cell is etched without substantially etching a topmost metallic layer comprising tin. For example, an etchant comprising sulfuric acid and hydrogen peroxide may be employed to etch the copper layer selective to the tin layer. A particular example of the aforementioned etchant is a Co-Bra Etch® etchant modified to comprise about 1% by volume of sulfuric acid, about 4% by volume of phosphoric acid, and about 2% by volume of stabilized hydrogen peroxide. In one embodiment, an aluminum layer in the solar cell is etched without substantially etching the tin layer. For example, an etchant comprising potassium hydroxide may be employed to etch the aluminum layer without substantially etching the tin layer.
    Type: Grant
    Filed: August 30, 2011
    Date of Patent: January 24, 2017
    Assignee: SunPower Corporation
    Inventors: Douglas H. Rose, Pongsthorn Uralwong, David D. Smith
  • Publication number: 20170012161
    Abstract: A method for manufacturing high efficiency solar cells is disclosed. The method comprises providing a thin dielectric layer and a doped polysilicon layer on the back side of a silicon substrate. Subsequently, a high quality oxide layer and a wide band gap doped semiconductor layer can both be formed on the back and front sides of the silicon substrate. A metallization process to plate metal fingers onto the doped polysilicon layer through contact openings can then be performed. The plated metal fingers can form a first metal gridline. A second metal gridline can be formed by directly plating metal to an emitter region on the back side of the silicon substrate, eliminating the need for contact openings for the second metal gridline. Among the advantages, the method for manufacture provides decreased thermal processes, decreased etching steps, increased efficiency and a simplified procedure for the manufacture of high efficiency solar cells.
    Type: Application
    Filed: September 19, 2016
    Publication date: January 12, 2017
    Inventors: Peter J. Cousins, David D. Smith, Seung Bum Rim
  • Patent number: 9537030
    Abstract: Methods of fabricating solar cells with tunnel dielectric layers are described. Solar cells with tunnel dielectric layers are also described.
    Type: Grant
    Filed: May 29, 2015
    Date of Patent: January 3, 2017
    Assignee: SunPower Corporation
    Inventors: Tim Dennis, Scott Harrington, Jane Manning, David D. Smith, Ann Waldhauer
  • Patent number: 9520507
    Abstract: A method of fabricating a solar cell can include forming a dielectric region on a silicon substrate. The method can also include forming an emitter region over the dielectric region and forming a dopant region on a surface of the silicon substrate. In an embodiment, the method can include heating the silicon substrate at a temperature above 900 degrees Celsius to getter impurities to the emitter region and drive dopants from the dopant region to a portion of the silicon substrate.
    Type: Grant
    Filed: December 22, 2014
    Date of Patent: December 13, 2016
    Assignee: SunPower Corporation
    Inventors: David D. Smith, Tim Dennis, Russelle De Jesus Tabajonda
  • Publication number: 20160343890
    Abstract: A solar cell includes polysilicon P-type and N-type doped regions on a backside of a substrate, such as a silicon wafer. A trench structure separates the P-type doped region from the N-type doped region. Each of the P-type and N-type doped regions may be formed over a thin dielectric layer. The trench structure may include a textured surface for increased solar radiation collection. Among other advantages, the resulting structure increases efficiency by providing isolation between adjacent P-type and N-type doped regions, thereby preventing recombination in a space charge region where the doped regions would have touched.
    Type: Application
    Filed: August 5, 2016
    Publication date: November 24, 2016
    Applicant: SunPower Corporation
    Inventor: David D. SMITH
  • Patent number: 9502601
    Abstract: Methods of fabricating solar cell emitter regions with differentiated P-type and N-type regions architectures, and resulting solar cells, are described. In an example, a back contact solar cell can include a substrate having a light-receiving surface and a back surface. A first polycrystalline silicon emitter region of a first conductivity type is disposed on a first thin dielectric layer disposed on the back surface of the substrate. A second polycrystalline silicon emitter region of a second, different, conductivity type is disposed on a second thin dielectric layer disposed on the back surface of the substrate. A third thin dielectric layer is disposed over an exposed outer portion of the first polycrystalline silicon emitter region and is disposed laterally directly between the first and second polycrystalline silicon emitter regions. A first conductive contact structure is disposed on the first polycrystalline silicon emitter region.
    Type: Grant
    Filed: April 1, 2016
    Date of Patent: November 22, 2016
    Assignee: SunPower Corporation
    Inventors: David D. Smith, Timothy Weidman, Scott Harrington, Venkatasubramani Balu
  • Publication number: 20160329441
    Abstract: A method of fabricating a solar cell can include forming a dielectric region on a silicon substrate. The method can also include forming an emitter region over the dielectric region and forming a dopant region on a surface of the silicon substrate. In an embodiment, the method can include heating the silicon substrate at a temperature above 900 degrees Celsius to getter impurities to the emitter region and drive dopants from the dopant region to a portion of the silicon substrate.
    Type: Application
    Filed: July 18, 2016
    Publication date: November 10, 2016
    Inventors: David D. Smith, Tim Dennis, Russelle De Jesus Tabajonda
  • Publication number: 20160315214
    Abstract: Methods of fabricating solar cell emitter regions using ion implantation, and resulting solar cells, are described. In an example, a method of fabricating alternating N-type and P-type emitter regions of a solar cell involves forming a silicon layer above a substrate. Dopant impurity atoms of a first conductivity type are implanted, through a first shadow mask, in the silicon layer to form first implanted regions and resulting in non-implanted regions of the silicon layer. Dopant impurity atoms of a second, opposite, conductivity type are implanted, through a second shadow mask, in portions of the non-implanted regions of the silicon layer to form second implanted regions and resulting in remaining non-implanted regions of the silicon layer. The remaining non-implanted regions of the silicon layer are removed with a selective etch process, while the first and second implanted regions of the silicon layer are annealed to form doped polycrystalline silicon emitter regions.
    Type: Application
    Filed: June 29, 2016
    Publication date: October 27, 2016
    Inventors: Timothy Weidman, David D. Smith
  • Patent number: 9466750
    Abstract: A method for manufacturing high efficiency solar cells is disclosed. The method comprises providing a thin dielectric layer and a doped polysilicon layer on the back side of a silicon substrate. Subsequently, a high quality oxide layer and a wide band gap doped semiconductor layer can both be formed on the back and front sides of the silicon substrate. A metallization process to plate metal fingers onto the doped polysilicon layer through contact openings can then be performed. The plated metal fingers can form a first metal gridline. A second metal gridline can be formed by directly plating metal to an emitter region on the back side of the silicon substrate, eliminating the need for contact openings for the second metal gridline. Among the advantages, the method for manufacture provides decreased thermal processes, decreased etching steps, increased efficiency and a simplified procedure for the manufacture of high efficiency solar cells.
    Type: Grant
    Filed: February 4, 2015
    Date of Patent: October 11, 2016
    Assignee: SunPower Corporation
    Inventors: Peter J. Cousins, David D. Smith, Seung Bum Rim
  • Publication number: 20160284913
    Abstract: Methods of fabricating solar cell emitter regions using substrate-level ion implantation, and resulting solar cells, are described. In an example, a method of fabricating a solar cell involves forming a lightly doped region in a semiconductor substrate by ion implantation, the lightly doped region of a first conductivity type of a first concentration. The method also involves forming a first plurality of dopant regions of the first conductivity type of a second, higher, concentration by ion implantation, the first plurality of dopant regions overlapping with a first portion of the lightly doped region. The method also involves forming a second plurality of dopant regions by ion implantation, the second plurality of dopant regions having a second conductivity type of a concentration higher than the first concentration, and the second plurality of dopant regions overlapping with a second portion of the lightly doped region and alternating with but not overlapping the first plurality of dopant regions.
    Type: Application
    Filed: March 27, 2015
    Publication date: September 29, 2016
    Inventors: Staffan Westerberg, Timothy Weidman, David D. Smith
  • Publication number: 20160284881
    Abstract: Solar cells having epitaxial passivation layers are described. In an example, a solar cell includes a crystalline substrate. An epitaxial passivation layer is disposed directly on the crystalline substrate. A plurality of alternating N-type and P-type emitter regions is disposed on the epitaxial passivation layer.
    Type: Application
    Filed: March 23, 2015
    Publication date: September 29, 2016
    Inventors: Michael C. Johnson, David D. Smith, Seung Bum Rim
  • Publication number: 20160284923
    Abstract: Methods of fabricating solar cells, and the resulting solar cells, are described herein. In an example, a method of fabricating a solar cell includes forming a thin dielectric layer on a surface of a substrate by radical oxidation or plasma oxidation of the surface of the substrate. The method also involves forming a silicon layer over the thin dielectric layer. The method also involves forming a plurality of emitter regions from the silicon layer.
    Type: Application
    Filed: September 25, 2015
    Publication date: September 29, 2016
    Inventors: Michael C. Johnson, Taiqing Qiu, David D. Smith, Peter John Cousins, Staffan Westerberg
  • Publication number: 20160284917
    Abstract: Methods of fabricating solar cells having passivation layers, and the resulting solar cells, are described. In an example, a solar cell includes a substrate having a first surface and a second surface. A plurality of emitter regions is disposed on the first surface of the substrate and spaced apart from one another. An amorphous silicon passivation layer is disposed on each of the plurality of emitter regions and between each of the plurality of emitter regions, directly on an exposed portion of the first surface of the substrate.
    Type: Application
    Filed: March 27, 2015
    Publication date: September 29, 2016
    Inventors: Seung Bum Rim, David D. Smith, Michael C. Johnson, Christine Bourdet Simmons
  • Patent number: 9437763
    Abstract: A solar cell includes polysilicon P-type and N-type doped regions on a backside of a substrate, such as a silicon wafer. A trench structure separates the P-type doped region from the N-type doped region. Each of the P-type and N-type doped regions may be formed over a thin dielectric layer. The trench structure may include a textured surface for increased solar radiation collection. Among other advantages, the resulting structure increases efficiency by providing isolation between adjacent P-type and N-type doped regions, thereby preventing recombination in a space charge region where the doped regions would have touched.
    Type: Grant
    Filed: November 19, 2015
    Date of Patent: September 6, 2016
    Assignee: SunPower Corporation
    Inventor: David D. Smith
  • Publication number: 20160233348
    Abstract: A solar cell can have a first dielectric formed over a it doped region of a silicon substrate. The solar cell can have a second dielectric formed over a second doped region of the silicon substrate, where the first dielectric is a different type of dielectric than the second dielectric. A doped semiconductor can be formed over the first and second dielectric. A positive-type metal and a negative-type metal can be formed over the doped semiconductor.
    Type: Application
    Filed: April 21, 2016
    Publication date: August 11, 2016
    Inventor: David D. Smith
  • Patent number: 9401450
    Abstract: Methods of fabricating solar cell emitter regions using ion implantation, and resulting solar cells, are described. In an example, a method of fabricating alternating N-type and P-type emitter regions of a solar cell involves forming a silicon layer above a substrate. Dopant impurity atoms of a first conductivity type are implanted, through a first shadow mask, in the silicon layer to form first implanted regions and resulting in non-implanted regions of the silicon layer. Dopant impurity atoms of a second, opposite, conductivity type are implanted, through a second shadow mask, in portions of the non-implanted regions of the silicon layer to form second implanted regions and resulting in remaining non-implanted regions of the silicon layer. The remaining non-implanted regions of the silicon layer are removed with a selective etch process, while the first and second implanted regions of the silicon layer are annealed to form doped polycrystalline silicon emitter regions.
    Type: Grant
    Filed: December 5, 2014
    Date of Patent: July 26, 2016
    Assignee: SunPower Corporation
    Inventors: Timothy Weidman, David D. Smith
  • Publication number: 20160181444
    Abstract: A method of fabricating a solar cell can include forming a dielectric region on a silicon substrate. The method can also include forming an emitter region over the dielectric region and forming a dopant region on a surface of the silicon substrate. In an embodiment, the method can include heating the silicon substrate at a temperature above 900 degrees Celsius to getter impurities to the emitter region and drive dopants from the dopant region to a portion of the silicon substrate.
    Type: Application
    Filed: December 22, 2014
    Publication date: June 23, 2016
    Inventors: David D. Smith, Tim Dennis, Russelle De Jesus Tabajonda
  • Publication number: 20160133767
    Abstract: Methods of fabricating solar cell emitter regions using ion implantation, and resulting solar cells, are described. In an example, a back contact solar cell includes a crystalline silicon substrate having a light-receiving surface and a back surface. A first polycrystalline silicon emitter region is disposed above the crystalline silicon substrate. The first polycrystalline silicon emitter region is doped with dopant impurity species of a first conductivity type and further includes ancillary impurity species different from the dopant impurity species of the first conductivity type. A second polycrystalline silicon emitter region is disposed above the crystalline silicon substrate and is adjacent to but separated from the first polycrystalline silicon emitter region. The second polycrystalline silicon emitter region is doped with dopant impurity species of a second, opposite, conductivity type.
    Type: Application
    Filed: January 19, 2016
    Publication date: May 12, 2016
    Inventors: David D. Smith, Timothy Weidman, Staffan Westerberg
  • Patent number: 9337369
    Abstract: A solar cell can have a first dielectric formed over a first doped region of a silicon substrate. The solar cell can have a second dielectric formed over a second doped region of the silicon substrate, where the first dielectric is a different type of dielectric than the second dielectric. A doped semiconductor can be formed over the first and second dielectric. A positive-type metal and a negative-type metal can be formed over the doped semiconductor.
    Type: Grant
    Filed: March 28, 2014
    Date of Patent: May 10, 2016
    Assignee: SunPower Corporation
    Inventor: David D. Smith