Abstract: A spray box assembly including, in combination, a top spray box, a bottom spray box, the boxes being juxtapositioned to define a pathway therebetween, at least one spray assembly positioned within at least one of the boxes and a supply assembly for supplying a treating solution to the spray assembly to coat product with the treating solution as the product is fed through the pathway and also including a method of coating a product with a treating solution, comprising the steps of feeding the product into a pathway between top spray box and a bottom spray box and spraying the treating solution within at least one of the boxes about the pathway to coat the product with the treating solution as the product is fed through the pathway.

Abstract: A spray box assembly including, in combination, a top spray box, a bottom spray box, the boxes being juxtapositioned to define a pathway therebetween, at least one spray assembly positioned within at least one of the boxes and a supply assembly for supplying a treating solution to the spray assembly to coat product with the treating solution as the product is fed through the pathway and also including a method of coating a product with a treating solution, comprising the steps of feeding the product into a pathway between top spray box and a bottom spray box and spraying the treating solution within at least one of the boxes about the pathway to coat the product with the treating solution as the product is fed through the pathway.

Abstract: A DC—DC converter includes a variable frequency oscillator, a control system and a power train. The DC—DC converter is well suited for use in a cell phone. The control system uses the output of the oscillator to control the power train. The oscillator varies its frequency as a function of a pseudo random number generator, thereby reducing electromagnetic interference caused by ripple in the output of the DC—DC converter.

Abstract: A sampled amplitude read channel for magnetic disk recording which asynchronously samples the analog read signal, adaptively equalizes the resulting discrete time sample values according to a target partial response, extracts synchronous sample values through interpolated timing recovery, and detects digital data from the synchronous sample values using a Viterbi sequence detector is disclosed. To minimize interference from the timing and gain control loops, the phase and magnitude response of the adaptive equalizer filter are constrained at a predetermined frequency using an optimal orthogonal projection operation as a modification to a least mean square (LMS) adaptation algorithm. Further, with interpolated timing recovery, the equalizer filter and its associated latency are removed from the timing recovery loop, thereby allowing a higher order discrete time filter and a lower order analog filter.

Abstract: Data storage system circuitry comprises randomizer circuitry and grading circuitry. The randomizer circuitry concurrently generates multiple randomized versions of user data. The grading circuitry selects one of the multiple randomized versions of the user data for data storage. Decoding circuitry decodes the selected one of the multiple randomized versions of the user data. In some examples of the invention, the grading circuitry selects the one of the multiple randomized versions of the user data based on zero run characteristics of the multiple randomized versions of the user data. In some examples of the invention, the user data is not encoded with a run length limit algorithm.

Abstract: A disk drive system is disclosed that includes a disk device coupled to control circuitry. The control circuitry encodes data using a modulo code. The control circuitry separates the data into blocks and encodes the data by inserting stuff bits between blocks according to the modulo code. The control circuitry converts the encoded data into a write signal and transfers the write signal to the disk device. The control circuitry also receives a read signal from the disk device and converts the read signal into a data signal. The data signal represents blocks of data separated by stuff bits. The control circuitry detects errors in a block of data by determining the modulo value of the block of data and the following stuff bits.

Abstract: A disk drive system is disclosed that includes a disk device coupled to control circuitry. The control circuitry includes a read channel with a detector that detects servo mark sub-patterns and correlates the detected servo mark sub-patterns to detect a servo mark. The detector includes matched filters to detect the sub-patterns.

Abstract: A sampled amplitude read channel incorporated within a magnetic disk storage system for reading data recorded tracks on a magnetic medium, where the data comprises user data sectors recorded at varying data rates across a plurality of predefined zones and embedded servo data sectors recorded at the same data rate across the zones. The read channel comprises a timing recovery component for synchronous sampling of a read signal from a magnetic read head positioned over the magnetic medium, a gain control component for adjusting the amplitude of the read signal, and a DC offset component for canceling a DC offset in the read signal. These components are dynamically configured to operate according to whether the read channel is processing user data or embedded servo data.

Abstract: A disk drive system is disclosed that includes a disk device coupled to control circuitry. The control circuitry includes a read channel with a detector that detects a bit sequence associated with Gray codes and delays indications of the bit sequence detection to handle phase shifts. The detector generates a Gray code detection signal in response to the delayed indications. The control circuitry processes the Gray code in response to the Gray code detection signal.

Abstract: A disk drive system comprises control circuitry and a disk device. The disk device transfers an analog signal representing servo data and user data from a disk device to the control circuitry. The servo data includes servo synch marks. The control circuitry processes the analog signal to generate a digital signal representing the user data. The control circuitry includes Viterbi circuitry and servo circuitry. The Viterbi circuitry interleaves and sums samples of the analog signal. The Viterbi circuitry then processes the sums using two states, an even magnet length constraint, a D=1 constraint, and a sliding threshold algorithm to generate a bit sequence. The servo circuitry processes the bit sequence to detect the servo synch marks.

Abstract: A disk drive system comprises control circuitry and a disk device. The disk device transfers a read signal representing user data, servo data, and auxiliary data to the control circuitry. The control circuitry detects encoded signals representing “0” and “1” auxiliary data bits from the read signal. The control circuitry decodes the encoded signals into the auxiliary data bits. The encoded signals representing the “0” auxiliary data bits have opposite polarity from the encoded signals representing the “1” auxiliary data bits. Polarity reversal pulses are between consecutive encoded signals with opposite polarities. The auxiliary data bits could be repeatable run-out data that is processed to generate a position signal that the disk device uses to compensate for repeatable run-out error.

Abstract: A disk drive system is disclosed that includes a disk device coupled to control circuitry. The disk device transfers a read signal representing data to the control circuitry, where the control circuitry is configured to receive the read signal and convert it into a data signal. To convert the read signal, the control circuitry samples the read signal to generate read samples. The control circuitry interpolates the read samples using phase error data to generate a first interpolated sample and a second interpolated sample. To generate the phase error data, the control circuitry subtracts the second interpolated sample from the first interpolated sample to generate a first result. The control circuitry subtracts the first interpolated sample from the second interpolated sample to generate a second result. The control circuitry slices the second result to generate a third result. The control circuitry then multiplies the first result and the third result to generate the phase error data.

Abstract: Servo circuitry is disclosed that is configured to operate with a magnetic disk drive system. The servo circuitry is comprised of a first servo detector system, a second servo detector system, and a comparator. The first servo detector system and the second servo detector system each receive samples, taken from a read signal, that include servo data. The first servo detector system compares the samples to a plurality of servo codes to generate a first selected code. The second servo detector system compares a first shifted version of the samples to the plurality of servo codes to generate a second selected code. The comparator receives the selected codes and selects one of the selected codes. The selected code represents the servo data. The servo circuitry could also include a third servo detector system that operates on a second shifted version of the samples.

Abstract: Servo circuitry is disclosed that is configured to operate with a magnetic disk drive system. The servo circuitry is comprised of a first servo detector system, a second servo detector system, and a comparator. The first servo detector system and the second servo detector system each receive samples, taken from a read signal, that include servo data. The first servo detector system compares the samples to a plurality of servo codes to generate a first selected code. The second servo detector system compares a first shifted version of the samples to the plurality of servo codes to generate a second selected code. The comparator receives the selected codes and selects one of the selected codes. The selected code represents the servo data. The servo circuitry could also include a third servo detector system that operates on a second shifted version of the samples.

Abstract: Servo circuitry is disclosed that is configured to operate with a magnetic disk drive system. The servo circuitry is comprised of a first servo detector system, a second servo detector system, and a comparator. The first servo detector system and the second servo detector system each receive samples, taken from a read signal, that include servo data. The first servo detector system compares the samples to a plurality of servo codes to generate a first selected code. The second servo detector system compares a first shifted version of the samples to the plurality of servo codes to generate a second selected code. The comparator receives the selected codes and selects one of the selected codes. The selected code represents the servo data. The servo circuitry could also include a third servo detector system that operates on a second shifted version of the samples.

Abstract: Data storage system circuitry comprises randomizer circuitry and run-length control circuitry. The randomizer circuitry generates randomized user data. The run-length control circuitry grades the randomized user data to determine if the randomized user data requires run-length encoding. The run-length control circuitry applies the run-length encoding to the randomized user data if the randomized user data requires run-length encoding. The run-length control circuitry may encode decoding information and error correction information for the decoding information into the randomized user data. The run-length encoding may comprise de-randomization or RLL encoding. If de-randomization is used, RLL encoding may be eliminated altogether for the randomized user data.

Abstract: A disc storage system servo code detector is disclosed that provides enhanced error correction capabilities during both tracking and seeking by increasing a minimum distance dmin between valid codewords and by increasing a minimum distance {circumflex over ( )}dmin from the signal space between adjacent codewords to the decision boundaries of all other valid codewords. The signal space with respect to the minimum distances is not a limiting aspect of the invention; however, in the preferred embodiment the codewords are selected to maximize the minimum distances in Euclidean space. Thus, the read signal is sampled and equalized according to a partial response spectrum, and maximum likelihood detection is employed to detect the servo codewords in Euclidean space. The code rate is selected according to certain design criteria such as the amount of error correction desired, the data density, and the cost and complexity of the encoder/decoder circuitry.

Abstract: A sampled amplitude read channel is disclosed for disc storage systems that extracts early-decisions from a discrete-time trellis sequence detector to generate estimated target values for use in decision-directed timing recovery, gain control, and adaptive equalization. The trellis sequence detector comprises a metric generator for generating error metrics corresponding to a plurality of states of a state transition diagram, and a plurality of path memories which correspond to the paths of a trellis. The path memories store a plurality of survivor sequences which eventually merge into a most likely sequence at the output of the path memories. To reduce the latency in generating the estimated target samples, the trellis sequence detector outputs an early-decision from an intermediate location within the path memories. The early-decision is then converted into the partial response signaling space of the read signal samples.

Abstract: A sampled amplitude read channel is disclosed for disk storage systems comprising an MEEPR4 equalizer, an MEEPR4 sequence detector matched to an RLL d=1 constraint, and an encoder/decoder for implementing a channel code that codes out (2,4,2) quasi-catastrophic data sequences. A rate n/m finite state encoder encodes n bits of user data into m bits of write data, and a sliding block decoder decodes m bits of read data into n bits of estimated user data. The encoder uses the current n bits of user data as well as a current state of a state machine to generate the m bits of write data, where a state-splitting technique is employed to achieve a high code rate in a practical, cost effective implementation. The decoder decodes the m bits of read data into the n bits of estimated user data by evaluating the current detected codeword in context with the following detected codeword.

Abstract: A discrete time servo demodulation technique incorporated within a sampled amplitude read channel to demodulate embedded servo field information stored on a magnetic medium. The servo field information is transduced by a read head into an analog signal, and converted to a sequence of sample values in the read channel. The demodulation technique is responsive to the sample values and includes a discrete time peak detector for detecting servo data, and a discrete time servo burst amplitude detector for measuring the amplitude of servo bursts. Peaks are detected in the analog read signal by sensing a change of slope from the sequence of sample values. The peaks are qualified by polarity in that a peak is detected only if its polarity is opposite in sign from the previous peak. The servo burst amplitudes are measured by interpolating, rectifying, and accumulating the sequence of sample values corresponding to the servo bursts.