Patents by Inventor David Horak

David Horak has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20030212008
    Abstract: The present invention is concerned with combinations of a farnesyl transferase inhibitor and two or more further anti-cancer agents for inhibiting the growth of tumor cells and useful in the treatment of cancer.
    Type: Application
    Filed: August 28, 2002
    Publication date: November 13, 2003
    Inventors: Peter Albert Palmer, Ivan David Horak
  • Publication number: 20030186925
    Abstract: The present invention is concerned with combinations of a farnesyl transferase inhibitor and an anti-tumor nucleoside derivative for inhibiting the growth of tumor cells and useful in the treatment of cancer.
    Type: Application
    Filed: August 28, 2002
    Publication date: October 2, 2003
    Inventors: Peter Albert Palmer, Ivan David Horak
  • Publication number: 20030181473
    Abstract: The present invention is concerned with combinations of a farnesyl transferase inhibitor and a taxane compound for inhibiting the growth of tumor cells and useful in the treatment of cancer.
    Type: Application
    Filed: August 28, 2002
    Publication date: September 25, 2003
    Inventors: Peter Albert Palmer, Ivan David Horak
  • Patent number: 6614074
    Abstract: A grooved planar DRAM transfer device having a grooved gate formed in a groove in a substrate located between source and drain regions. The grooved gate has sidewall portions and a bottom portion which defines a channel therealong. The bottom portion includes a doped pocket such that the threshold voltage Vt on the bottom portion is substantially less than Vt on the sidewall portions, such that the sidewall portions predominantly control electric current through the device.
    Type: Grant
    Filed: June 5, 1998
    Date of Patent: September 2, 2003
    Assignee: International Business Machines Corporation
    Inventors: Gary Bronner, Toshiharu Furukawa, Mark C. Hakey, Steven J. Holmes, David Horak, Jack A. Mandelman
  • Publication number: 20030100553
    Abstract: The present invention is concerned with combinations of a farnesyl transferase inhibitor and a camptothecin compound for inhibiting the growth of tumor cells and useful in the treatment of cancer.
    Type: Application
    Filed: August 28, 2002
    Publication date: May 29, 2003
    Inventors: Peter Albert Palmer, Ivan David Horak
  • Publication number: 20030060480
    Abstract: The present invention is concerned with combinations of a farnesyl transferase inhibitor and a vinca alkaloid for inhibiting the growth of tumor cells and useful in the treatment of cancer.
    Type: Application
    Filed: August 28, 2002
    Publication date: March 27, 2003
    Inventors: Ivan David Horak, Christopher J. Bowden
  • Publication number: 20030057483
    Abstract: A grooved planar DRAM transfer device having a grooved gate formed in a groove in a substrate located between source and drain regions. The grooved gate has sidewall portions and a bottom portion which defines a channel therealong. The bottom portion includes a doped pocket such that the threshold voltage Vt on the bottom portion is substantially less than Vt on the sidewall portions, such that the sidewall portions predominantly control electric current through the device.
    Type: Application
    Filed: June 5, 1998
    Publication date: March 27, 2003
    Inventors: GARY BRONNER, TOSHIHARU FURUKAWA, MARK C. HAKEY, STEVEN J. HOLMES, DAVID HORAK, JACK A. MANDELMAN
  • Publication number: 20030027839
    Abstract: The present invention relates to the use of farnesyl protein transferase inhibitors for preparing pharmaceutical compositions for treating advanced breast cancer.
    Type: Application
    Filed: August 2, 2002
    Publication date: February 6, 2003
    Inventors: Peter Albert Palmer, Ivan David Horak
  • Publication number: 20030027808
    Abstract: The present invention is concerned with combinations of a farnesyl transferase inhibitor and a platinum compound for inhibiting the growth of tumor cells and useful in the treatment of cancer.
    Type: Application
    Filed: August 28, 2002
    Publication date: February 6, 2003
    Inventors: Peter Albert Palmer, Ivan David Horak
  • Publication number: 20030022918
    Abstract: The present invention is concerned with combinations of a farnesyl transferase inhibitor and an HER2 antibody for inhibiting the growth of tumor cells and useful in the treatment of cancer.
    Type: Application
    Filed: August 28, 2002
    Publication date: January 30, 2003
    Inventors: Ivan David Horak, Christopher J. Bowden
  • Publication number: 20010004540
    Abstract: A grooved planar DRAM transfer device having a grooved gate formed in a groove in a substrate located between source and drain regions. The grooved gate has sidewall portions and a bottom portion which defines a channel therealong. The bottom portion includes a doped pocket such that the threshold voltage Vt on the bottom portion is substantially less than Vt on the sidewall portions, such that the sidewall portions predominantly control electric current through the device.
    Type: Application
    Filed: January 30, 2001
    Publication date: June 21, 2001
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Gary Bronner, Toshiharu Furukawa, Mark C. Hakey, Steven J. Holmes, David Horak, Jack A. Mandelman
  • Patent number: 6228705
    Abstract: A process for fabricating a semiconductor device. In an exemplary embodiment, the process includes the following steps. The process initially defines a first registration mark associated with a first mask level of the semiconductor device and a second registration mark associated with a second mask level of the semiconductor device. The process then defines a third registration mark associated with a third mask level of the semiconductor device based on the first and second registration marks. Finally, the process aligns the third mask level along a first axis with respect to the first registration mark, and aligns the third mask level along a second axis with respect to the second registration mark. According to various aspects of the invention, the semiconductor fabrication process is used to fabricate DRAM trench cells, or any other type of semiconductor device whose fabrication requires tight overlay alignment between the various levels of the device.
    Type: Grant
    Filed: February 3, 1999
    Date of Patent: May 8, 2001
    Assignee: International Business Machines Corporation
    Inventors: Toshiharu Furukawa, Mark C. Hakey, Steven J. Holmes, David Horak, William H. Ma
  • Patent number: 6221680
    Abstract: The present invention relates to a method for providing patterned recess formation in a previously recessed area of a semiconductor structure, i.e. DRAM trench capacitor, using acid diffusion to selectively activate some, but not all of the acid sensitive material that is filled within the recessed areas of such structures. By employing the method of the present invention, it is possible to recess all the previously recessed areas at the same time providing the same level of recessed acid sensitive material within the previous recessed areas, recess some of the previously recessed areas to a desired level leaving other portions of the structure unrecessed, or recessing the previously recessed areas to contain different levels of the acid sensitive material.
    Type: Grant
    Filed: July 31, 1998
    Date of Patent: April 24, 2001
    Assignee: International Business Machines Corporation
    Inventors: Mark C. Hakey, Steven J. Holmes, David Horak, Toshiharu Furukawa
  • Patent number: 6190988
    Abstract: A bottle-shaped trench capacitor with a buried plate is formed in a controlled etch process. The bottle-shape is fabricated by etching deep trenches from a layered substrate, using the layers as a mask, and covering the side walls of the substrate with protective oxide and nitride layers. With the side walls covered, deep trench etching is then resumed, and a lower trench portion, below the protective layers of the side wall are formed. By diffusing a first dopant in the lower portion of the deep trench region, using the side wall protective layers as a mask, an etch stop is established for a wet etch process at the p/n junction established by the first dopant. The width of the lower trench portion is regulated by the time and temperature of the diffusion. Removing the doped material and applying a second dopant to the lower trench portion establishes a continuous buried plate region between trenches. A capacitor is formed by applying an insulating layer to the trench and filling with a conductor.
    Type: Grant
    Filed: May 28, 1998
    Date of Patent: February 20, 2001
    Assignee: International Business Machines Corporation
    Inventors: Toshiharu Furukawa, Mark C. Hakey, Steven J. Holmes, David Horak, William H. Ma, James M. Never