Abstract: An interline transfer type image sensing device that can be operated at high speed and with low image smear is described. The device incorporates a refractory metal layer which is used for both a light shield over the vertical charge transfer region and as a wiring layer for low resistance strapping of poly crystalline silicon (polysilicon) gate electrodes for the vertical charge transfer region. Plugs provided by a separate metallization layer connect the refractory light shield to the polysilicon gate electrode. These plugs allow high temperature processing after refractory light shield patterning for improved sensor performance without degradation of the polysilicon gate electrode or the refractory lightshield layer.

Abstract: An interline transfer type image sensing device that can be operated at high speed and with low image smear is described. The device incorporates a refractory metal layer which is used for both a light shield over the vertical charge transfer region and as a wiring layer for low resistance strapping of poly crystalline silicon (polysilicon) gate electrodes for the vertical charge transfer region. Plugs provided by a separate metallization layer connect the refractory light shield to the polysilicon gate electrode. These plugs allow high temperature processing after refractory light shield patterning for improved sensor performance without degradation of the polysilicon gate electrode or the refractory lightshield layer.

Abstract: A method for reducing dark current within an image sensor includes applying, at a first time period, a first set of voltages to the phases of gate electrodes of vertical shift registers sufficient to accumulate holes of the vertical shift register, beneath each gate electrode and applying, at a second time period, a second voltage to a first set of the gate electrodes while simultaneously applying a more positive voltage to a second set of gate electrodes, the second voltage being of sufficient potential so holes that were accumulated beneath the second set of gate electrodes during the first time are collected and stored beneath the first set of gate electrodes during the second time period.

Abstract: An image sensor includes a semiconductor substrate; a photosensor having, a first photosensing region including a first stack of one or more layers of transparent materials covering the substrate, the first photosensing region having a spectral response having minima and maxima as a function of wavelength of light; a second photosensing region including a second stack of one or more layers of transparent materials covering the substrate, the second photosensing region having a spectral response having maxima and minima; and a third photosensing region including a third stack of one or more layers of transparent materials covering the substrate, the third photosensing region having a spectral response having maxima and minima; and wherein at least one maximum or minimum of the spectral response of the separate regions is matched with a minimum or maximum such that the average spectral response of the photosensor has less variation with wavelength of light than the individual spectral responses of each of the s

Abstract: An image sensor includes (a) a semiconductor substrate; (b) a photosensor having, i) a first photosensing region including a first stack of one or more layers of transparent materials covering the substrate, each photosensing region having a spectral response having minima and maxima as a function of wavelength of light; ii) a second photosensing region including a second stack of one or more layers of transparent materials covering the substrate, each separate photosensing region having a spectral response having maxima and minima; and iii) a third photosensing region including a third stack of one or more layers of transparent materials covering the substrate, each separate photosensing region having a spectral response having maxima and minima; and (c) wherein at least one maximum or minimum of the spectral response of the separate regions is matched with a minimum or maximum such that the average spectral response of the photosensor has less variation with wavelength of light than the individual spectral

Abstract: A method of manufacturing an image sensor, the method comprises the steps providing a substrate having a gate insulating layer abutting a portion of the substrate; depositing a silicon layer on the gate insulating layer; creating a plurality of openings in the deposited silicon layer for forming a plurality of etched deposited silicon; growing an oxide on first surfaces of the etched deposited silicon which first surfaces initially form a boundary for the openings; coating photoresist in the plurality of openings between the first surfaces of the oxidized silicon; and exposing the photoresist for removing the photoresist which overlies the silicon and retains a portion of the photoresist in the openings and on the first surface of the oxidized silicon.

Abstract: A method of manufacturing an image sensor, the method comprises the steps providing a substrate having a gate insulating layer abutting a portion of the substrate; depositing a silicon layer on the gate insulating layer; creating a plurality of openings in the deposited silicon layer for forming a plurality of etched deposited silicon; growing an oxide on first surfaces of the etched deposited silicon which first surfaces initially form a boundary for the openings; coating photoresist in the plurality of openings between the first surfaces of the oxidized silicon; and exposing the photoresist for removing the photoresist which overlies the silicon and retains a portion of the photoresist in the openings and on the first surface of the oxidized silicon.

Abstract: A method and apparatus of forming adjacent, non-overlapping CCD electrodes within an image sensing device such the electrodes are U-shaped. The device provided by the disclosed method employs a substrate with a gate dielectric layer formed on a surface of the substrate with a plurality of phases created within the CCD. A deposited silicon layer is placed on the surface of the CCD and a mask is used to cover areas other than the first set of electrodes. Etching takes places leaving the mask areas to the deposited silicon and a set of side walls to the remaining deposited silicon are then oxidized. A first set of electrodes by forming an electrode layer placed over the CCD. CMP is employed to remove remaining deposited silicon layer as well as portions of the electrode layer such that the side walls remain vertical portions to electrode layer remaining in the side walls. The process is then repeated by placing another electrode material layer and another CMP process leaving two sets of adjacent U-shaped gates.

Abstract: A method and apparatus of making high energy implanted photodiode that is self aligned with the transfer gate, the high energy implant is defined by providing a substrate, or well, of a first conductivity type, defining a charge coupled device within the substrate, or well, such that gate electrode layers are allowed to exist over areas to contain photodiodes during construction of the charge coupled device, patterning a masking layer to block high energy implants such that openings in the masking layer are formed over the areas of the photodiodes, anisotropically etching down through the gate electrode over the photodiodes to the gate dielectric material, implanting photodiodes with high-energy ions of a second conductivity type opposite the first conductivity type and creating a pinned photodiode by employing a shallow implant of the first conductivity type. The apparatus made by this method yields a photodiode employing high energy ions to form the P/N junction that is self aligned with the transfer gate.

Abstract: A method and apparatus of forming adjacent, non-overlapping CCD electrodes within an image sensing device such the electrodes are U-shaped. The device provided by the disclosed method employs a substrate with a gate dielectric layer formed on a surface of the substrate with a plurality of phases created within the CCD. A deposited silicon layer is placed on the surface of the CCD and a mask is used to cover areas other than the first set of electrodes. Etching takes places leaving the mask areas to the deposited silicon and a set of side walls to the remaining deposited silicon are then oxidized. A first set of electrodes by forming an electrode layer placed over the CCD. CMP is employed to remove remaining deposited silicon layer as well as portions of the electrode layer such that the side walls remain vertical portions to electrode layer remaining in the side walls. The process is then repeated by placing another electrode material layer and another CMP process leaving two sets of adjacent U-shaped gates.

Abstract: A method and apparatus of manufacturing an array of closely spaced electrodes wherein a semiconductor surface having a plurality cells that are capable of storing charge is fabricated such that there are a plurality of closely spaced electrodes associated with the cells and placing insulation regions between the closely spaced electrodes. The insulating regions are preferably made out of silicon dioxide and the material to form the electrodes is selected as one that is not oxidizable to silicon dioxide. The preferred embodiment uses an electrode material indium tin oxide. A barrier region is provided to assist charge transfer in the preferred embodiment the barrier region is preferably edge aligned to one of the electrodes.

Abstract: A method of making a color filter array of uniformly thick organic pigments on a first substrate includes coating an adhesion promoting layer over the first substrate; coating the adhesion promoting layer with an intermediate layer; coating the intermediate layer with a photoresist layer; and exposing and developing the photoresist layer to form an-array of first openings. The substrate further includes etching the intermediate layer, using the photoresist layer as a mask, to form an array of second openings in the intermediate layer which are wider than the corresponding first openings in the photoresist layer; depositing an organic pigment layer on the photoresist layer; lifting off the photoresist layer and overlying organic pigment layer; and removing the intermediate layer, leaving the organic pigment layer in the position of the second openings.

Abstract: A method of making a color filter array on a first substrate having an array of pixels, comprising the steps of: depositing and patterning a photoresist layer on the substrate layer to form selected openings over pixels in the array; providing a transferable colorant layer on a second substrate and positioning such transferable layer in transferable relationship with the first substrate; transferring the colorant material to the photoresist layer on the first substrate, removing the patterned photoresist layer by chemical mechanical polishing, leaving behind the colorant material in the position of the openings over the selected pixels.

Abstract: A method of making a color filter array on a first substrate having an array of pixels, comprising the steps of: depositing and patterning a photoresist layer on the substrate layer to form selected openings over pixels in the array; providing a plurality of two or more transferable colorant layers on a second substrate and positioning such transferable layers in transferable relationship with the first substrate; simultaneously transferring the colorant materials from the plurality of transferable colorant layers to the photoresist layer on the first substrate; and removing the patterned photoresist layer leaving behind the colorant materials in the position of the openings over the selected pixels.

Abstract: A methodology for producing an edge aligned implant beneath an electrode with reduced lateral spread, comprising the steps of: providing a dielectric layer on a substrate; forming an etch-stop layer on the dielectric layer; forming a sacrificial material layer on the etch-stop layer; patterning the sacrificial layer with openings to expose the etch-stop layer and which openings corresponding to gate electrode positions; implanting dopant atoms through the opening into the substrate in regions adjacent to at least one edge of the opening in the sacrificial layer; depositing electrode material into the openings and onto the sacrificial layer; forming an electrode layer, either by itself of with another layer deposited or grown over it to allow alteration to provide an etch rate differential. The material that etches relatively slowly becomes or protects the gate electrode region. The alteration is done by a process such as diffusion or irradiation.

Abstract: A fully self-aligned, charge coupled device (CCD) comprises a semiconductor substrate having implanted barrier and/or storage regions, an insulating dielectric layer disposed over the substrate, a first layer of closely spaced electrodes in self-alignment with at least one implant underneath the first electrodes, a second layer of closely spaced electrodes in self-alignment with the first electrodes and with at least one implant underneath the second electrodes also in self-alignment with the first electrodes.

Abstract: A fully self-aligned, charge coupled device (CCD) comprises a semiconductor substrate having implanted barrier and/or storage regions, an insulating dielectric layer disposed over the substrate, a first layer of closely spaced electrodes in self-alignment with at least one implant underneath the first electrodes, a second layer of closely spaced electrodes in self-alignment with the first electrodes and with at least one implant underneath the second electrodes also in self-alignment with the first electrodes.

Abstract: An image sensor including CCDs, a charge coupled device (CCD) or shift register. Each CCD structure is formed of a set of electrodes wherein at least one electrode of each set is formed of a connected layer of opaque conducting material.

Abstract: An interline transfer type area image sensor which operates in a non-interlaced mode and has an array of columns and rows of photoreceptor in which charge from each pixel is transferred into a stage of a vertical two-phase CCD shift register formed by adjacent electrodes of the CCD. Each electrode of a stage has a separate voltage clock. An ion implanted vertical transfer barrier region is formed under an edge of each electrode.

Abstract: In interline transfer type image sensing devices, image smear is produced when light is allowed to penetrate into the charge transfer regions of the device. In this disclosure, a device with improved light shielding, and, hence, reduced smear, is described. The device incorporates WSi.sub.x (wherein x<2) refractory opaque material for the light shield which is placed in close proximity to the semiconductor surface, and a flowed glass planarization layer is disposed over the light shield.