Patents by Inventor David M. Brown

David M. Brown has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5914316
    Abstract: A method is disclosed for inhibiting intimal hyperplasia in a warm-blooded mammal which comprises administering topically at the site and time of a vascular injury induced by arterial intervention in said mammal a small but inhibitorily effective amount of tissue factor pathway inhibitor (TFPI) sufficient to inhibit said intimal hyperplasia.
    Type: Grant
    Filed: September 25, 1996
    Date of Patent: June 22, 1999
    Assignee: Washington University
    Inventors: David M. Brown, Tze-Chein Wun, Roger K. Khouri
  • Patent number: 5873676
    Abstract: A coring rod support wheel that has a relatively large smooth outer surface and a hollow hub that is rigidly held within it. The axis of the hollow hub is parallel to the axis of the wheel but not necessarily the same as the axis of the wheel. The diameter of the hub is sufficient for a coring rod to slide freely through it. Once the coring rod has been slid through the hub, the coring rod any coring knife attached to it are supported and guided by the wheel.
    Type: Grant
    Filed: February 5, 1997
    Date of Patent: February 23, 1999
    Inventor: David M. Brown
  • Patent number: 5837872
    Abstract: This invention relates to an improved process for preparing selected N-acyl-aminodiacids such as lauroyl glutamic acid.
    Type: Grant
    Filed: November 13, 1995
    Date of Patent: November 17, 1998
    Assignee: Hoechst Celanese Corporation
    Inventors: David M. Brown, Mohammad A. Khadim, Narayan D. Sadanani, April Yeager
  • Patent number: 5822256
    Abstract: A method and circuitry are described that permit one to utilize a partially functional integrated circuit memory. A memory array is segregated into separate blocks that can each be isolated to minimize the amount of the memory array rendered unusable by a defect. Circuitry is also provided to program memory cells within the array to one of at least three amounts of charge and thereby increase the amount of storage provided by the remaining functional blocks.
    Type: Grant
    Filed: March 5, 1997
    Date of Patent: October 13, 1998
    Assignee: Intel Corporation
    Inventors: Mark E. Bauer, Steven Wells, David M. Brown, Johnny Javanifard, Sherif Sweha, Robert N. Hasbun, Gary J. Gallagher, Mamun Rashid, Rodney R. Rozman, Glen Hawk, George Blanchard, Mark Winston, Richard D. Pashley
  • Patent number: 5749088
    Abstract: A memory card includes a plurality of memories, each having an array that includes a first block and a second block. Control circuitry is coupled to the array for controlling memory operations of the array. A block write protect circuit is provided for storing block lock data to selectively lock control circuitry from accessing the array for the memory operations. The block write protect circuit locks the control circuit from accessing (1) the first block when the block write protect circuit stores a first datum of the data and (2) the second block when the block write protect circuit stores a second datum of the data. A control input is coupled to the block write protect circuit for applying a control signal to enable the block write protect circuit to lock the control circuitry in accordance with the data. The memory card further includes a register circuit coupled to the control input of each of the plurality of memories for storing a control datum to generate the control signal.
    Type: Grant
    Filed: April 22, 1997
    Date of Patent: May 5, 1998
    Assignee: Intel Corporation
    Inventors: David M. Brown, Russell D. Eslick, Kurt B. Robinson
  • Patent number: 5524231
    Abstract: A nonvolatile memory card includes first memory and a second memory. The first memory includes a first block and a second block, each can be addressed by a first block address and a second block address, respectively. The second memory includes a third block and a fourth block, each can be addressed by a third block address and a fourth block address, respectively. An address table is used for storing (1) each of the first, second, third, and fourth block addresses and (2) a first, a second, a third, and a fourth status data, each indicating the operational condition of one of the first, second, third, and fourth blocks, respectively. Each of the first, second, third, and fourth status data can be in a first state and a second state. When a particular one of the first, second, third, and fourth blocks is non-operational, the corresponding one of the first, second, third, and fourth status data is at the first state.
    Type: Grant
    Filed: June 30, 1993
    Date of Patent: June 4, 1996
    Assignee: Intel Corporation
    Inventor: David M. Brown
  • Patent number: 5505558
    Abstract: Piping is laid horizontally underground, by horizontally entering a rod that is longer than the site, into the site, at the desired depth of the center of the piping tunnel, and then horizontally pushing that rod through the site, until its front end exits the back of the site. Then attaching three rods near the front end of the first rod, and bringing all four rods back through the site, until the first rod exits the front of the site, and the other three rods are embedded in their own paths in the site, with their front ends extending into the front of the site, and their back ends extending into the back of the site. Then, at the back of the site, attaching a push-pull type earth coring knife to the middle of the three rods, and connecting a front cutting and shielding means, between the two outer rods, so that it is situated immediately behind the front cutting portion of the coring knife.
    Type: Grant
    Filed: October 11, 1994
    Date of Patent: April 9, 1996
    Inventor: David M. Brown
  • Patent number: 5498106
    Abstract: The coring rod realignment tool of the present invention is comprised of a body that has a fixed arm which protrudes beyond one of its sides, and a sliding arm that protrudes beyond an opposite side. The slideable arm can be positioned so that its end that protrudes out from the body is in horizontal alignment with the protruding portion of the fixed arm, and it can be moved so that its end that protrudes out from the body is not in horizontal alignment with the end of the fixed arm that protrudes from the body, but is parallel to that end. The portion of the fixed arm, and the portion of the slideable arm, that protrudes out from the body, is coupleable a coring rod of the type used in conjunction with a coring knife, in the installation of horizontal underground piping.
    Type: Grant
    Filed: December 2, 1994
    Date of Patent: March 12, 1996
    Inventor: David M. Brown
  • Patent number: 5463094
    Abstract: A process for a high temperature, solvent free quaternization of certain tertiary amines using dimethylsulfate to produce quaternary ammonium methyl sulfates which may be used in fabric softening and other applications, is disclosed.
    Type: Grant
    Filed: May 23, 1994
    Date of Patent: October 31, 1995
    Assignee: Hoechst Celanese Corporation
    Inventors: David M. Brown, Erich M. Gatter, Cheryl A. Littau
  • Patent number: 5429677
    Abstract: A device for adjustably providing protection to adjacent surfaces while painting is described. This device comprises a height adjustable handle connected to a masking element by an articulating hinged element. The masking element comprises a flat, rectangular guide with a series of movable fins held to one of the longer edges thereof, by a pair of opposable gripping elements. These fins can be moved and adjusted to fit in and around a clap board sided building, for example. Thus, when the device is placed on the clap board siding, the fins fit perfectly to this siding and any adjacent edge will be protected by the masking element during the painting cycle.
    Type: Grant
    Filed: May 16, 1994
    Date of Patent: July 4, 1995
    Inventor: David M. Brown
  • Patent number: 5428579
    Abstract: A flash memory card is described. One flash memory card has circuitry for providing a ready output signal that indicates a first in time transition from a busy mode to a ready mode by either a first flash memory or a second flash memory of the flash memory card. One flash memory card has a power control register that is used to place certain flash memories in a power down mode. One flash memory card retains information in a power control register from a time prior to the entering of a global power down mode to a time after exiting of the global power down mode. One flash memory card has jumpers for indicating how many flash memories are present on the flash memory card.
    Type: Grant
    Filed: August 31, 1994
    Date of Patent: June 27, 1995
    Assignee: Intel Corporation
    Inventors: Kurt B. Robinson, Russell D. Eslick, Lawrence M. Leszczynski, David M. Brown, Lily C. Pao, Brian L. Dipert
  • Patent number: 5422855
    Abstract: A flash memory card is described. One flash memory card has addressable circuitry for selectively causing first, second, and third flash memories to operate in an active mode concurrently.
    Type: Grant
    Filed: September 30, 1994
    Date of Patent: June 6, 1995
    Assignee: Intel Corporation
    Inventors: Russell D. Eslick, David M. Brown, Lily C. Pao, Brian L. Dipert, Kurt B. Robinson
  • Patent number: 5388248
    Abstract: A flash memory card is described which has a plurality of flash memories, each having a ready/busy output for indicating whether its respective one of the plurality of flash memories is busy or ready. A register circuit is provided for storing a plurality of mask data. A mode circuit is provided for choosing one of a first mode and a second mode, wherein a first mode signal is produced if the first mode is chosen and a second mode signal is produced if the second mode is chosen. A logic circuit is provided for performing logical operations with respect to the ready/busy output for each of the plurality of flash memories and the mask data in accordance with whether the first mode signal or the second mode signal is produced. If the first mode is chosen, the logic circuit produces a ready signal output for the flash memory card only if the ready/busy output of all the plurality of flash memories is ready.
    Type: Grant
    Filed: February 16, 1994
    Date of Patent: February 7, 1995
    Assignee: Intel Corporation
    Inventors: Kurt B. Robinson, Russell D. Eslick, Markus A. Levy, David M. Brown, Lily C. Pao, Brian L. Dipert
  • Patent number: 5385256
    Abstract: A push-on filler neck cap for a fill passageway of a tank. The cap is provided with a push top and a dependent housing sized to fit within the fill passageway and with a fill passageway seal that is located at the lower inserted end of the housing and wherein the can is also provided with a restraining mechanism located between the push top and the fill passageway seat for securing the cap to the passageway in a sealed manner. The restraining mechanism is defined by a plurality of lugs which: 1) engage into a recess in the fill passageway; 2) pivot outward from the housing to engage the recess in response to movement of a spring biased lever pivotedly mounted to the push top with the recess; and (3) are biased to pivot outwardly for engagement with the recess by a spring located within the housing, which spring also urges the seal into its sealing relationship within the fill passageway.
    Type: Grant
    Filed: January 14, 1993
    Date of Patent: January 31, 1995
    Assignee: Stant Manufacturing Inc.
    Inventor: David M. Brown
  • Patent number: 5379401
    Abstract: A flash memory card is described which includes a first flash memory and a second flash memory. The first flash memory includes an unmasked first output that enters a first state if the first flash memory is ready and a second state if the first flash memory is busy. The second flash memory includes an unmasked second output that enters the first state if the second flash memory is ready and the second state if the second flash memory is busy. The flash memory card also includes a circuit for selectively providing one of (1) a masked first output (2) the unmasked first output, (3) a masked second output, and (4) the unmasked second output. A latch provides a first ready output signal for the flash memory card. The first ready output signal indicates a first transition from the second state to the first state by one of the unmasked first output of the first flash memory and the unmasked second output of the second flash memory.
    Type: Grant
    Filed: February 16, 1994
    Date of Patent: January 3, 1995
    Assignee: Intel Corporation
    Inventors: Kurt B. Robinson, Russell D. Eslick, Markus A. Levy, David M. Brown, Lily C. Pao, Brian L. Dipert
  • Patent number: 5375222
    Abstract: A flash memory card is described which has a ready/busy mask register. First and second flash memories of the flash memory card have respective first and second outputs indicating ready or busy status for the first and second memories. The ready/busy mask register contains mask data. Logic circuitry performs (1) a first logical operation between a first output and a first mask datum to produce a first masked output, (2) a second logical operation between a second output and a second mask datum to produce a second masked output, and (3) a third logical operation between the first masked output and the second masked output to produce a flash memory card ready/busy output. The flash memory card has circuitry for providing a ready output signal that indicates a first (in time) transition from a busy mode to a ready mode by either the first flash memory or the second flash memory of the flash memory card.
    Type: Grant
    Filed: March 31, 1992
    Date of Patent: December 20, 1994
    Assignee: Intel Corporation
    Inventors: Kurt B. Robinson, Russell D. Eslick, Markus A. Levy, David M. Brown, Lily C. Pao, Brian L. Dipert
  • Patent number: 5329491
    Abstract: A nonvolatile memory card includes a power supply input for receiving a device power supply voltage for the memory card and a plurality of memories arranged in an array. Each of the plurality of memories receives the device power supply voltage from the power supply input. Each of the plurality of memories receives a device power supply voltage indication signal that indicates voltage level of the device power supply voltage and configures circuitry within each of the plurality of memories to operate in accordance with the voltage level of the device power supply voltage. A voltage detection circuit is coupled to the power supply input for detecting the voltage level of the device power supply voltage and for generating the device power supply voltage indication signal.
    Type: Grant
    Filed: June 30, 1993
    Date of Patent: July 12, 1994
    Assignee: Intel Corporation
    Inventors: David M. Brown, David S. Brannam, Russell D. Eslick
  • Patent number: 5122442
    Abstract: The method for forming an image which comprisesI). providing a mesh fabric substrate, andII). coating said substrate with a light sensitive screen printing composition which comprises in admixtureA). at least one substantially water soluble binder resin component comprising an admixture of polyvinyl alcohol and polyvinyl acetate in an amount of from about 33% to about 90% polyvinyl alcohol and from about 10% to about 67% polyvinyl acetate based on the weight of the resin component, in sufficient amount to bind the composition components in a substantially uniform film when the composition is coated on a substrate and dried; andB). a photosensitive component in sufficient amount to substantially, uniformly photosensitize the composition,C).
    Type: Grant
    Filed: July 28, 1989
    Date of Patent: June 16, 1992
    Assignee: Hoechst Celanese Corporation
    Inventors: Gerald Moskowitz, David M. Brown
  • Patent number: 5114035
    Abstract: A vehicle radiator cap for closing a radiator filler neck is disclosed. The radiator cap includes a central rivet for securing a crown, a bell housing, and a discoid spring and having a flared shank permitting free turning of the crown relative to the primary sealing gasket. The cap further includes a pressure spring nested within the bell housing and centered directly above an annular valve seat in the radiator filler neck. The upper turn of the spring nests in the shoulder region of the bell housing and the bottom turn biases a seal support plate against the annular valve seat. The seal support plate has an integrally formed cylinder having a lip which retains a vacuum seal in sealing relationship with the bottom surface of the seal support plate.
    Type: Grant
    Filed: October 31, 1991
    Date of Patent: May 19, 1992
    Assignee: Epicor Industries, Inc.
    Inventor: David M. Brown
  • Patent number: RE36557
    Abstract: A push-on filler neck cap for a fill passageway of a tank. The cap is provided with a push top and a dependent housing sized to fit within the fill passageway and with a fill passageway seal that is located at the lower inserted end of the housing and wherein the .[.can.]. .Iadd.cap .Iaddend.is also provided with a restraining mechanism located between the push top and the fill passageway .[.seat.]. .Iadd.seal .Iaddend.for securing the cap to the passageway in a sealed manner. The restraining mechanism is defined by a plurality of lugs which: 1) engage into a recess in the fill passageway; 2) pivot outward from the housing to engage the recess in response to movement of a spring biased lever pivotedly mounted to the push top with the recess; and (3) are biased to pivot outwardly for engagement with the recess by a spring located within the housing, which spring also urges the seal into its sealing relationship within the fill passageway.
    Type: Grant
    Filed: January 31, 1997
    Date of Patent: February 8, 2000
    Assignee: Stant Manufacturing Inc.
    Inventor: David M. Brown