Abstract: An embodiment of this invention pertains to a versatile and flexible logic element and logic array block (“LAB”). Each logic element includes a programmable combinational logic function block such as a lookup table (“LUT”) and a flip-flop. Within the logic element, multiplexers are provided to allow the flip-flop and the LUT to be programmably connected such that either the output of the LUT may be connected to the input of the flip-flop or the output of the flip-flop may be connected to the input of the LUT. An additional multiplexer allows the output of the flip-flop in one logic element to be connected to the input of a flip-flop in a different logic element within the same LAB. Output multiplexers selects between the output of the LUT and the output of the flip-flop to generate signals that drive routing lines within the LAB and to routing lines external to the LAB.

Abstract: A robot lawmnower includes a body, a drive system carried by the body, at least one caster wheel supporting the body, a grass cutter carried by the body, a controller in communication with the drive system, and a bump sensor in communication with the controller. The controller is configured to maneuver the robot to turn in place and to redirect the robot in response to the bump sensor sensing contact with an obstacle. The drive system is configured to maneuver the robot across a lawn and includes differentially driven right and left drive wheels positioned rearward of a transverse center axis defined by the body. The at least one caster wheel is positioned substantially forward of the right and left drive wheels, and the grass cutter is positioned at least partially forward of the right and left drive wheels and at least partially behind the at least one caster wheel.

Abstract: An embodiment of this invention pertains to a versatile and flexible logic element and logic array block (“LAB”). Each logic element includes a programmable combinational logic function block such as a lookup table (“LUT”) and a flip-flop. Within the logic element, multiplexers are provided to allow the flip-flop and the LUT to be programmably connected such that either the output of the LUT may be connected to the input of the flip-flop or the output of the flip-flop may be connected to the input of the LUT. An additional multiplexer allows the output of the flip-flop in one logic element to be connected to the input of a flip-flop in a different logic element within the same LAB. Output multiplexers selects between the output of the LUT and the output of the flip-flop to generate signals that drive routing lines within the LAB and to routing lines external to the LAB.

Abstract: An embodiment of this invention pertains to a versatile and flexible logic element and logic array block (“LAB”). Each logic element includes a programmable combinational logic function block such as a lookup table (“LUT”) and a flip-flop. Within the logic element, multiplexers are provided to allow the flip-flop and the LUT to be programmably connected such that either the output of the LUT may be connected to the input of the flip-flop or the output of the flip-flop may be connected to the input of the LUT. An additional multiplexer allows the output of the flip-flop in one logic element to be connected to the input of a flip-flop in a different logic element within the same LAB. Output multiplexers selects between the output of the LUT and the output of the flip-flop to generate signals that drive routing lines within the LAB and to routing lines external to the LAB.

Abstract: An embodiment of this invention pertains to a 3-sided routing architecture to interconnect function blocks, such as logic array blocks (“LABs”), within a programmable logic device (“PLD”). In the 3-sided routing architecture, inputs and outputs on a first side of a function block connect to a first channel, and inputs and outputs on a second side of the function block connect to a second channel where the second side is opposite the first side. Inputs and outputs on a third side of the function block connect to a third channel. A fourth channel associated with a fourth side of the function block, the fourth side opposite the third side, is coupled only to the first channel and the second channel. In one configuration, the inputs and outputs on each of the first side, the second side, and the third side have an equal number of inputs and outputs. In this configuration, each of the first channel, the second channel, and the third channel have the same width.

Abstract: A process for dyeing certain textile fibers, utilizing vat acid dyeing and specific additional (second) reducing agents such as ?-hydroxyalkylsulfinic acids, their salts and 1,2,4-trithiolane, resulting in excellent depth of shade and washfastness, is provided.

Abstract: An embodiment of this invention pertains to a versatile and flexible logic element and logic array block (“LAB”). Each logic element includes a programmable combinational logic function block such as a lookup table (“LUT”) and a flip-flop. Within the logic element, multiplexers are provided to allow the flip-flop and the LUT to be programmably connected such that either the output of the LUT may be connected to the input of the flip-flop or the output of the flip-flop may be connected to the input of the LUT. An additional multiplexer allows the output of the flip-flop in one logic element to be connected to the input of a flip-flop in a different logic element within the same LAB. Output multiplexers selects between the output of the LUT and the output of the flip-flop to generate signals that drive routing lines within the LAB and to routing lines external to the LAB.

Abstract: An embodiment of this invention pertains to a wire that interconnects multiple function blocks within a programmable logic device (“PLD”). An electrically optimum physical length is determined for the wire. A wire having the electrically optimum physical length transmits a signal down the wire as fast as possible. Some of the wires used in the PLD have a physical length substantially the same as the electrically optimum physical length or an adjustment of the electrically optimum physical length to account for non-electrical considerations. The physical length, as used herein, is the measured length of the wire. A logical length of the wire, as used herein, is the number of function blocks that the wire spans. Given that the function blocks have a different height and width, the logical length of the wire varies depending on the orientation of the wire. A routing architecture is an array that includes rows and columns of function blocks.

Abstract: A process for dyeing certain textile fibers, utilizing vat acid dyeing and specific additional (second) reducing agents such as &agr;-hydroxyalkylsulfinic acids, their salts and 1,2,4-trithiolane, resulting in excellent depth of shade and washfastness, is provided.

Abstract: A process for dyeing certain textile fibers, utilizing vat acid dyeing and specific additional (second) reducing agents such as &agr;-hydroxyalkylsulfinic acids, their salts and 1,2,4-trithiolane, resulting in excellent depth of shade and washfastness, is provided.

Abstract: An embodiment of this invention pertains to a 3-sided routing architecture to interconnect function blocks, such as logic array blocks (“LABs”), within a programmable logic device (“PLD”). In the 3-sided routing architecture, inputs and outputs on a first side of a function block connect to a first channel, and inputs and outputs on a second side of the function block connect to a second channel where the second side is opposite the first side. Inputs and outputs on a third side of the function block connect to a third channel. A fourth channel associated with a fourth side of the function block, the fourth side opposite the third side, is coupled only to the first channel and the second channel. In one configuration, the inputs and outputs on each of the first side, the second side, and the third side have an equal number of inputs and outputs. In this configuration, each of the first channel, the second channel, and the third channel have the same width.

Abstract: A process for dyeing certain textile fibers, utilizing vat acid dyeing and specific additional (second) reducing agents such as &agr;-hydroxyalkylsulfinic acids, their salts and 1,2,4-trithiolane, resulting in excellent depth of shade and washfastness, is provided.

Abstract: A system and method providing a central database of resumes including audio visual files of responses by an applicant to interview questions stored in a central database that may be searched by potential employers who may then review the stored resumes and stored audio-visual files. The stored audio-visual files thus displayed provide the potential employer with the opportunity to observe the demeanor of the applicant while the applicant responds to the interview question, thus providing a virtual interview.

Abstract: An embodiment of this invention pertains to a wire that interconnects multiple function blocks within a programmable logic device (“PLD”). An electrically optimum physical length is determined for the wire. A wire having the electrically optimum physical length transmits a signal down the wire as fast as possible. Some of the wires used in the PLD have a physical length substantially the same as the electrically optimum physical length or an adjustment of the electrically optimum physical length to account for non-electrical considerations. The physical length, as used herein, is the measured length of the wire. A logical length of the wire, as used herein, is the number of function blocks that the wire spans. Given that the function blocks have a different height and width, the logical length of the wire varies depending on the orientation of the wire.

Abstract: A movable transparent panel for reconfigurable office partitions and the like is adapted for floor-to-ceiling applications which include a floor track shaped to be supported on a floor surface, and a ceiling track shaped to be supported on a ceiling surface. A panel frame is supported in a normally vertical orientation between the floor track and the ceiling track. The panel frame has vertically spaced-apart upper and lower horizontal members with a pair of vertical side members interconnecting the upper and lower horizontal members and extending therebetween to define a generally quadrilateral opening. The upper horizontal member is operably connected to the ceiling track, and the lower horizontal member is operably connected with the floor track. A substantially transparent sheet is removably connected to the frame and extends across at least the portion of the opening.

Abstract: An electronic camera captures images representing a variety of subjects and categorizes the image according to subject matter. The camera comprises an image sensor for capturing an image, a converter stage for converting the image into digital image data, and a memory for storing a plurality of categories providing classification of the images by subject. A processor in the camera has the capability of assigning the plurality of categories to the images captured by the camera, with each category providing a subject classification for the images. A user selects one or more categories for a plurality of images prior to capture, and an output image signal is then generated including the digital image data corresponding to a captured image and the particular category selected by the user. The categories can be default identifiers stored in the memory, or can be names, text (i.e., account number), and/or graphics overlays (i.e.

Abstract: Leuco vat dyes are employed to produce brighter shades from oxidative dyes in oxidative haircoloring systems and processes.

Abstract: Connected blocks of micro-instructions are reloaded to a register file in a sequencer, which is used for controlling an interfacing between a host computer, a magnetic disk-drive, and a buffer memory. This provides for efficiently reloading sequencer microinstructions into a relatively small sequencer-memory space and minimizes use of external system resources for reloading microinstructions. This avoids the sequencer having to remain in a wait condition until a system processor completes higher priority tasks and becomes available for reloading instructions to memory cells of the sequencer.The method includes storing a plurality of blocks of microinstructions in a buffer memory device. A first block of microinstructions is stored in a register file. A second block of microinstructions stored within the buffer memory device is called using microinstructions contained within the first block of microinstructions.

Abstract: A retaining system holds sheet material smooth and flat upon a mattress against the movements of a bed occupant. Opposing edges of the sheet are provided with hems for removably receiving elongate rigid slats or battens. At the midpoint of each batten is an attaching means. An aperture in each hem provides access to the attaching means. A flaccid cord or tape assembly is passed beneath the mattress. The cord is provided at its ends with connectors for connection to the attaching means on the battens. The cord is pulled taut and held under tension. This pulls the battens down along the sides of the mattress and holds the sheet smooth and taut against the mattress.