Patents by Inventor David M. Lewis

David M. Lewis has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5280601
    Abstract: A method for temporarily storing and retrieving 8-bit character information data for a magnetic disk information storage system in a number of 4.times.n DRAM buffer memory configurations. A virtual memory address for each of said 8-bit information characters is provided and each of the characters are organized into a 16-byte block. The virtual memory addresses are translated to corresponding addresses of memory locations in said 4.times.n buffer memory unit for storage of 4-bit groups of said 16-byte block in said 4.times.n DRAM buffer memory by selecting a row address for storage of said 16-byte block, by selecting a base column address for said 16-byte block, and by successively incrementing said base column address by 4 to provide additional column address for successive 4-bit groups of said 16-byte blocks. Each of said 4-bit groups of said 16-byte block are transferred through a 4-bit data bus to the various predetermined address locations in one of said 4.times.
    Type: Grant
    Filed: March 2, 1990
    Date of Patent: January 18, 1994
    Assignee: Seagate Technology, Inc.
    Inventors: Dhiru N. Desai, David M. Lewis
  • Patent number: 5255383
    Abstract: A method and a system for providing a skewed clock signal which is used for latching a data signal received from a memory into a read-data latch. A control signal latch and a control-signal buffer provide a control sign to the memory. A read-data buffer feeds a data signal from the memory to a read-data latch, which is provided with skewed read-clock signal. A read-clock delay circuit provides a clock signal to the read-data latch, and delays the read clock signal a period of time approximately equal to the signal propagation delay time of the read data buffer and the propagation delay time associated with transmitting a signal from the output terminal of said control signal latch circuit to the control-signal input terminal of the memory.
    Type: Grant
    Filed: April 15, 1991
    Date of Patent: October 19, 1993
    Assignees: Seagate Technology, Inc., AT&T Company
    Inventors: David M. Lewis, Nimesh Parikh
  • Patent number: 5071641
    Abstract: A method of setting hair which comprises treating the hair with an aqueous solution of a metal S-thiosulphato-derivative, and curing the derivative. The hair is treated at temperatures of from 15.degree.-60.degree. C. with aqueous solutions containing Bunte salt derivatives, covered with impermeable material, and left to react at from 20.degree.-60.degree. C. before finally rinsing off with water. The permanent setting is as good as with conventional thioglycollate compounds, but the noxious smells associated with the latter are absent.
    Type: Grant
    Filed: June 12, 1989
    Date of Patent: December 10, 1991
    Assignee: University of Leeds Industrial Services Limited
    Inventor: David M. Lewis
  • Patent number: 5045811
    Abstract: An oscillator circuit is tuned to the frequency of reference pulses, for example, the spindle index pulses of a rotating magnetic storage system. A ring oscillator circuit includes a series transmission gate. The transmission gate is controlled by the output signal from a programmable delay line to interrupt operation of the ring oscillator and, in effect, provide fine tuning of the ring oscillator frequency in programmed steps. The output signal of the ring oscillator is divided down in a programmable divider, which provides a coarse frequency adjustment for an output pulse signal provided by the divider. Output signals from the divider are also provided as inputs to the programmable delay line. The frequency of the output pulse signal is compared to the frequency of the reference pulses to generate control signals for the programmable delay line. The control signals are generated by a microprocessor.
    Type: Grant
    Filed: February 2, 1990
    Date of Patent: September 3, 1991
    Assignee: Seagate Technology, Inc.
    Inventor: David M. Lewis
  • Patent number: 5043606
    Abstract: A programmable register stores a control bit for settting the logic polarity of an I/O signal at an I/O terminal of an integrated circuit. The I/O polarity control signal is combined in an exclusive-OR logic circuit with the I/O signal to provide a given logic polarity for the I/O signal. For a bi-directional I/O terminal, two exclusive-OR gates are used, one for controlling polarity of output signals from the integrated circuit to the I/O terminal and the other for controlling the polarity of input signals to the integrated circuits which are received at the I/O terminal. The control of the I/O signal polarity is particularly useful for a disk-drive controller which interfaces with different magnetic disk drive units, having different I/O signal polarity requirements.
    Type: Grant
    Filed: March 30, 1990
    Date of Patent: August 27, 1991
    Assignee: Seagate Technology, Inc.
    Inventor: David M. Lewis
  • Patent number: 4950301
    Abstract: A method of treating natural or synthetic polyamide or cellulosic textiles comprises applying an effective amount of an arylating agent, preferably to the dyebath. The arylating agent may be of a formula Ar--(X--Y).sub.n wherein Ar is an aromatic residue such as substituted or unsubstituted benzene or naphthalene ring; X is a bridging group such as --SO.sub.2, --CO-- or --NH--; Y is a reactive group; and n is 1 to 3. The arylating agent reduces fibre damage of natural polyamide fibres during dyeing and proves the degree of dye fibre reaction in dyeing of polyamide and cellulosic textiles to improve wet fastness. Furthermore, on cellulosic textiles, wet and dry wrinkle recovery properties are improved as is the yield of reactive dye fixation. On keratinous fibres shrink resistant and moth resistant properties are improved also. Certain novel arylating compounds are disclosed also.
    Type: Grant
    Filed: December 22, 1988
    Date of Patent: August 21, 1990
    Assignee: Wool Development International Limited
    Inventor: David M. Lewis
  • Patent number: 4835726
    Abstract: An apparatus simulates an electronic circuit having a number of circuit elements, each being coupled to an associated set of nodes, a pair of which are capable of carrying a current therebetween, such as transistors. The apparatus has a selection device to select a circuit element to be simulated. A first memory is coupled with the selection device for storing the characteristics of each of the transistors. A transfer device transfers the characteristics from the first memory to a first register. A second memory stores the voltage present at each of the nodes, while a retrieval device retrieves the nodal voltages from the second memory and transfers them to a second register. Coupled to the first and second registers is a computation unit to ascertain the current flowing between the current carrying nodes and the subsequent change of voltage at those nodes. The apparatus carries out the simulation over a series of incremental time steps thereby providing an analog simulation of the circuit.
    Type: Grant
    Filed: June 26, 1986
    Date of Patent: May 30, 1989
    Assignee: University of Toronto Innovations Foundation
    Inventor: David M. Lewis
  • Patent number: 4815024
    Abstract: An apparatus is disclosed to simulate an electronic circuit having a number of circuit elements, each being coupled to an associated set of nodes, a pair of which are capable of carrying a current therebetween, such as transistors. The apparatus has a selection device to select a circuit element to be simulated. A first memory is coupled with the selection device for storing the characteristics of each of the transistors. A transfer device transfers the characteristics from the first memory to a first register. A second memory stores the voltage present at each of the nodes, while a retrieval device retrieves the nodal voltages from the second memory and transfers them to a second register. Coupled to the first and second registers is a computation unit to ascertain the current flowing between the current carrying nodes and the subsequent change of voltage at those nodes. The apparatus carries out the simulation over a series of incremental time steps thereby providing an analog simulation of the circuit.
    Type: Grant
    Filed: November 12, 1987
    Date of Patent: March 21, 1989
    Assignee: University of Toronto, Innovations Foundation
    Inventor: David M. Lewis
  • Patent number: 4563189
    Abstract: A method for treating natural textile fibres and synthetic polyamide fibres to enhance their affinity for disperse dyestuffs which comprises treating the fibres with an aqueous solution or dispersion of an arylating agent. The arylating agent contains both a benzene or naphthalene ring and a reactive group, such as a halo-triazine group. The fibres may be treated by exhaustion from long liquors or by padding, and the affinity for disperse dyestuffs is considerably increased thereby.
    Type: Grant
    Filed: February 6, 1984
    Date of Patent: January 7, 1986
    Assignee: Wool Development International Ltd.
    Inventor: David M. Lewis
  • Patent number: 4455147
    Abstract: Color yield of the coloration processes for textile and like materials, more especially of sublimable dyes applied by transfer printing, is enhanced by pretreatment of the material by deposition of 1 to 10% surfactant or other amphipathic substance. Preferred substances are cationic, anionic or non-ionic surfactants, which may be applied from aqueous solution at levels of 1 to 10% on the weight of the material. The material is dried before printing. The surfactants can be accompanied by swelling agents, catalysts or cross-linking agents. Preferred dyes for the printing stage are sublimable dyes containing chelatable groups, fibre-reactive groups or cross-linkable groups.
    Type: Grant
    Filed: March 26, 1981
    Date of Patent: June 19, 1984
    Assignees: I.W.S. Nominee Company, Limited, Commonwealth Scientific and Industrial Research Organization
    Inventors: David M. Lewis, Peter R. Brady, Peter G. Cookson, Keith W. Fincher
  • Patent number: 4453188
    Abstract: A floppy disk drive including a pivotally mounted disk pack storing a plurality of floppy diskettes, a driver mechanism for rotating any one of the diskettes into a retrievable position, a picker mechanism for moving the one diskette between the retrievable position and an operative position at which the diskette is rotatable on a spindle, and a position control circuit for controlling the position of a recording head across the one diskette being in the operative position and for compensating for expansion, contraction, and eccentric rotation of the one diskette. The floppy diskettes are stored bent in the disk pack, but in the operative position the one diskette that had been retrieved from the retrievable position is stored only partially in the disk pack and parallel to the plane of rotation. A microprocessor controls the entire disk drive.
    Type: Grant
    Filed: April 10, 1981
    Date of Patent: June 5, 1984
    Assignee: Amlyn Corporation
    Inventors: Richard E. Johnson, Roger O. Williams, Ronald W. Higgins, David M. Lewis
  • Patent number: 4276730
    Abstract: Wall structure modules comprising a plurality of narrow, substantially ceiling high panels of integral sandwich construction with a thickness of insulation molded between two thicknesses of light weight concrete. There are tongue and groove configurations along opposite sides of the panels conditioning them to be nested together. A full-height steel stud is encased in each exterior panel and has a small bracket at the top exposed for attachment of a top plate, which fits over the panels of a complete wall section to unitize it. Interior panels are similar but the steel studs are full height in every other panel only. A transverse channel extends across the bottom of each panel on the inside, the lower flange of which is secured to the sub-floor. In the assembled wall these channels are aligned to serve as a conduit for plumbing and electrical wiring.
    Type: Grant
    Filed: July 2, 1979
    Date of Patent: July 7, 1981
    Inventor: David M. Lewis
  • Patent number: 4225312
    Abstract: A process for the treatment of textiles, especially to impart shrink resistance thereto, in which there is applied to the textile a water-soluble curable polymeric material in the presence of alkali in an aqueous medium and simultaneously with or subsequently to such application there is applied a compatible exhaustion agent and the polymeric material is exhusted onto the textile and cured thereon.
    Type: Grant
    Filed: August 1, 1978
    Date of Patent: September 30, 1980
    Assignee: I.W.S. Nominee Company Limited
    Inventors: David M. Lewis, Keith R. F. Cockett