Abstract: A method for estimating an output voltage of a power converter comprises sensing a voltage waveform representative of the output voltage; and detecting a first gap and a second gap. The first gap is between a time when the sensed voltage waveform crosses a first voltage reference and a time when the sensed voltage waveform crosses a second voltage reference at a voltage offset below the first voltage reference. The second gap is between a time when the sensed voltage waveform crosses a third voltage reference and a time when the sensed voltage waveform crosses the second voltage reference, the third voltage referenced at a predetermined voltage above the second voltage reference. Responsive to the first gap exceeding a threshold, a tracking error is computed based on the first gap; and responsive to the first gap not exceeding the threshold, the tracking error is computed based on the second gap.

Abstract: A controller of a switching power converter employs a dynamically adaptive power supply regulation approach that improves low-load and no-load regulation to achieve ultra-low standby power in a switching power converter. Under ultra-low load conditions when a deep-deep pulse width modulation (DDPWM) is applied, the controller decreases the actual on-time of the power switch of the switching power converter by decreasing the “on” duration of the control signal used to turn on or off the power switch, until the “on” duration of the control signal reaches a minimum value. To further reduce the on-time of the power switch, the controller reduces the power applied to the power switch to turn on the switch more slowly, while maintaining the “on” duration of the control signal at a minimum value. The minimum value of the “on” duration of the control signal and the minimum power applied to the switch are dynamically controlled.

Abstract: A controller of a switching power converter sets an actual turn-on time of a switch in the switching power converter in each switching cycle by selecting one of a plurality of valley points of the output voltage of the switching power converter occurring subsequent to the desired turn-on time of the switch. The desired turn-on time of the switch may be calculated according to the regulation scheme employed by the switching power converter. The controller selects one of the plurality of valley points randomly from switching cycle to switching cycle. The controller generates a control signal to turn on the switching power converter at the selected one of the plurality of valley points of the output voltage occurring subsequent to the desired turn-on time.

Abstract: A switching power converter provides regulated output power to a load. The switching power converter comprises a transformer including a primary winding coupled to an input voltage, a secondary winding coupled to an output of the switching power converter, an auxiliary winding on a primary side of the transformer, and a switch coupled to the primary winding of the transformer. Output voltage across the secondary winding is reflected as a feedback voltage across the auxiliary winding. The switching power converter detects output current based on a reset time of the transformer. Based on the detected output power, the switching power converter controls switching of the switch to provide regulated output power.

Abstract: A finds comparison tool is provided that includes a presentation tier providing a plurality of interfaces for interacting with a plurality of client applications. The presentation tier allows the client applications to send requests for a plurality of analytics to be performed regarding comparing the performance of one or more funds or portfolios as well allowing mobile-based client applications and web-based client applications to communicate with the funds comparison tool. An application tier processes the requests sent by the client applications by providing the data used by the client applications, storing and retrieving of session data, and an interface for the analytics information captured during sessions so as to allow a visualization of the analytics used in the comparison of the one or more funds or portfolios.

Abstract: The asynchronous circuit includes a fork having at least two branches, each branch being connected to a logic gate so that the logic gate receives as input a branch-ending signal. It further includes a circuit for branching the branch-ending signal at the level of each logic gate to form a branched signal, and a blocking circuit comprising a Muller gate and receiving as input at least one branched signal, the blocking circuit being configured to prevent the propagation of an output signal when the branch-ending signals are in different logic states.

Abstract: A power converter includes a transformer with a primary and a secondary winding and a switch. A controller of the power converter at the primary winding side of the transformer generates a control signal to turn on or turn off the switch, the switch being turned on responsive to the control signal being in a first state and the switch being turned off responsive to the control signal being in a second state. The controller determines current through the primary winding generated while the switch is turned on and indirectly detects an input voltage to the power converter based on the current through the primary winding generated while the switch is turned on. The controller in turn may detect conditions such as a loss of power or brown out at the input of the power converter based on the indirectly detected input voltage.

Abstract: An apparatus (11) for processing a sample, circuit board (8008) suited to use in such an apparatus and a method of processing are provided in which the apparatus (11) is provided with alignment features to assist in provided the circuit board and a sample cartridge (9) in the correct position relative to one another. In this way, the plurality of sections for processing a sample in the cartridge (9) are positioned against a plurality of elements, such as a heater (4) for heating the sample cartridge (9) or an electrical contact (EP1-EP4) for powering features on the sample cartridge (9), correctly and can operate independently of one another.

Abstract: An apparatus for controlling a dynamic random access memory (DRAM), the apparatus comprising an interface to transmit, over a first plurality of wires, to the DRAM a first code to indicate that first data is to be written to the DRAM and a column address to indicate a column location of a memory core in the DRAM where the first data is to be written. The interface is further to transmit a second code to indicate whether mask information for the first data will be sent to the DRAM. If the second code indicates that mask information will be sent, a portion of the column address and a portion of the mask information are sent after the second code is sent. The interface is further to transmit to the DRAM, over a second plurality of wires separate from the first plurality of wires, the first data.

Abstract: The asynchronous circuit includes a fork having at least two branches, each branch being connected to a logic gate so that the logic gate receives as input a branch-ending signal. It further includes a circuit for branching the branch-ending signal at the level of each logic gate to form a branched signal, and a blocking circuit comprising a Muller gate and receiving as input at least one branched signal, the blocking circuit being configured to prevent the propagation of an output signal when the branch-ending signals are in different logic states.

Abstract: A finds comparison tool is provided that includes a presentation tier providing a plurality of interfaces for interacting with a plurality of client applications. The presentation tier allows the client applications to send requests for a plurality of analytics to be performed regarding comparing the performance of one or more funds or portfolios as well allowing mobile-based client applications and web-based client applications to communicate with the funds comparison tool. An application tier processes the requests sent by the client applications by providing the data used by the client applications, storing and retrieving of session data, and an interface for the analytics information captured during sessions so as to allow a visualization of the analytics used in the comparison of the one or more funds or portfolios.

Abstract: A USB plug receptacle includes a connector substrate having a tongue portion having a first set of electrical contact pins disposed on a top surface of the tongue portion, a second set of a plurality of electrical pins disposed on a bottom surface of the tongue portion, a third set of electrical contact pins disposed on an opposite end of the tongue portion. The USB plug receptacle further includes a metal case made of a sheet of electrically conductive metal plate by blanking the sheet into a generally tubular shape to receive and enclose the connector substrate. When the connector substrate is inserted into the metal case, the third set of electrical contact pins are exposed outside of the metal case and the third set of electrical contact pins can be mounted on first and second sets of electrical contact pads of a printed circuit board assembly.

Abstract: The embodiments herein describe a dynamic metal-oxide-semiconductor field-effect transistor (MOSFET) gate driver system architecture and control scheme. The MOSFET gate driver system dynamically adjusts both the gate driver turn-on-resistance and the gate driver turn-off resistance within a single (i.e., one) switching cycle to reduce electromagnetic interference (EMI) in the system and to minimize the conduction loss of a power MOSFET during operation.

Abstract: A memory module includes a substrate, a plurality of signal lines, a clock line and a plurality of memory devices. The plurality of signal lines including first and second signal lines routed alongside one another where, for each of the first and second signal lines, a respective signal, starting at a corresponding first edge finger, traverses in sequence, a respective first segment of a respective signal line, a respective turn portion of the respective signal line, and a respective second segment of the respective signal line. The clock line is to provide a clock signal that traverses in sequence, a second edge finger, the first segment of the clock line, the turn portion of the clock line, and the second segment of the clock line. The respective signals traverse and the clock signal line arrive at the plurality of memory devices in sequence.

Abstract: A USB plug receptacle includes a connector substrate having a tongue portion having a first set of electrical contact pins disposed on a top surface of the tongue portion, a second set of a plurality of electrical pins disposed on a bottom surface of the tongue portion, a third set of electrical contact pins disposed on an opposite end of the tongue portion. The USB plug receptacle further includes a metal case made of a sheet of electrically conductive metal plate by blanking the sheet into a generally tubular shape to receive and enclose the connector substrate. When the connector substrate is inserted into the metal case, the third set of electrical contact pins are exposed outside of the metal case and the third set of electrical contact pins can be mounted on first and second sets of electrical contact pads of a printed circuit board assembly.

Abstract: A computer-implemented method of implementing a circuit design that includes an initial network within a programmable logic device can include generating a first choice network from the circuit design according to a first synthesis technique and determining a placement for the first choice network. At least a second choice network can be generated from the first choice network according to a second synthesis technique. A placement for the second choice network can be determined. The placement for the first choice network can be compared with the placement for the second choice network. A placement and corresponding choice network can be selected according to the comparison, and output.

Abstract: An extended universal serial bus (USB) storage device is described herein. According to one embodiment, an extended USB storage device includes a printed circuit board assembly (PCBA) having a flash memory device and a flash controller mounted thereon, and an extended USB connector plug coupled to the PCBA for providing a USB compatible interface between an external device and the flash memory device and the flash controller, wherein the extended USB connector plug includes a first end used to couple to the external device and a second end coupled to the flash memory device and the flash controller. The extended USB connector plug includes multiple communication interfaces. Other methods and apparatuses are also described.

Abstract: An extended USB plug connector includes a connector substrate including a frontend having a first set of electrical contact pins disposed thereon and a backend having a second set of electrical contact pins disposed thereon. The first set includes a first row of electrical contact pins disposed on a top surface of the connector substrate and a second row of electrical contact pins disposed in parallel with the first row of electrical contact pins and interior to the first row of electrical contact pins, where the second row includes more electrical contact pins than the first row. The second set of electrical contact pins includes a number of electrical contact pins equal to the first row and second row of electrical contact pins in total. The second set of electrical contact pins are used to connect to corresponding electrical contact pads disposed on a printed circuit board assembly having a USB controller and flash memory devices disposed thereon.

Abstract: A switch controller is disclosed that adaptively controls the operating frequency of a switching power converter in order to improve one-time load response and repetitive dynamic load responses. During a transition from a high load to low load condition, the switch controller clamps the operating frequency of the switching power converter at an intermediate frequency for a period of time before allowing the operating frequency to return to a frequency associated with the low load condition. The clamped frequency is higher than the frequency associated with the low load condition thereby allowing improved response to a subsequent load change to a high load condition. Thus, the system improves dynamic load response without compromising no-load power consumption.

Abstract: The semiconductor module is provided that includes a semiconductor housing and a plurality of integrated circuit dice positioned within the housing. The semiconductor module also includes a programmable memory device positioned within the housing and electrically coupled to the plurality of integrated circuit dice. The programmable memory device is programmable to identify the integrated circuit dice that meet a predetermined standard, such as an operating frequency requirement, or a core timing grade. Further, a method is provided for accessing a semiconductor module. The above mentioned housing is provided to enclose the plurality of integrated circuit dice and the programmable memory device. The integrated circuit dice of the plurality of integrated circuit dice that meet a predetermined standard are then identified. The programmable memory device is subsequently programmed to identify the selected integrated circuit dice.