Patents by Inventor David Paul Jones

David Paul Jones has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240131164
    Abstract: A solidified melt extrudate comprising an active pharmaceutical ingredient in an amorphous form and a combination of at least two polymers.
    Type: Application
    Filed: March 4, 2022
    Publication date: April 25, 2024
    Inventors: Ammar ALMAJAAN, Gavin Paul ANDREWS, David Simon JONES, Mariana Palmeira BEZERRA, Walkiria Santos SCHLINDWEIN, Karina WOJDAT
  • Patent number: 11624522
    Abstract: A system for monitoring at least one HVAC system includes at least one remotely accessible server, at least one probe or sensor operatively connected to the at least one HVAC system and configured to acquire operational data, and a communication module operatively connected to the at least one probe or sensor and configured to transmit the operational data acquired to the at least one remotely accessible server. The remotely accessibly server includes a processor and a memory unit and is programmed to receive and store operational data acquired for the HVAC system, and identify any operational abnormalities by analysing the operational data. Responsive to an operational abnormality being identified, the server is further programmed to designate a tiered maintenance status for the HVAC system and transmit a corresponding tiered maintenance request to a technician based on the tiered maintenance status designated.
    Type: Grant
    Filed: October 11, 2018
    Date of Patent: April 11, 2023
    Assignee: AIRCONNECT HOLDINGS PTY LTD
    Inventor: David Paul Jones
  • Publication number: 20210199322
    Abstract: A system for monitoring at least one HVAC system includes at least one remotely accessible server, at least one probe or sensor operatively connected to the at least one HVAC system and configured to acquire operational data, and a communication module operatively connected to the at least one probe or sensor and configured to transmit the operational data acquired to the at least one remotely accessible server. The remotely accessibly server includes a processor and a memory unit and is programmed to receive and store operational data acquired for the HVAC system, and identify any operational abnormalities by analysing the operational data. Responsive to an operational abnormality being identified, the server is further programmed to designate a tiered maintenance status for the HVAC system and transmit a corresponding tiered maintenance request to a technician based on the tiered maintenance status designated.
    Type: Application
    Filed: October 11, 2018
    Publication date: July 1, 2021
    Inventor: David Paul JONES
  • Patent number: 9761550
    Abstract: A power semiconductor device that includes a stack of a thin metal layer and a thick metal layer over the active region thereof, and a method for the fabrication thereof.
    Type: Grant
    Filed: April 13, 2016
    Date of Patent: September 12, 2017
    Assignee: Infineon Technologies Americas Corp.
    Inventors: Robert Montgomery, Hugo Burke, Phillip Parsonage, Susan Johns, David Paul Jones
  • Publication number: 20160233185
    Abstract: A power semiconductor device that includes a stack of a thin metal layer and a thick metal layer over the active region thereof, and a method for the fabrication thereof.
    Type: Application
    Filed: April 13, 2016
    Publication date: August 11, 2016
    Inventors: Robert Montgomery, Hugo Burke, Phillip Parsonage, Susan Johns, David Paul Jones
  • Patent number: 9318355
    Abstract: A power semiconductor device that includes a stack of a thin metal layer and a thick metal layer over the active region thereof, and a method for the fabrication thereof.
    Type: Grant
    Filed: July 17, 2014
    Date of Patent: April 19, 2016
    Assignee: Infineon Technologies Americas Corp.
    Inventors: Robert Montgomery, Hugo Burke, Philip Parsonage, Susan Johns, David Paul Jones
  • Publication number: 20150325685
    Abstract: A semiconductor structure is disclosed. The semiconductor structure includes a trench having substantially parallel trench sidewalls, and a tapered dielectric liner in the trench. The tapered dielectric liner includes slanted dielectric sidewalls. A conductive filler is enclosed by the slanted dielectric sidewalls in the trench.
    Type: Application
    Filed: April 13, 2015
    Publication date: November 12, 2015
    Inventors: Timothy D. Henson, Ling Ma, Kapil Kelkar, Ljubo Radic, Hugo Burke, David Paul Jones
  • Patent number: 8987898
    Abstract: According to one embodiment, a semiconductor wafer comprises a plurality of solder bumps for providing device contacts formed over a functional region of the semiconductor wafer, and one or more support rings surrounding the functional region. The one or more support rings and the plurality of solder bumps are formed so as to have substantially matching heights. The presence of the one or more support rings causes the semiconductor wafer to have a substantially uniform thickness in the functional region after a thinning process is performed on the semiconductor wafer. A method for fabricating the semiconductor wafer comprises forming the plurality of solder bumps over the functional region, and forming the one or more support rings surrounding the functional region before performing the thinning process on the semiconductor wafer.
    Type: Grant
    Filed: June 6, 2011
    Date of Patent: March 24, 2015
    Assignee: International Rectifier Corporation
    Inventors: Rupert Burbidge, David Paul Jones, Amarjit Dhadda, Robert Montgomery
  • Publication number: 20140327057
    Abstract: A power semiconductor device that includes a stack of a thin metal layer and a thick metal layer over the active region thereof, and a method for the fabrication thereof.
    Type: Application
    Filed: July 17, 2014
    Publication date: November 6, 2014
    Inventors: Robert Montgomery, Hugo Burke, Philip Parsonage, Susan Johns, David Paul Jones
  • Patent number: 8860194
    Abstract: One exemplary disclosed embodiment comprises a semiconductor package including a vertical conduction control transistor and a vertical conduction sync transistor. The vertical conduction control transistor may include a control source, a control gate, and a control drain that are all accessible from a bottom surface, thereby enabling electrical and direct surface mounting to a support surface. The vertical conduction sync transistor may include a sync drain on a top surface, which may be connected to a conductive clip that is coupled to the support surface. The conductive clip may also be thermally coupled to the control transistor. Accordingly, all terminals of the transistors are readily accessible through the support surface, and a power circuit, such as a buck converter power phase, may be implemented through traces of the support surface. Optionally, a driver IC may be integrated into the package, and a heatsink may be attached to the conductive clip.
    Type: Grant
    Filed: November 1, 2012
    Date of Patent: October 14, 2014
    Assignee: International Rectifier Corporation
    Inventors: Ling Ma, Andrew N. Sawle, David Paul Jones, Timothy D. Henson, Niraj Ranjan, Vijay Viswanathan, Omar Hassen
  • Patent number: 8844516
    Abstract: This relates to a heating device including a solar energy collector, the solar energy collector transferring collected solar energy to outside air. First collector panels are used to heat outside air which heated air is led to a heater, for example a space heater. Second collector panels are used to transfer solar energy to air led to a heat exchanger of a heat pump. The heat pump transfers the extracted heat to heat storage. The stored heat is added to the air coming from the first collector panels if the temperature of the air coming from the first collector panels is below a predetermined temperature.
    Type: Grant
    Filed: January 25, 2010
    Date of Patent: September 30, 2014
    Assignee: Tata Steel UK Limited
    Inventors: David Paul Jones, Reginald Geraint Brown
  • Patent number: 8791525
    Abstract: A power semiconductor device that includes a stack of a thin metal layer and a thick metal layer over the active region thereof, and a method for the fabrication thereof.
    Type: Grant
    Filed: February 25, 2008
    Date of Patent: July 29, 2014
    Assignee: International Rectifier Corporation
    Inventors: Robert Montgomery, Hugo Burke, Philip Parsonage, Susan Johns, David Paul Jones
  • Publication number: 20140118032
    Abstract: One exemplary disclosed embodiment comprises a semiconductor package including a vertical conduction control transistor and a vertical conduction sync transistor. The vertical conduction control transistor may include a control source, a control gate, and a control drain that are all accessible from a bottom surface, thereby enabling electrical and direct surface mounting to a support surface. The vertical conduction sync transistor may include a sync drain on a top surface, which may be connected to a conductive clip that is coupled to the support surface. The conductive clip may also be thermally coupled to the control transistor. Accordingly, all terminals of the transistors are readily accessible through the support surface, and a power circuit, such as a buck converter power phase, may be implemented through traces of the support surface. Optionally, a driver IC may be integrated into the package, and a heatsink may be attached to the conductive clip.
    Type: Application
    Filed: November 1, 2012
    Publication date: May 1, 2014
    Applicant: INTERNATIONAL RECTIFIER CORPORATION
    Inventors: Ling Ma, Andrew N. Sawle, David Paul Jones, Timothy D. Henson, Niraj Ranjan, Vijay Viswanathan, Omar Hassen
  • Publication number: 20120306072
    Abstract: According to one embodiment, a semiconductor wafer comprises a plurality of solder bumps for providing device contacts formed over a functional region of the semiconductor wafer, and one or more support rings surrounding the functional region. The one or more support rings and the plurality of solder bumps are formed so as to have substantially matching heights. The presence of the one or more support rings causes the semiconductor wafer to have a substantially uniform thickness in the functional region after a thinning process is performed on the semiconductor wafer. A method for fabricating the semiconductor wafer comprises forming the plurality of solder bumps over the functional region, and forming the one or more support rings surrounding the functional region before performing the thinning process on the semiconductor wafer.
    Type: Application
    Filed: June 6, 2011
    Publication date: December 6, 2012
    Applicant: INTERNATIONAL RECTIFIER CORPORATION
    Inventors: Rupert Burbidge, David Paul Jones, Amarjit Dhadda, Robert Montgomery
  • Publication number: 20120175688
    Abstract: Some exemplary embodiments of a semiconductor package including a semiconductor device having electrodes on opposite major surfaces connectable to a planar support surface without a bondwire and a control electrode disposed in a corner position for reducing top-metal spreading resistance and device on-resistance have been disclosed. One exemplary structure comprises a semiconductor device having a first major surface including a first electrode and a second major surface including a second electrode and a control electrode, wherein the control electrode is disposed in a corner of the second major surface, and wherein the first electrode, the second electrode, and the control electrode are electrically connectable to a planar support surface without a bondwire. The pads of the device may be arranged in a balanced grid to maintain device stability during integration. A minimum gap distance between die pads allows the placement of vias in the planar support surface.
    Type: Application
    Filed: July 20, 2011
    Publication date: July 12, 2012
    Applicant: INTERNATIONAL RECTIFIER CORPORATION
    Inventors: Rupert Burbidge, David Paul Jones
  • Patent number: 8143729
    Abstract: A power semiconductor package that includes a power semiconductor device having a threshold voltage that does not vary when subjected to an autoclave test.
    Type: Grant
    Filed: January 26, 2009
    Date of Patent: March 27, 2012
    Assignee: International Rectifier Corporation
    Inventors: Mark Pavier, Danish Khatri, Daniel Cutler, Andrew Neil Sawle, Susan Johns, Martin Carroll, David Paul Jones
  • Publication number: 20110277745
    Abstract: This relates to a heating device including a solar energy collector, the solar energy collector transferring collected solar energy to outside air. First collector panels are used to heat outside air which heated air is led to a heater, for example a space heater. Second collector panels are used to transfer solar energy to air led to a heat exchanger of a heat pump. The heat pump transfers the extracted heat to heat storage. The stored heat is added to the air coming from the first collector panels if the temperature of the air coming from the first collector panels is below a predetermined temperature.
    Type: Application
    Filed: January 25, 2010
    Publication date: November 17, 2011
    Applicant: TATA STEEL UK LIMITED
    Inventors: David Paul Jones, Reginald Geraint Brown
  • Patent number: 7998808
    Abstract: A process for fabrication of a semiconductor device that includes forming a first trench in a semiconductor body, forming spaced spacers in the first trench, and forming a narrower second trench at the bottom of the first trench using the spacers as a mask.
    Type: Grant
    Filed: March 23, 2009
    Date of Patent: August 16, 2011
    Assignee: International Rectifier Corporation
    Inventors: Vijay Viswanathan, Dev Alok Girdhar, Timothy Henson, David Paul Jones
  • Publication number: 20100251940
    Abstract: A one-piece pallet for securing and stacking drums thereon may include a tray having downwardly and inwardly tapering peripheral side walls, a top surface having a plurality of raised support surfaces, each shaped to engage a bottom of a container, a plurality of raised dividers, each of said dividers being positioned between adjacent support surfaces and being shaped to engage a side wall of a drum resting on said adjacent support surfaces. The side walls may have outer raised ribs terminating adjacent one of the support surfaces and shaped to engage a side wall of a drum resting on said adjacent one of said support surfaces. The dividers may include inner raised ribs having terminal portions opposite the terminal portions of the outer raised ribs such that a drum resting on any one of said support surfaces is constrained by the terminal portions of the inner and outer raised ribs from lateral movement relative to the tray.
    Type: Application
    Filed: April 2, 2010
    Publication date: October 7, 2010
    Applicant: THE FABRI-FORM COMPANY
    Inventors: David Paul Jones, Roy Lee Fehrman, JR.
  • Patent number: D682503
    Type: Grant
    Filed: June 14, 2012
    Date of Patent: May 14, 2013
    Assignee: The Fabri-Form Company
    Inventors: Roy Lee Fehrman, Jr., David Paul Jones