Abstract: Method and apparatus for reducing metal oxide surfaces to modified metal surfaces are disclosed. By exposing a metal oxide surface to a remote plasma, the metal oxide surface on a substrate can be reduced to pure metal and the metal reflowed. A remote plasma apparatus can treat the metal oxide surface as well as cool, load/unload, and move the substrate within a single standalone apparatus. The remote plasma apparatus includes a processing chamber and a controller configured to provide a substrate having a metal seed layer in a processing chamber, form a remote plasma of a reducing gas species where the remote plasma includes radicals, ions, and/or ultraviolet (UV) radiation from the reducing gas species, and expose a metal seed layer of the substrate to the remote plasma to reduce oxide of the metal seed layer to metal and to reflow the metal.

Abstract: Apparatuses and methods for protecting a circuit from an over-limit electrical condition are disclosed. One example apparatus includes a protection circuit coupled to a circuit to be protected. The circuit to be protected is coupled to a pad node. The protection circuit is configured to conduct current from the pad node to a reference voltage node to protect the circuit from an over-limit electrical condition. The protection circuit has a trigger circuit coupled to the pad node and configured to trigger a shunt circuit to conduct current from the pad node to the reference voltage node responsive to a voltage provided to the pad node having a voltage exceeding a trigger voltage. In some embodiments, the trigger circuit is matched to the circuit being protected.

Abstract: A method of treating a copper containing structure on a substrate is disclosed. The method includes electrodepositing the copper containing structure on a substrate, annealing the copper containing structure, and forming an interface between a pad of the copper containing structure and a solder structure after anneal. The interface can have improved resistance to interfacial voiding. The copper containing structure is configured to deliver current between one or more ports and one or more solder structures in the integrated circuit package. Annealing the copper containing structure can move impurities and vacancies to the surface of the copper containing structure for subsequent removal.

Abstract: Methods, systems, structures and arrays are disclosed, such as a resistive memory array which includes access devices, for example, back-to-back Zener diodes, that only allow current to pass through a coupled resistive memory cell when a voltage drop applied to the access device is greater than a critical voltage. The array may be biased to reduce standby currents and improve delay times between programming and read operations.

Abstract: Apparatuses and methods for protecting a circuit from an over-limit electrical condition are disclosed. One example apparatus includes a protection circuit coupled to a circuit to be protected. The circuit to be protected is coupled to a pad node. The protection circuit is configured to conduct current from the pad node to a reference voltage node to protect the circuit from an over-limit electrical condition. The protection circuit has a trigger circuit coupled to the pad node and configured to trigger a shunt circuit to conduct current from the pad node to the reference voltage node responsive to a voltage provided to the pad node having a voltage exceeding a trigger voltage. In some embodiments, the trigger circuit is matched to the circuit being protected.

Abstract: Apparatuses, memory section control circuits, and methods of refreshing memory are disclosed. An example apparatus includes a plurality of memory sections and a plurality of memory section control circuits. Each memory section control circuit is coupled to a respective one of the plurality of memory sections and includes a plurality of access line drivers, each of which includes a plurality of transistors having common coupled gates. During an operation of the apparatus a first voltage is provided to the commonly coupled gates of the transistors of at least some of the access line drivers of the memory section control circuit coupled to an active memory section an and a second voltage is provided to the commonly coupled gates of the transistors of the access line drivers of the memory section control circuit coupled to an inactive memory section control circuit, wherein the first voltage is greater than the second voltage.

Abstract: A VoIP switch includes a first input Ethernet port configured to receive electrical power from a first power sourcing equipment, and a second input Ethernet port configured to receive electrical power from a second power sourcing equipment. The VoIP switch may be configured such that the first input Ethernet port is powered by the first power sourcing equipment concurrently with the second input Ethernet port being powered by the second power sourcing equipment.

Abstract: Apparatus and methods for use with a baffle support fixture for a machine assembly of the tubes and baffles in a bundle assembly of a shell and tube type heat exchanger. The bundle comprises tubes inserted through baffles. The bundle is assembled using a holding fixture that includes anti-rotational features to secure baffles in a desired orientation. Following assembly, the bundle assembly is temporarily fixtured using pressure applying means such as plates and rods, and is then permanently affixed using an adhesive composition. After adhesive is applied, bundles, with the pressure applying means still attached, are preserved on racks and heat treated to cure and permanently set the adhesive.

Abstract: Apparatuses, memory section control circuits, and methods of refreshing memory are disclosed. An example apparatus includes a plurality of memory sections and a plurality of memory section control circuits. Each memory section control circuit is coupled to a respective one of the plurality of memory sections and includes a plurality of access line drivers, each of which includes a plurality of transistors having common coupled gates. During an operation of the apparatus a first voltage is provided to the commonly coupled gates of the transistors of at least some of the access line drivers of the memory section control circuit coupled to an active memory section and a second voltage is provided to the commonly coupled gates of the transistors of the access line drivers of the memory section control circuit coupled to an inactive memory section control circuit, wherein the first voltage is greater than the second voltage.

Abstract: Disclosed herein are methods of cleaning a lipseal and/or cup bottom of an electroplating device by removing metal deposits accumulated in prior electroplating operations. The methods may include orienting a nozzle such that it is pointed substantially at the inner circular edge of the lipseal and/or cup bottom, and dispensing a stream of cleaning solution from the nozzle such that the stream contacts the inner circular edge of the lipseal and/or cup bottom while they are being rotated, removing metal deposits. In some embodiments, the stream has a velocity component against the rotational direction of the lipseal and/or cup bottom. In some embodiments, the deposits may include a tin/silver alloy. Also disclosed herein are cleaning apparatuses for mounting in electroplating devices and for removing electroplated metal deposits from their lipseals and/or cup bottoms. In some embodiments, the cleaning apparatuses may include a jet nozzle.

Abstract: Apparatuses, memory section control circuits, and methods of refreshing memory are disclosed. An example apparatus includes a plurality of memory sections and a plurality of memory section control circuits. Each memory section control circuit is coupled to a respective one of the plurality of memory sections and includes a plurality of access line drivers, each of which includes a plurality of transistors having common coupled gates. During an operation of the apparatus a first voltage is provided to the commonly coupled gates of the transistors of at least some of the access line drivers of the memory section control circuit coupled to an active memory section and a second voltage is provided to the commonly coupled gates of the transistors of the access line drivers of the memory section control circuit coupled to an inactive memory section control circuit, wherein the first voltage is greater than the second voltage.

Abstract: Apparatuses and methods for protecting a circuit from an over-limit electrical condition are disclosed. One example apparatus includes a protection circuit coupled to a circuit to be protected. The circuit to be protected is coupled to a pad node. The protection circuit is configured to conduct current from the pad node to a reference voltage node to protect the circuit from an over-limit electrical condition. The protection circuit has a trigger circuit coupled to the pad node and configured to trigger a shunt circuit to conduct current from the pad node to the reference voltage node responsive to a voltage provided to the pad node having a voltage exceeding a trigger voltage. In some embodiments, the trigger circuit is matched to the circuit being protected.

Abstract: Methods, systems, structures and arrays are disclosed, such as a resistive memory array which includes access devices, for example, back-to-back Zener diodes, that only allow current to pass through a coupled resistive memory cell when a voltage drop applied to the access device is greater than a critical voltage. The array may be biased to reduce standby currents and improve delay times between programming and read operations.

Abstract: Methods, systems, structures and arrays are disclosed, such as a resistive memory array which includes access devices, for example, back-to-back Zener diodes, that only allow current to pass through a coupled resistive memory cell when a voltage drop applied to the access device is greater than a critical voltage. The array may be biased to reduce standby currents and improve delay times between programming and read operations.

Abstract: A distributed energy storage or community energy storage unit incorporates a geothermal temperature regulation system. The system includes a sealed, chemically inert storage energy container or “pack” disposed within an underground chamber. The underground chamber is defined by a support structure or box pad 14 that includes side walls and a top or pad. Mechanical and electrical interfaces both to the utility connections and to the CES converter unit are also included.

Abstract: An integrated rockably released leverage snap fastening system is disclosed herein comprising a male snap and a rockable lever snap assembly wherein the rockable lever snap assembly may be removably fastened to the male snap to hold at least one item in place. To facilitate unfastening, male snap and rockable lever snap assembly cooperatively combine to create a class 1 lever system which may reduce friction and permit a user to rockably release the snap while reducing risk of damage to an item. Various embodiments of the present invention and a method of use are discussed herein.