Abstract: A method and an apparatus for converting an analog input signal into a digital output signal using a sigma-delta modulator architecture with a digital tracking filter. The digital tracking filter may have and order greater than one, and the signal and noise transfer functions of the sigma-delta modulator architecture are chosen to provide a sigma-delta modulator architecture with a high dynamic range even if a relatively low oversampling ratio is used.

Abstract: Sigma-delta modulators and a method of modulating are disclosed in which a first sigma-delta modulator having a first quantizer is provided, and a second quantizer is also provided. At least a first node of the first sigma-delta modulator upstream of the first quantizer and a second node of the first sigma-delta modulator upstream of the first quantizer to the second quantizer are coupled together.

Abstract: A class D power output stage for switching a supply voltage comprises a limiting transistor with a controllable path and a control terminal, a complementary limiting transistor with a controllable path and a control terminal, a switching transistor with a controllable path and a control terminal, and a complementary switching transistor with a controllable path and a control terminal. A switched output signal between the controllable paths of the limiting and complementary limiting transistors can be taped off, the controllable paths of the limiting and the complementary limiting transistors are connected together and are connected to a first and a second supply terminal via the controllable paths of the switching and complementary switching transistors, and the switching and the complementary switching transistors have a lower electrical strength than the limiting and complementary limiting transistors.

Abstract: A pulse width modulator circuit has two self-oscillating pulse width modulators and a synchronization circuit for synchronizing the two self-oscillating pulse width modulators. It also comprises an auxiliary-signal generating circuit for generating an auxiliary signal which is coupled into the two self-oscillating pulse width modulators.

Abstract: A self-oscillating driver circuit comprises a driver stage, a feedforward path which is coupled to an input of the driver stage, and a feedback path which couples an output of the driver stage to an input of the feedforward path. The feedforward path comprises a feedforward filter which is designed as an active filter. In order to prevent an oscillatory state of the driver circuit at an unwanted frequency, it is proposed that an internal state variable of the feedforward filter be monitored and that the feedforward filter be reset if the value of the monitored internal state variable is outside a predefined range.

Abstract: Driver circuit for driving a transmit signal for a line comprising a signal amplifier which delivers a transmit signal, present at a signal input of the signal amplifier, amplified with a gain to a signal output, a line interface circuit which is connected between the signal output of the signal amplifier and the line, and comprising a hybrid circuit which is connected to the line interface circuit, wherein the hybrid circuit suppresses the transmit signal and couples a received signal received via the line to a signal input of the signal amplifier for the purpose of impedance synthesis.

Abstract: A class D power output stage for switching a supply voltage comprises a limiting transistor with a controllable path and a control terminal, a complementary limiting transistor with a controllable path and a control terminal, a switching transistor with a controllable path and a control terminal, and a complementary switching transistor with a controllable path and a control terminal. A switched output signal between the controllable paths of the limiting and complementary limiting transistors can be taped off, the controllable paths of the limiting and the complementary limiting transistors are connected together and are connected to a first and a second supply terminal via the controllable paths of the switching and complementary switching transistors, and the switching and the complementary switching transistors have a lower electrical strength than the limiting and complementary limiting transistors.