Abstract: Methods of calibrating a power amplifier system to compensate for envelope amplitude misalignment are provided. In certain configurations, a method of calibrating a power amplifier system includes amplifying a radio frequency signal from a transceiver using a power amplifier and generating a supply voltage of the power amplifier using an envelope tracker, including generating a scaled envelope signal based on a power control level signal and an envelope signal, and shaping the scaled envelope signal using a shaping table generated at a target gain compression. The method further includes changing a scaling of the scaled envelope signal using a calibration module, monitoring an output of the power amplifier to determine an amount of scaling of the scaled envelope signal at which a detected gain compression of the power amplifier corresponds to the target gain compression of the shaping table, and calibrating the power amplifier system based on the determination.

Abstract: Aspects of this disclosure relate tuning an impedance presented to a common port of a multi-throw switch. The impedance can be tuned based on an impedance associated with a throw of the multi-throw switch that is activated. This can, for example, provide impedance matching for a duplexer port coupled to a throw of the multi-throw switch that is activated. According to embodiments of this disclosure, a shunt inductor in parallel with a tunable capacitance circuit can tune the impedance presented to the common port of the multi-throw switch. The shunt inductor and the tunable capacitance circuit can be coupled to a node in a signal path between an antenna switch and an antenna port in some embodiments.

Abstract: Aspects of this disclosure relate tuning an impedance presented to a common port of a multi-throw switch and a tunable notch filter coupled to the common port. The impedance presented to the common port can be tuned based on an impedance associated with a throw of the multi-throw switch that is activated. According to embodiments of this disclosure, a shunt inductor in parallel with a tunable capacitance circuit can tune the impedance presented to the common port of the multi-throw switch. In certain embodiments, the tunable notch filter includes a series LC circuit in parallel with a tunable impedance circuit.

Abstract: Aspects of this disclosure relate to a tunable notch filter. In an embodiment, a tunable notch filter includes a series LC circuit in parallel with a tunable impedance circuit, and the tunable notch filter is in a radio frequency signal path associated with a common port of a multi-throw radio frequency switch. According to certain embodiments, the tunable notch filter can be in a radio frequency signal path between an antenna switch and an antenna port.

Abstract: Apparatus and methods for envelope tracking are disclosed. In one embodiment, a power amplifier system including a power amplifier and an envelope tracker is provided. The power amplifier is configured to amplify a radio frequency (RF) signal, and the envelope tracker is configured to control a supply voltage of the power amplifier using an envelope of the RF signal. The envelope tracker includes a buck converter for generating a buck voltage from a battery voltage and a digital-to-analog conversion (DAC) module for adjusting the buck voltage based on the envelope of the RF signal to generate the supply voltage for the power amplifier.

Abstract: Apparatus and methods for envelope tracking systems are provided. In certain configurations, an envelope tracking system includes a digital filter that generates a filtered envelope signal based on a digital envelope signal representing an envelope of a radio frequency signal, a buck converter controllable by the filtered envelope signal and including an output electrically connected to a power amplifier supply voltage, a digital-to-analog converter module including an output electrically connected to the output of the buck converter and that provides an output current, and a digital shaping and delay circuit configured to generate a shaped envelope signal based on shaping the filtered envelope signal. The shaped envelope signal controls a magnitude of the output current, and the digital shaping and delay circuit controls a delay of the shaped envelope signal to align the output of the digital-to-analog converter module and the output of the buck converter.

Abstract: Apparatus and methods for calibration of envelope trackers are provided. In one embodiment, a power amplifier system includes a VGA that amplifies an RF input signal to generate an amplified RF input signal, a power amplifier that amplifies the amplified RF input signal to generate an RF output signal, and an envelope tracker that generates a supply voltage for the power amplifier. The envelope tracker includes a scaling module that generates a scaled envelope signal based on a power control level (PCL) signal and an envelope signal that changes in relation to an envelope of the RF input signal. The envelope tracker further includes a calibration module that controls an amount of scaling of the scaled envelope signal based on calibration data to compensate for an envelope amplitude misalignment of the envelope tracker. The envelope tracker controls the voltage level of the supply voltage based on the scaled envelope signal.

Abstract: Compression control of cascode power amplifiers. A power amplifier module can include a power amplifier including a cascode transistor pair. The cascode transistor pair can include a first transistor and a second transistor. The power amplifier module can include a current comparator configured to compare a first base current of the first transistor and a second base current of the second transistor to generate a comparison signal. The power amplifier module can include a saturation controller configured to maintain the power amplifier out of saturation based on the comparison signal.

Abstract: The present disclosure relates to a system for biasing a power amplifier. The system can include a first die that includes a power amplifier circuit and a passive component having an electrical property that depends on one or more conditions of the first die. Further, the system can include a second die including a bias signal generating circuit that is configured to generate a bias signal based at least in part on measurement of the electrical property of the passive component of the first die.

Abstract: In accordance with some embodiments, the present disclosure relates to a dual mode control interface that can be used to provide both a radio frequency front end (RFFE) serial interface and a two-mode general purpose input/output (GPIO) interface within a single digital control interface die. In certain embodiments, the dual mode control interface, or digital control interface, can communicate with a power amplifier. Further, the dual mode control interface can be used to set the mode of the power amplifier.

Abstract: One aspect of this disclosure is a power amplifier module that includes a first die including a power amplifier and a passive component, the power amplifier including a bipolar transistor having a collector, a base abutting the collector, and an emitter, the collector having a doping concentration of at least about 3×1016 cm?3 at an interface with the base, the collector also having a grading in which doping concentration increases away from the base; and a second die including a bias circuit configured to generate a bias signal based at least partly on an indication of an electrical property of the passive component of the first die and to provide the bias signal to the power amplifier. Other embodiments of the module are provided along with related methods and components thereof.

Abstract: One aspect of this disclosure is a power amplifier module that includes a first die including a power amplifier and a passive component, the power amplifier including a bipolar transistor having a collector, a base abutting the collector, and an emitter, the collector having a doping concentration of at least about 3×1016 cm?3 at an interface with the base, the collector also having a grading in which doping concentration increases away from the base; and a second die including a bias circuit configured to generate a bias signal based at least partly on an indication of an electrical property of the passive component of the first die and to provide the bias signal to the power amplifier. Other embodiments of the module are provided along with related methods and components thereof.

Abstract: Apparatus and methods for tuning a voltage controlled oscillator (VCO) are provided. In one aspect, a method of auto-tuning in a phase-locked loop includes generating a VCO clock signal using a VCO coupled to a capacitor array, dividing the VCO clock signal to generate a divided clock signal using a prescaler circuit having a selectable division ratio, controlling a value of the selectable division ratio using a first counter and a second counter of a counter module, generating a phase-frequency detector feedback signal based on a division control signal M and the divided clock signal using the counter module, counting a number of cycles of the divided clock signal that occur during a calibration interval using a cycle counter of a digital processing logic circuit, and determining the value of a capacitor array control signal based on the number of cycles counted during the calibration interval.

Abstract: A voltage converter can be switched among two or more modes to produce an output voltage tracking a reference voltage that can be of an intermediate level between discrete levels corresponding to the modes. One or more voltages generated from a power supply voltage, such as a battery voltage, can be compared with the reference voltage to determine whether to adjust the mode. The reference voltage can be independent of the power supply voltage.

Abstract: In a voltage converter, a mode configuration is selected in response to a mode control signal using a switch matrix having two or more mode configurations. Each mode configuration corresponds to one of two or more output signal voltages. The output signal is compared with a reference signal to produce a direction comparison signal. The direction comparison signal is used to produce the mode control signal.

Abstract: A voltage supply system is disclosed, comprising a boost converter configured to receive an input voltage and generate a first output voltage at a first output node, a low-voltage supply circuit configured to receive the input voltage and generate a second output voltage at a second output node, and a routing circuit configured to route the first output voltage of the boost converter to the second output node during a selected condition of the input voltage.

Abstract: Power amplification system with shared common base biasing. A power amplification system can include a plurality of cascode amplifier sections. Each one of the plurality of cascode amplifier sections can include including a first transistor and a second transistor. The power amplification system can include a plurality of common emitter biasing components. Each one of the plurality of common emitter biasing components can be coupled to a base of the first transistor of a respective one of the plurality of cascode amplifier sections and can be controllable to bias the first transistor of the respective one of the plurality of cascode amplifier sections. The power amplification system can include a common base biasing component coupled to a base of the second transistor of each of the plurality of cascode amplifier sections and controllable to bias the second transistor of each of the plurality of cascode amplifier sections.

Abstract: According to some implementations, a power amplifier (PA) includes a common emitter configured to receive a radio-frequency (RF) signal. The PA also includes a carrier amplifier coupled to the common emitter to form a carrier cascode configuration, a collector of the carrier amplifier provided with a first supply voltage. The PA further includes a peaking amplifier coupled to the common emitter to form a peaking cascode configuration, a collector of the peaking amplifier provided with a second supply voltage greater than the first supply voltage.

Abstract: Switched-mode power supply with switch resizing. A power converter can include an inductor coupled between an input node and an intermediate node, a semiconductor device coupled between the intermediate node and an output node, and a plurality of drive transistors. Each one of the plurality of drive transistors can have a drain coupled to the intermediate node and a source coupled to a ground potential.

Abstract: Power amplifier module with power supply control. A power amplification control system can include an interface configured to receive a transceiver control signal from a transceiver. The power amplification control system can include a power amplifier control component configured to generate a power amplifier control signal based on the transceiver control signal from the transceiver and a power supply control component configured to generate a power supply control signal based on the transceiver control signal from the transceiver and to generate the power supply control signal based on a local control signal from the power amplifier control component.