Patents by Inventor David Tarjan

David Tarjan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240313964
    Abstract: This disclosure relates to systems and methods for managing protected electronic content using proxy reencryption techniques. Rights management architectures are described that may, among other things, provide end-to-end protection of content keys from their point of origination at a content creator and/or content service to end user devices. Proxy reencryption techniques consistent with aspects of the disclosed embodiments may enable transformation of a ciphertext under one public key to a ciphertext containing the same plaintext under another public key. Consistent with embodiments disclosed herein, proxy reencryption processes may be implemented using indistinguishability obfuscation and puncturable public-key encryption schemes, functional encryption, and/or white box obfuscation techniques.
    Type: Application
    Filed: May 14, 2024
    Publication date: September 19, 2024
    Applicant: Intertrust Technologies Corporation
    Inventors: Vanishree Rao, Robert Tarjan, David P. Maher
  • Patent number: 11810268
    Abstract: Apparatuses, systems, and techniques are presented to generate images with one or more visual effects applied. In at least one embodiment, one or more visual effects are applied to one or more images having a resolution that is less than a first resolution and those visual effects approximated for one or more images having a resolution that is greater than or equal to the first resolution.
    Type: Grant
    Filed: February 4, 2022
    Date of Patent: November 7, 2023
    Assignee: NVIDIA Corporation
    Inventors: Robert Pottorff, David Tarjan, Andrew Tao, Bryan Catanzaro
  • Publication number: 20230196662
    Abstract: Apparatuses, systems, and techniques are presented to reconstruct one or more images. In at least one embodiment, one or more circuits are to use one or more neural networks to adjust one or more pixel blending weights.
    Type: Application
    Filed: December 20, 2021
    Publication date: June 22, 2023
    Inventors: Pietari Kaskela, Andrew Tao, Michael Ranzinger, David Tarjan, Jonathan Filip Gustav Granskog, Jorge Albericio Latorre
  • Publication number: 20230177649
    Abstract: Apparatuses, systems, and techniques are presented to reconstruct one or more images. In at least one embodiment, one or more objects in an image are caused to be generated based, at least in part, on applying one or more offsets to a motion of the one or more objects relative to one or more prior images.
    Type: Application
    Filed: December 3, 2021
    Publication date: June 8, 2023
    Inventors: Gregory Massal, David Tarjan, Jonathan Filip Gustav Granskog
  • Publication number: 20220222778
    Abstract: Apparatuses, systems, and techniques are presented to generate images. In at least one embodiment, one or more neural networks are used to generate one or more images using one or more pixel weights determined based, at least in part, on one or more sub-pixel offset values.
    Type: Application
    Filed: March 31, 2022
    Publication date: July 14, 2022
    Inventors: Shiqiu Liu, Robert Thomas Pottorff, Guilin Liu, Karan Sapra, Jon Barker, David Tarjan, Pekka Janis, Edvard Olav Valter Fagerholm, Lei Yang, Kevin Jonathan Shih, Marco Salvi, Timo Roman, Andrew Tao, Bryan Christopher Catanzaro
  • Publication number: 20220156883
    Abstract: Apparatuses, systems, and techniques are presented to generate images with one or more visual effects applied. In at least one embodiment, one or more visual effects are applied to one or more images having a resolution that is less than a first resolution and those visual effects approximated for one or more images having a resolution that is greater than or equal to the first resolution.
    Type: Application
    Filed: February 4, 2022
    Publication date: May 19, 2022
    Inventors: Robert Pottorff, David Tarjan, Andrew Tao, Bryan Catanzaro
  • Publication number: 20220114700
    Abstract: Apparatuses, systems, and techniques are presented to generate images. In at least one embodiment, one or more neural networks are used to generate one or more images using one or more pixel weights determined based, at least in part, on one or more sub-pixel offset values.
    Type: Application
    Filed: October 8, 2020
    Publication date: April 14, 2022
    Inventors: Shiqiu Liu, Robert Pottorff, Guilin Liu, Karan Sapra, Jon Barker, David Tarjan, Pekka Janis, Edvard Fagerholm, Lei Yang, Kevin Shih, Marco Salvi, Timo Roman, Andrew Tao, Bryan Catanzaro
  • Publication number: 20220114701
    Abstract: Apparatuses, systems, and techniques are presented to generate images. In at least one embodiment, one or more neural networks are used to generate one or more images using one or more pixel weights determined based, at least in part, on one or more sub-pixel offset values.
    Type: Application
    Filed: February 10, 2021
    Publication date: April 14, 2022
    Inventors: Shiqiu Liu, Robert Pottorff, Guilin Liu, Karan Sapra, Jon Barker, David Tarjan, Pekka Janis, Edvard Fagerholm, Lei Yang, Kevin Shih, Marco Salvi, Timo Roman, Andrew Tao, Bryan Catanzaro
  • Publication number: 20220114702
    Abstract: Apparatuses, systems, and techniques are presented to generate images. In at least one embodiment, one or more neural networks are used to generate one or more images using one or more pixel weights.
    Type: Application
    Filed: August 19, 2021
    Publication date: April 14, 2022
    Inventors: Shiqiu Liu, Robert Pottorff, Guilin Liu, Karan Sapra, Jon Barker, David Tarjan, Pekka Janis, Edvard Fagerholm, Lei Yang, Kevin Jonathan Shih, Marco Salvi, Timo Roman, Andrew Tao, Bryan Catanzaro
  • Publication number: 20220067879
    Abstract: Apparatuses, systems, and techniques are presented to generate images with one or more visual effects applied. In at least one embodiment, one or more visual effects are applied to one or more images having a resolution that is less than a first resolution and those visual effects approximated for one or more images having a resolution that is greater than or equal to the first resolution.
    Type: Application
    Filed: September 3, 2020
    Publication date: March 3, 2022
    Inventors: Robert Pottorff, David Tarjan, Andrew Tao, Bryan Catanzaro
  • Publication number: 20210383505
    Abstract: Apparatuses, systems, and techniques are presented to generate images with one or more visual effects applied. In at least one embodiment, one or more visual effects are applied to one or more images having a resolution that is less than a first resolution and those visual effects approximated for one or more images having a resolution that is greater than or equal to the first resolution.
    Type: Application
    Filed: August 19, 2021
    Publication date: December 9, 2021
    Inventors: Robert Pottorff, David Tarjan, Andrew Tao, Bryan Catanzaro
  • Publication number: 20190297326
    Abstract: A neural network architecture is disclosed for performing video frame prediction using a sequence of video frames and corresponding pairwise optical flows. The neural network processes the sequence of video frames and optical flows utilizing three-dimensional convolution operations, where time (or multiple video frames in the sequence of video frames) provides the third dimension in addition to the two-dimensional pixel space of the video frames. The neural network generates a set of parameters used to predict a next video frame in the sequence of video frames by sampling a previous video frame utilizing spatially-displaced convolution operations. In one embodiment, the set of parameters includes a displacement vector and at least one convolution kernel per pixel. Generating a pixel value in the next video frame includes applying the convolution kernel to a corresponding patch of pixels in the previous video frame based on the displacement vector.
    Type: Application
    Filed: March 21, 2019
    Publication date: September 26, 2019
    Inventors: Fitsum A. Reda, Guilin Liu, Kevin Shih, Robert Kirby, Jonathan Barker, David Tarjan, Andrew Tao, Bryan Catanzaro
  • Patent number: 9305392
    Abstract: Techniques are disclosed for tracing a ray within a parallel processing unit. A first thread receives a ray or a ray segment for tracing and identifies a first node within an acceleration structure associated with the ray, where the first node is associated with a volume of space traversed by the ray. The thread identifies the child nodes of the first node, where each child node is associated with a different sub-volume of space, and each sub-volume is associated with a corresponding ray segment. The thread determines that two or more nodes are associated with sub-volumes of space that intersect the ray segment. The thread selects one of these nodes for processing by the first thread and another for processing by a second thread. One advantage of the disclosed technique is that the threads in a thread group perform ray tracing more efficiently in that idle time is reduced.
    Type: Grant
    Filed: December 13, 2012
    Date of Patent: April 5, 2016
    Assignee: NVIDIA Corporation
    Inventors: David Luebke, Timo Aila, Jacopo Pantaleoni, David Tarjan
  • Patent number: 9165396
    Abstract: A processor and a system are provided for performing texturing operations. The processor includes a texture return buffer having a plurality of slots for storing texture values and one or more texture units coupled to the texture return buffer. Each of the slots of the texture return buffer are addressable by a thread. Each texture unit is configured to allocate a slot of the texture return buffer when the texture unit generates a texture value.
    Type: Grant
    Filed: February 26, 2013
    Date of Patent: October 20, 2015
    Assignee: NVIDIA Corporation
    Inventor: David Tarjan
  • Patent number: 8943091
    Abstract: A system, method, and computer program product are provided for performing a string search. In use, a first string and a second string are identified. Additionally, a string search is performed, utilizing the first string and the second string.
    Type: Grant
    Filed: November 1, 2012
    Date of Patent: January 27, 2015
    Assignee: NVIDIA Corporation
    Inventors: Jacopo Pantaleoni, David Tarjan
  • Publication number: 20140240329
    Abstract: A processor and a system are provided for performing texturing operations. The processor includes a texture return buffer having a plurality of slots for storing texture values and one or more texture units coupled to the texture return buffer. Each of the slots of the texture return buffer are addressable by a thread. Each texture unit is configured to allocate a slot of the texture return buffer when the texture unit generates a texture value.
    Type: Application
    Filed: February 26, 2013
    Publication date: August 28, 2014
    Applicant: NVIDIA CORPORATION
    Inventor: David Tarjan
  • Publication number: 20140168228
    Abstract: Techniques are disclosed for tracing a ray within a parallel processing unit. A first thread receives a ray or a ray segment for tracing and identifies a first node within an acceleration structure associated with the ray, where the first node is associated with a volume of space traversed by the ray. The thread identifies the child nodes of the first node, where each child node is associated with a different sub-volume of space, and each sub-volume is associated with a corresponding ray segment. The thread determines that two or more nodes are associated with sub-volumes of space that intersect the ray segment. The thread selects one of these nodes for processing by the first thread and another for processing by a second thread. One advantage of the disclosed technique is that the threads in a thread group perform ray tracing more efficiently in that idle time is reduced.
    Type: Application
    Filed: December 13, 2012
    Publication date: June 19, 2014
    Applicant: NVIDIA Corporation
    Inventors: David LUEBKE, Timo AILA, Jacopo PANTALEONI, David TARJAN
  • Publication number: 20140168238
    Abstract: Techniques are disclosed for tracing a ray within a parallel processing unit. A first thread receives a ray or a ray segment for tracing and identifies a first node within an acceleration structure associated with the ray, where the first node is associated with a volume of space traversed by the ray. The thread identifies the child nodes of the first node, where each child node is associated with a different sub-volume of space, and each sub-volume is associated with a corresponding ray segment. The thread determines that two or more nodes are associated with sub-volumes of space that intersect the ray segment. The thread selects one of these nodes for processing by the first thread and another for processing by a second thread. One advantage of the disclosed technique is that the threads in a thread group perform ray tracing more efficiently in that idle time is reduced.
    Type: Application
    Filed: December 13, 2012
    Publication date: June 19, 2014
    Applicant: NVIDIA Corporation
    Inventors: David LUEBKE, Timo AILA, Jacopo PANTALEONI, David TARJAN
  • Patent number: 8732711
    Abstract: One embodiment of the present invention sets forth a technique for scheduling thread execution in a multi-threaded processing environment. A two-level scheduler maintains a small set of active threads called strands to hide function unit pipeline latency and local memory access latency. The strands are a sub-set of a larger set of pending threads that is also maintained by the two-leveler scheduler. Pending threads are promoted to strands and strands are demoted to pending threads based on latency characteristics. The two-level scheduler selects strands for execution based on strand state. The longer latency of the pending threads is hidden by selecting strands for execution. When the latency for a pending thread is expired, the pending thread may be promoted to a strand and begin (or resume) execution. When a strand encounters a latency event, the strand may be demoted to a pending thread while the latency is incurred.
    Type: Grant
    Filed: June 1, 2011
    Date of Patent: May 20, 2014
    Assignee: NVIDIA Corporation
    Inventors: William James Dally, Stephen William Keckler, David Tarjan, John Erik Lindholm, Mark Alan Gebhart, Daniel Robert Johnson
  • Publication number: 20140122509
    Abstract: A system, method, and computer program product are provided for performing a string search. In use, a first string and a second string are identified. Additionally, a string search is performed, utilizing the first string and the second string.
    Type: Application
    Filed: November 1, 2012
    Publication date: May 1, 2014
    Applicant: NVIDIA CORPORATION
    Inventors: Jacopo Pantaleoni, David Tarjan