Patents by Inventor David Wallis

David Wallis has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6914906
    Abstract: A method for virtual end nodes indicates in routing information (51) that the data packet is for a “special access” to an end node with a virtual address (60). An RF network device then inserts the identity of the physical end node (virtual address) into user information (62). If an access point (14) determines that the user information is for the virtual address (66), then all virtual end nodes 41-43 receive the data packet and analyze the virtual end node identity from the user information (68).
    Type: Grant
    Filed: July 1, 1998
    Date of Patent: July 5, 2005
    Assignee: Motorola, Inc.
    Inventors: Lanny Joe Mullens, David Wallis, Gail Miyamoto, Michael Kronick
  • Publication number: 20050104575
    Abstract: An electric power meter (102) includes a temperature sensor (114) and a controller (112). The controller (112) is operable, based on the temperature reported from the temperature sensor (114), to generate alarm(s) when the temperature exceeds certain alarm threshold(s) (307, 507, 508) and to activate a power disconnect switch (104), thereby shutting off power to a customer premises, when the temperature exceeds a shut off threshold (309, 509). The controller (112) is operable to activate the power disconnect switch (104) for non-payment of electricity cost, subject to secondary criteria based on regulatory requirements. A customer terminal (103) may be used to notify a customer of an alarm condition, to provide information regarding electrical power usage or to provide information regarding disconnection of electrical power.
    Type: Application
    Filed: December 9, 2004
    Publication date: May 19, 2005
    Inventors: David Yee, Philip Zucarelli, Theodore Keller, David Wallis
  • Publication number: 20040248341
    Abstract: A conductive connection is made between a semiconductor chip and an external conductor structure. An elevation element is applied on the surface of the semiconductor chip and a soldering island is arranged on the elevation element. An interconnect is produced below the soldering island as far as a bonding island or an I/O pad. Increased reliability of conductive connections of the bonding island or the I/O pad to an external conductive structure can be achieved by preventing the flowing-away of the solder and the oxidation or corrosion of the conductive layer.
    Type: Application
    Filed: May 7, 2004
    Publication date: December 9, 2004
    Inventors: Octavio Trovarelli, Ingo Uhlendorf, David Wallis, Axel Brintzinger
  • Patent number: 6752694
    Abstract: An apparatus (10) for wafer grinding includes sensors (38) and a spectral analyzer to perform a spectral analysis of light received by the sensors (38) during grinding of a semiconductor wafer (12). Based on the spectral analysis, the grinding process is stopped or the force applied to the semiconductor wafer is modified. This in situ monitoring decreases breakage and overheating of the semiconductor wafer (12).
    Type: Grant
    Filed: November 8, 2002
    Date of Patent: June 22, 2004
    Assignees: Motorola, Inc., Semiconductor 300 GmbH & Co.KG, Infineon Technologies AG
    Inventors: Manfred Schneegans, Michael Roesner, David Wallis
  • Publication number: 20040092209
    Abstract: An apparatus (10) for wafer grinding includes sensors (38) and a spectral analyzer to perform a spectral analysis of light received by the sensors (38) during grinding of a semiconductor wafer (12). Based on the spectral analysis, the grinding process is stopped or the force applied to the semiconductor wafer is modified. This in situ monitoring decreases breakage and overheating of the semiconductor wafer (12).
    Type: Application
    Filed: November 8, 2002
    Publication date: May 13, 2004
    Inventors: Manfred Schneegans, Michael Roesner, David Wallis
  • Patent number: 6709953
    Abstract: The present invention provides a new backside treatment of the wafer. Trenches are cut into the top surface of the wafer by sawing or etching, and after grinding the wafer from the bottom side, a protective material is applied as a surface layer to the bottom surface while filling the trenches with this material. The material is hardened in order to accomplish the sawing process. In another embodiment of the present method, a double foil layer is applied to the rear side of the wafer including a mounting tape and a protective layer facing the wafer rear side.
    Type: Grant
    Filed: January 31, 2002
    Date of Patent: March 23, 2004
    Assignee: Infineon Technologies AG
    Inventors: Barbara Vasquez, David Wallis, Sylvia Winter
  • Patent number: 6633379
    Abstract: A machining apparatus (10) comprises a material removing tool (12) movably mounted for removing material from a workpiece (14); means for illuminating (42, 54) a sample area upon a tool surface (34) with excitation radiation; means for receiving (42, 54) sample light emitted from the sample area; a spectral analyzer (54) for performing a spectral analysis of the sample light received; and means for determining (60) the condition of the tool at the sample area from the spectral analysis of the sample light. The wear of the tool (12) is determined as such a condition. Operation parameters of the machining apparatus (10) are adjusted according to the determined wear. An example application is a wafer dicing tool.
    Type: Grant
    Filed: June 8, 2001
    Date of Patent: October 14, 2003
    Assignees: Semiconductor 300 GmbH & Co. KG, Infineon Technologies AG
    Inventors: Michael Roesner, Manfred Schneegans, David Wallis
  • Publication number: 20030143818
    Abstract: The present invention provides a new backside treatment of the wafer. Trenches are cut into the top surface of the wafer by sawing or etching, and after grinding the wafer from the bottom side, a protective material is applied as a surface layer to the bottom surface while filling the trenches with this material. The material is hardened in order to accomplish the sawing process. In another embodiment of the present method, a double foil layer is applied to the rear side of the wafer including a mounting tape and a protective layer facing the wafer rear side.
    Type: Application
    Filed: January 31, 2002
    Publication date: July 31, 2003
    Inventors: Barbara Vasquez, David Wallis, Sylvia Winter
  • Publication number: 20020186370
    Abstract: A machining apparatus (10) comprises a material removing tool (12) movably mounted for removing material from a workpiece (14); means for illuminating (42, 54) a sample area upon a tool surface (34) with excitation radiation; means for receiving (42, 54) sample light emitted from the sample area; a spectral analyzer (54) for performing a spectral analysis of the sample light received; and means for determining (60) the condition of the tool at the sample area from the spectral analysis of the sample light. The wear of the tool (12) is determined as such a condition. Operation parameters of the machining apparatus (10) are adjusted according to the determined wear. An example application is a wafer dicing tool.
    Type: Application
    Filed: June 8, 2001
    Publication date: December 12, 2002
    Applicant: Motorola, Inc., Semiconductor 300 GmbH & Co.KG and Infineon Technologies AG.
    Inventors: Michael Roesner, Manfred Schneegans, David Wallis
  • Patent number: 6473285
    Abstract: A surge-gap device (300) includes two electrodes (310, 315), having an inside portion and an outside portion, and an insulator material (320), which secures the two electrodes (310, 315). The insulator material (320) has an opening through the material to expose an open-air gap (325) that is defined by the space between the two inside portions of the electrodes (310, 315). In cases of a voltage surge, the surge-gap device permits an arc to pass between the proximate inside portions of the electrodes (310, 315) across the open-air gap (325), which gives a current surge a low impedance path to ground. Also included is a fastener (305) for electrically coupling the surge-gap device (300) to a ground plane (220) of an external electrical device (300) for suppressing the voltage and current surges.
    Type: Grant
    Filed: September 13, 2000
    Date of Patent: October 29, 2002
    Assignee: Scientific-Atlanta, Inc.
    Inventors: Alan J. Schlenz, David Wallis
  • Publication number: 20020079113
    Abstract: A device including a housing (305) for enclosing electronic components and having an aperture therethrough. The device further includes a control element (300) and is inserted through the aperture. The control element (300) has a control end and a mating end, wherein when the control element (300) is inserted into the aperture of the housing (305), the mating end mates with an electronic component and is controlled by the control end. A sealing element (315) is placed around a groove (515) of the control element (300) for sealing the control element (300), after insertion into the housing (305), from the surrounding environment elements; and then a retaining means (325) is placed around the control element (300) on a region of the control element (300) that extends into an interior of the housing (305), wherein the retaining means (325) exerts force onto the housing (305), thereby securing the control element (300) within the housing (305).
    Type: Application
    Filed: December 21, 2000
    Publication date: June 27, 2002
    Inventors: David Wallis, Jeffrey P. Hughes, Khalid Kidari, Alan J. Schlenz
  • Patent number: 6363070
    Abstract: A method for virtual end nodes indicates in routing information (51) that the routing information is a “special access” to a virtual end node (60). An RF network device then inserts the identity (52) of the physical end node into user information (62) and insert a filter field for selecting which virtual end node(s) are to respond to the user information (63). An end node (41) determines whether the user information is for it (69-72), then the end node 41 responds to the RF network (75), otherwise the end node 41 ignores the user information.
    Type: Grant
    Filed: July 1, 1998
    Date of Patent: March 26, 2002
    Assignee: Motorola, Inc.
    Inventors: Lanny Joe Mullens, David Wallis, Eric Eckert