Patents by Inventor Davide Chiola
Davide Chiola has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11955407Abstract: An electronic module includes a semiconductor package including a die carrier, a semiconductor transistor die disposed on the die carrier, an electrical conductor connected to the semiconductor die, and an encapsulant covering the die carrier, the semiconductor die, and the electrical conductor so that a portion of the electrical conductor extends to the outside of the encapsulant. The electronic module further includes an interposer layer on which the semiconductor package is disposed, and a heat sink through which a cooling medium can flow. The interposer layer is disposed on the heatsink.Type: GrantFiled: January 18, 2021Date of Patent: April 9, 2024Assignee: Infineon Technologies Austria AGInventors: Edward Fuergut, Davide Chiola, Martin Gruber, Wolfram Hable
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Publication number: 20210225734Abstract: An electronic module includes a semiconductor package including a die carrier, a semiconductor transistor die disposed on the die carrier, an electrical conductor connected to the semiconductor die, and an encapsulant covering the die carrier, the semiconductor die, and the electrical conductor so that a portion of the electrical conductor extends to the outside of the encapsulant. The electronic module further includes an interposer layer on which the semiconductor package is disposed, and a heat sink through which a cooling medium can flow. The interposer layer is disposed on the heatsink.Type: ApplicationFiled: January 18, 2021Publication date: July 22, 2021Inventors: Edward Fuergut, Davide Chiola, Martin Gruber, Wolfram Hable
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Patent number: 10109544Abstract: Various embodiments provide an electronic module comprising a baseplate. A recess is formed in one main surface of the baseplate, wherein the recess is adapted to accommodate an electronic chip. The electronic chip is attached to a substrate or carrier and is placed in the recess.Type: GrantFiled: June 22, 2017Date of Patent: October 23, 2018Assignee: Infineon Technologies AGInventors: Fabio Brucchi, Davide Chiola
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Patent number: 9865749Abstract: A Merged P-i-N Schottky device in which the oppositely doped diffusions extend to a depth and have been spaced apart such that the device is capable of absorbing a reverse avalanche energy comparable to a Fast Recovery Epitaxial Diode having a comparatively deeper oppositely doped diffusion region.Type: GrantFiled: December 7, 2010Date of Patent: January 9, 2018Assignee: Siliconix Technology C. V.Inventors: Davide Chiola, Kohji Andoh, Silvestro Fimiani
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Publication number: 20170287798Abstract: Various embodiments provide an electronic module comprising a baseplate. A recess is formed in one main surface of the baseplate, wherein the recess is adapted to accommodate an electronic chip. The electronic chip is attached to a substrate or carrier and is placed in the recess.Type: ApplicationFiled: June 22, 2017Publication date: October 5, 2017Inventors: Fabio BRUCCHI, Davide CHIOLA
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Patent number: 9716018Abstract: Various embodiments provide methods for manufacturing a baseplate for an electronic module and an electronic module comprising a baseplate, wherein the baseplate comprises a conductive material; and a recess formed in one main surface of the baseplate and being adapted to accommodate an electronic chip.Type: GrantFiled: March 15, 2016Date of Patent: July 25, 2017Assignee: Infineon Technologies AGInventors: Fabio Brucchi, Davide Chiola
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Publication number: 20160196989Abstract: Various embodiments provide methods for manufacturing a baseplate for an electronic module and an electronic module comprising a baseplate, wherein the baseplate comprises a conductive material; and a recess formed in one main surface of the baseplate and being adapted to accommodate an electronic chip.Type: ApplicationFiled: March 15, 2016Publication date: July 7, 2016Inventors: Fabio BRUCCHI, Davide Chiola
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Patent number: 9305874Abstract: Various embodiments provide a baseplate for an electronic module, wherein the baseplate comprises a conductive material; and a recess formed in one main surface of the baseplate and being adapted to accommodate an electronic chip.Type: GrantFiled: April 13, 2014Date of Patent: April 5, 2016Assignee: Infineon Technologies AGInventors: Fabio Brucchi, Davide Chiola
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Publication number: 20150294931Abstract: Various embodiments provide a baseplate for an electronic module, wherein the baseplate comprises a conductive material; and a recess formed in one main surface of the baseplate and being adapted to accommodate an electronic chip.Type: ApplicationFiled: April 13, 2014Publication date: October 15, 2015Applicant: INFINEON TECHNOLOGIES AGInventors: Fabio BRUCCHI, Davide CHIOLA
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Publication number: 20140210061Abstract: Various embodiments provide a chip arrangement. The chip arrangement may include a first chip including a first contact and a second contact; a second chip; a leadframe including a first leadframe portion and a second leadframe portion electrically insulated from the first leadframe portion; and a plurality of pins coupled to the leadframe. At least one first pin is coupled to the first leadframe portion and at least one second pin is coupled to the second leadframe portion. The first contact of the first chip is electrically coupled to the first leadframe portion and the second contact of the first chip is coupled to the second leadframe portion. A contact of the second chip is electrically coupled to the second leadframe portion.Type: ApplicationFiled: January 28, 2013Publication date: July 31, 2014Applicant: INFINEON TECHNOLOGIES AUSTRIA AGInventors: Ralf Otremba, Klaus Schiess, Wolfgang Scholz, Teck Sim Lee, Fabio Brucchi, Davide Chiola, Wolfgang Peinhopf, Franz Stueckler
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Patent number: 8766430Abstract: In accordance with an embodiment of the present invention, a semiconductor module includes a first semiconductor device having a first plurality of leads including a first gate/base lead, a first drain/collector lead, and a first source/emitter lead. The module further includes a second semiconductor device and a circuit board. The second semiconductor device has a second plurality of leads including a second gate/base lead, a second drain/collector lead, and a second source/emitter lead. The circuit board has a plurality of mounting holes, wherein each of the first plurality of leads and the second plurality of leads is mounted into a respective one of the plurality of mounting holes. At the plurality of mounting holes, a first distance from the first gate/base lead to the second gate/base lead is different from a second distance from the first source/emitter lead to the second source/emitter lead.Type: GrantFiled: June 14, 2012Date of Patent: July 1, 2014Assignee: Infineon Technologies AGInventors: Ralf Otremba, Davide Chiola, Erich Griebl, Fabio Brucchi
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Publication number: 20130334677Abstract: In accordance with an embodiment of the present invention, a semiconductor module includes a first semiconductor device having a first plurality of leads including a first gate/base lead, a first drain/collector lead, and a first source/emitter lead. The module further includes a second semiconductor device and a circuit board. The second semiconductor device has a second plurality of leads including a second gate/base lead, a second drain/collector lead, and a second source/emitter lead. The circuit board has a plurality of mounting holes, wherein each of the first plurality of leads and the second plurality of leads is mounted into a respective one of the plurality of mounting holes. At the plurality of mounting holes, a first distance from the first gate/base lead to the second gate/base lead is different from a second distance from the first source/emitter lead to the second source/emitter lead.Type: ApplicationFiled: June 14, 2012Publication date: December 19, 2013Applicant: Infineon Technologies AGInventors: Ralf Otremba, Davide Chiola, Erich Griebl, Fabio Brucchi
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Patent number: 8304305Abstract: A method for producing a semiconductor component is proposed. The method includes providing a semiconductor body having a first surface; forming a mask on the first surface, wherein the mask has openings for defining respective positions of trenches; producing the trenches in the semiconductor body using the mask, wherein mesa structures remain between adjacent trenches; introducing a first dopant of a first conduction type using the mask into the bottoms of the trenches; carrying out a first thermal step; introducing a second dopant of a second conduction type, which is complementary to the first conduction type, at least into the bottoms of the trenches; and carrying out a second thermal step.Type: GrantFiled: June 8, 2011Date of Patent: November 6, 2012Assignee: Infineon Technologies Austria AGInventors: Davide Chiola, Carsten Schaeffer
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Patent number: 8143655Abstract: A fabrication process for a trench Schottky diode with differential oxide thickness within the trenches includes forming a first nitride layer on a substrate surface and subsequently forming a plurality of trenches in the substrate including, possibly, a termination trench. Following a sacrificial oxide layer formation and removal, sidewall and bottom surfaces of the trenches are oxidized. A second nitride layer is then applied to the substrate and etched such that the second nitride layer covers the oxide layer on the trench sidewalls but exposes the oxide layer on the trench bottom surfaces. The trench bottom surfaces are then re-oxidized and the remaining second nitride layer then removed from the sidewalls, resulting in an oxide layer of varying thickness being formed on the sidewall and bottom surfaces of each trench. The trenches are then filled with a P type polysilicon, the first nitride layer removed, and a Schottky barrier metal applied to the substrate surface.Type: GrantFiled: October 11, 2007Date of Patent: March 27, 2012Assignee: International Rectifier CorporationInventor: Davide Chiola
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Publication number: 20110233728Abstract: A method for producing a semiconductor component is proposed. The method includes providing a semiconductor body having a first surface; forming a mask on the first surface, wherein the mask has openings for defining respective positions of trenches; producing the trenches in the semiconductor body using the mask, wherein mesa structures remain between adjacent trenches; introducing a first dopant of a first conduction type using the mask into the bottoms of the trenches; carrying out a first thermal step; introducing a second dopant of a second conduction type, which is complementary to the first conduction type, at least into the bottoms of the trenches; and carrying out a second thermal step.Type: ApplicationFiled: June 8, 2011Publication date: September 29, 2011Applicant: Infineon Technologies Austria AGInventors: Davide CHIOLA, Carsten SCHAEFFER
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Patent number: 8003456Abstract: A method for producing a semiconductor component is proposed. The method includes providing a semiconductor body having a first surface; forming a mask on the first surface, wherein the mask has openings for defining respective positions of trenches; producing the trenches in the semiconductor body using the mask, wherein mesa structures remain between adjacent trenches; introducing a first dopant of a first conduction type using the mask into the bottoms of the trenches; carrying out a first thermal step; introducing a second dopant of a second conduction type, which is complementary to the first conduction type, at least into the bottoms of the trenches; and carrying out a second thermal step.Type: GrantFiled: June 25, 2008Date of Patent: August 23, 2011Assignee: Infineon Technologies Austria AGInventors: Davide Chiola, Carsten Schaeffer
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Patent number: 7973381Abstract: A schottky diode of the trench variety which includes a trench termination having a thick insulation layer that is thicker than the insulation layer inside the trenches in its active region.Type: GrantFiled: September 8, 2004Date of Patent: July 5, 2011Assignee: International Rectifier CorporationInventor: Davide Chiola
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Patent number: 7858456Abstract: Merged P-i-N Schottky device in which the oppositely doped diffusions extend to a depth and have been spaced apart such that the device is capable of absorbing a reverse avalanche energy comparable to a Fast Recovery Epitaxial Diode having a comparatively deeper oppositely doped diffusion region.Type: GrantFiled: April 11, 2006Date of Patent: December 28, 2010Assignee: Siliconix Technology C. V.Inventors: Davide Chiola, Kohji Andoh, Silvestro Fimiani
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Patent number: 7754550Abstract: The gate oxide in the trenches of a trench type Schottky device are formed by oxidizing a layer of polysilicon deposited in trenches of a silicon or silicon carbide substrate. A small amount of the substrate is also oxidized to create a good interface between the substrate and the oxide layer which is formed. The corners of the trench are rounded by the initial formation and removal of a sacrificial oxide layer.Type: GrantFiled: July 6, 2004Date of Patent: July 13, 2010Assignee: International Rectifier CorporationInventors: Davide Chiola, Zhi He
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Patent number: 7655977Abstract: An IGBT for controlling the application of power to a plasma display panel has an increased current conduction capability and a reduced conduction loss at the expense of a reduced safe operating area. For a device with a 300 volt breakdown voltage rating, the die has a substrate resistivity less than 10 m ohm cm; a buffer layer thickness of about 8 ?m resistivity in the range of 0.05 to 0.10 ohm cm, and an epi layer for receiving junction patterns and trenches, which has a thickness of from 31 to 37 ?m and resistivity in te range of 14 to 18 ohm cm.Type: GrantFiled: October 18, 2005Date of Patent: February 2, 2010Assignee: International Rectifier CorporationInventors: Chiu Ng, Davide Chiola