Patents by Inventor Davood Shahrjerdi

Davood Shahrjerdi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11946895
    Abstract: Principles for reliable manufacturing carbon-based electrodes with arbitrary sensitivity and homogeneity are provided. Specifically, the sensitivity of carbon-based electrodes can be engineered by changing the density of sp2 type defects present in a multilayer graphene film. The engineered carbon-based electrodes can be used as a passive sensing element in electrochemical measurement of a target analyte. Carbon-based electrodes are also disclosed that have sp2 hybridization and can include multilayer graphene films. The disclosed carbon-based electrodes have a density of zero-dimensional defects (i.e., point-like defects) which provides enhanced area-normalized sensitivity when used in sensing applications. The maximum area-normalized sensitivity is achieved at the point defect density of 4-5×1012 cm?2.
    Type: Grant
    Filed: July 31, 2018
    Date of Patent: April 2, 2024
    Assignee: NEW YORK UNIVERSITY
    Inventors: Davood Shahrjerdi, Roozbeh Kiani, Ting Wu
  • Patent number: 11378545
    Abstract: A semiconductor structure capable of real-time spatial sensing of nanoparticles within a nanofluid is provided. The structure includes an array of gate structures. An interlevel dielectric material surrounds the array of gate structures. A vertical inlet channel is located within a portion of the interlevel dielectric material and on one side of the array of gate structures. A vertical outlet channel is located within another portion of the interlevel dielectric material and on another side of the array of gate structures. A horizontal channel that functions as a back gate is in fluid communication with the vertical inlet and outlet channels, and is located beneath the array of gate structures. A back gate dielectric material portion lines exposed surfaces within the vertical inlet channel, the vertical outlet channel and the horizontal channel.
    Type: Grant
    Filed: February 19, 2020
    Date of Patent: July 5, 2022
    Assignee: International Business Machines Corporation
    Inventors: Kangguo Cheng, Ali Khakifirooz, Ghavam G. Shahidi, Davood Shahrjerdi
  • Patent number: 11103168
    Abstract: Systems and methods for measuring electrophysiological and electrochemical signals in a portion of a body of a subject are provided. The structure includes an array of electrochemical sensors made of miniaturized multi-layer graphene, an array of electrophysiological electrodes, an integrated front-end readout circuit, and narrow silicon shafts with metal spines. The sensor arrays offer significantly higher sensitivity than conventional methods and enable simultaneous, multi-site measurement of chemical and electrophysiological. The front-end circuit contains features that allow significant improvement in detection of the resulting electrochemical current produced by the electrochemical sensing electrodes. The silicone probes allow measurements deep in the body.
    Type: Grant
    Filed: August 8, 2017
    Date of Patent: August 31, 2021
    Assignee: NEW YORK UNIVERSITY
    Inventors: Roozbeh Kiani, Davood Shahrjerdi, Bayan Nasri
  • Patent number: 11094842
    Abstract: A photovoltaic device and method include a doped germanium-containing substrate, an emitter contact coupled to the substrate on a first side and a back contact coupled to the substrate on a side opposite the first side. The emitter includes at least one doped layer of an opposite conductivity type as that of the substrate and the back contact includes at least one doped layer of the same conductivity type as that of the substrate. The at least one doped layer of the emitter contact or the at least one doped layer of the back contact is in direct contact with the substrate, and the at least one doped layer of the emitter contact or the back contact includes an n-type material having an electron affinity smaller than that of the substrate, or a p-type material having a hole affinity larger than that of the substrate.
    Type: Grant
    Filed: February 26, 2019
    Date of Patent: August 17, 2021
    Assignee: International Business Machines Corporation
    Inventors: Stephen W. Bedell, Keith E. Fogel, Bahman Hekmatshoar-Tabari, Devendra K. Sadana, Ghavam G. Shahidi, Davood Shahrjerdi
  • Patent number: 11011662
    Abstract: Photovoltaic devices such as solar cells having one or more field-effect hole or electron inversion/accumulation layers as contact regions are configured such that the electric field required for charge inversion and/or accumulation is provided by the output voltage of the photovoltaic device or that of an integrated solar cell unit. In some embodiments, a power source may be connected between a gate electrode and a contact region on the opposite side of photovoltaic device. In other embodiments, the photovoltaic device or integrated unit is self-powering.
    Type: Grant
    Filed: January 6, 2019
    Date of Patent: May 18, 2021
    Assignee: International Business Machines Corporation
    Inventors: Bahman Hekmatshoartabari, Devendra K. Sadana, Wilfried E. Haensch, Ghavam G. Shahidi, Davood Shahrjerdi
  • Publication number: 20210131994
    Abstract: Principles for reliable manufacturing carbon-based electrodes with arbitrary sensitivity and homogeneity are provided. Specifically, the sensitivity of carbon-based electrodes can be engineered by changing the density of sp2 type defects present in a multilayer graphene film. The engineered carbon-based electrodes can be used as a passive sensing element in electrochemical measurement of a target analyte. Carbon-based electrodes are also disclosed that have sp2 hybridization and can include multilayer graphene films. The disclosed carbon-based electrodes have a density of zero-dimensional defects (i.e., point-like defects) which provides enhanced area-normalized sensitivity when used in sensing applications. The maximum area-normalized sensitivity is achieved at the point defect density of 4-5×1012 cm?2.
    Type: Application
    Filed: July 31, 2018
    Publication date: May 6, 2021
    Applicant: NEW YORK UNIVERSITY
    Inventors: Davood SHAHRJERDI, Roozbeh KIANI, Ting WU
  • Patent number: 10957659
    Abstract: A method for making a photovoltaic device is provided that includes the steps of providing a silicon substrate having a complementary metal-oxide semiconductor (“CMOS”); bonding a first layer of silicon oxide to a second layer of silicon oxide wherein the bonded layers are deposited on the silicon substrate; and forming a III-V photovoltaic cell on a side of the bonded silicon oxide layers opposite the silicon substrate, wherein when the III-V photovoltaic cell is exposed to radiation, the III-V photovoltaic cell generates a current that powers a memory erasure device to cause an alteration of a memory state of a memory cell in an integrated circuit.
    Type: Grant
    Filed: May 23, 2019
    Date of Patent: March 23, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Kenneth Rodbell, Davood Shahrjerdi
  • Patent number: 10862692
    Abstract: An article of manufacture includes a substrate and a security primitive deposited on the substrate. The security primitive includes a transition metal dichalcogenide having a varying thickness. According to various embodiments, the transition metal dichalcogenide comprises a chalcogen atom (X) selected from the group consisting of S, Se, and Te and a transition metal (M) selected from the group consisting of Mo, W, Hf, and Zr. The security primitive is pixelated into a plurality of discrete regions having different luminescence. A security primitive key includes a first set of data values corresponding to a first set of coordinates of a first region and a second set of data values corresponding to a second set of coordinates of a second region. In some embodiments, the security primitive key is digitally captured through an optical reader and verified by querying a database.
    Type: Grant
    Filed: December 19, 2017
    Date of Patent: December 8, 2020
    Assignee: NEW YORK UNIVERSITY
    Inventors: Davood Shahrjerdi, Abdullah Alharbi
  • Patent number: 10790336
    Abstract: Hybrid high electron mobility field-effect transistors including inorganic channels and organic gate barrier layers are used in some applications for forming high resolution active matrix displays. Arrays of such high electron mobility field-effect transistors are electrically connected to thin film switching transistors and provide high drive currents for passive devices such as organic light emitting diodes. The organic gate barrier layers are operative to suppress both electron and hole transport between the inorganic channel layer and the gate electrodes of the high electron mobility field-effect transistors.
    Type: Grant
    Filed: April 6, 2019
    Date of Patent: September 29, 2020
    Assignee: International Business Machines Corporation
    Inventors: Ali Afzali-Ardakani, Bahman Hekmatshoartabari, Devendra K. Sadana, Davood Shahrjerdi
  • Patent number: 10772720
    Abstract: High resolution active matrix nanowire circuits enable a flexible platform for artificial electronic skin having pressure sensing capability. Comb-like interdigitated nanostructures extending vertically from a pair of opposing, flexible assemblies facilitate pressure sensing via changes in resistance caused by varying the extent of contact among the interdigitated nanostructures. Electrically isolated arrays of vertically extending, electrically conductive nanowires or nanofins are formed from a doped, electrically conductive layer, each of the arrays being electrically connected to a transistor in an array of transistors. The nanowires or nanofins are interdigitated with further electrically conductive nanowires or nanofins mounted to a flexible handle.
    Type: Grant
    Filed: May 12, 2018
    Date of Patent: September 15, 2020
    Assignee: International Business Machines Corporation
    Inventors: Bahman Hekmatshoartabari, Ghavam G. Shahidi, Davood Shahrjerdi
  • Patent number: 10763386
    Abstract: A photovoltaic device that includes an upper cell that absorbs a first range of wavelengths of light and a bottom cell that absorbs a second range of wavelengths of light. The bottom cell includes a heterojunction comprising a crystalline germanium containing (Ge) layer. At least one surface of the crystalline germanium (Ge) containing layer is in contact with a silicon (Si) containing layer having a larger band gap than the crystalline (Ge) containing layer.
    Type: Grant
    Filed: July 13, 2018
    Date of Patent: September 1, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Keith E. Fogel, Bahman Hekmatshoartabari, Devendra K. Sadana, Ghavam G. Shahidi, Davood Shahrjerdi
  • Patent number: 10756230
    Abstract: A photovoltaic device includes a crystalline substrate having a first dopant conductivity, an interdigitated back contact and a front surface field structure. The front surface field structure includes a crystalline layer formed on the substrate and a noncrystalline layer formed on the crystalline layer. The crystalline layer and the noncrystalline layer are doped with dopants having an opposite dopant conductivity from that of the substrate. Methods are also disclosed.
    Type: Grant
    Filed: March 21, 2018
    Date of Patent: August 25, 2020
    Assignee: International Business Machines Corporation
    Inventors: Tze-Chiang Chen, Bahman Hekmatshoartabari, Devendra K. Sadana, Davood Shahrjerdi
  • Patent number: 10707367
    Abstract: A photovoltaic device and method include a substrate coupled to an emitter side structure on a first side of the substrate and a back side structure on a side opposite the first side of the substrate. The emitter side structure or the back side structure include layers alternating between wide band gap layers and narrow band gap layers to provide a multilayer contact with an effectively increased band offset with the substrate and/or an effectively higher doping level over a single material contact. An emitter contact is coupled to the emitter side structure on a light collecting end portion of the device. A back contact is coupled to the back side structure opposite the light collecting end portion.
    Type: Grant
    Filed: December 12, 2018
    Date of Patent: July 7, 2020
    Assignee: International Business Machines Corporation
    Inventors: Bahman Hekmatshoar-Tabari, Devendra K. Sadana, Ghavam G. Shahidi, Davood Shahrjerdi
  • Publication number: 20200191746
    Abstract: A semiconductor structure capable of real-time spatial sensing of nanoparticles within a nanofluid is provided. The structure includes an array of gate structures. An interlevel dielectric material surrounds the array of gate structures. A vertical inlet channel is located within a portion of the interlevel dielectric material and on one side of the array of gate structures. A vertical outlet channel is located within another portion of the interlevel dielectric material and on another side of the array of gate structures. A horizontal channel that functions as a back gate is in fluid communication with the vertical inlet and outlet channels, and is located beneath the array of gate structures. A back gate dielectric material portion lines exposed surfaces within the vertical inlet channel, the vertical outlet channel and the horizontal channel.
    Type: Application
    Filed: February 19, 2020
    Publication date: June 18, 2020
    Inventors: Kangguo Cheng, Ali Khakifirooz, Ghavam G. Shahidi, Davood Shahrjerdi
  • Patent number: 10672929
    Abstract: A photovoltaic device and method include a doped germanium-containing substrate, an emitter contact coupled to the substrate on a first side and a back contact coupled to the substrate on a side opposite the first side. The emitter includes at least one doped layer of an opposite conductivity type as that of the substrate and the back contact includes at least one doped layer of the same conductivity type as that of the substrate. The at least one doped layer of the emitter contact or the at least one doped layer of the back contact is in direct contact with the substrate, and the at least one doped layer of the emitter contact or the back contact includes an n-type material having an electron affinity smaller than that of the substrate, or a p-type material having a hole affinity larger than that of the substrate.
    Type: Grant
    Filed: October 26, 2016
    Date of Patent: June 2, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Stephen W. Bedell, Keith E. Fogel, Bahman Hekmatshoar-Tabari, Devendra K. Sadana, Ghavam G. Shahidi, Davood Shahrjerdi
  • Patent number: 10651252
    Abstract: A method of forming an active matrix pixel that includes forming a driver device including contact regions deposited using a low temperature deposition process on a first portion of an insulating substrate. An electrode of an organic light emitting diode is formed on a second portion of the insulating substrate. The electrode is in electrical communication to receive an output from the driver device. At least one passivation layer is formed over the driver device. A switching device comprising at least one amorphous semiconductor layer is formed on the at least one passivation layer over the driver device.
    Type: Grant
    Filed: March 26, 2014
    Date of Patent: May 12, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Stephen M. Gates, Bahman Hekmatshoartabari, Ghavam G. Shahidi, Davood Shahrjerdi
  • Patent number: 10605768
    Abstract: A semiconductor structure capable of real-time spatial sensing of nanoparticles within a nanofluid is provided. The structure includes an array of gate structures. An interlevel dielectric material surrounds the array of gate structures. A vertical inlet channel is located within a portion of the interlevel dielectric material and on one side of the array of gate structures. A vertical outlet channel is located within another portion of the interlevel dielectric material and on another side of the array of gate structures. A horizontal channel that functions as a back gate is in fluid communication with the vertical inlet and outlet channels, and is located beneath the array of gate structures. A back gate dielectric material portion lines exposed surfaces within the vertical inlet channel, the vertical outlet channel and the horizontal channel.
    Type: Grant
    Filed: August 8, 2017
    Date of Patent: March 31, 2020
    Assignee: International Business Machines Corporation
    Inventors: Kangguo Cheng, Ali Khakifirooz, Ghavam G. Shahidi, Davood Shahrjerdi
  • Patent number: 10580926
    Abstract: A multi-junction solar cell comprising a high-crystalline silicon solar cell and a high-crystalline germanium solar cell. The high-crystalline silicon solar including a first p-doped layer and a n+ layer and the high-crystalline germanium solar cell including a second p layer and a heavily doped layer. The multi-junction solar cell can also be comprised of a heavily doped silicon layer on a non-light receiving back surface of the high-crystalline germanium solar cell and a tunnel junction between the high-crystalline silicon solar cell and the high-crystalline germanium solar cell.
    Type: Grant
    Filed: October 18, 2016
    Date of Patent: March 3, 2020
    Assignee: International Business Machines Corporation
    Inventors: Anirban Basu, Bahman Hekmatshoartabari, Davood Shahrjerdi
  • Patent number: 10566297
    Abstract: A method for making a photovoltaic device is provided that includes the steps of providing a silicon substrate having a complementary metal-oxide semiconductor (“CMOS”); bonding a first layer of silicon oxide to a second layer of silicon oxide wherein the bonded layers are deposited on the silicon substrate; and forming a III-V photovoltaic cell on a side of the bonded silicon oxide layers opposite the silicon substrate, wherein when the III-V photovoltaic cell is exposed to radiation, the III-V photovoltaic cell generates a current that powers a memory erasure device to cause an alteration of a memory state of a memory cell in an integrated circuit.
    Type: Grant
    Filed: October 5, 2017
    Date of Patent: February 18, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Kenneth Rodbell, Davood Shahrjerdi
  • Publication number: 20200028170
    Abstract: An energy storage device containing a carbon-based electrode composed of graphitic film having a density of specific types of structural defects is explained. The carbon-based electrode may be used as an electrode in a supercapacitor or as an anode layer of a rechargeable battery. A distributed model is developed that predicts the area-normalized apparent capacitance from the density of point and line defects in the graphitic film. From this model, one can engineer the apparent capacitance by controlling the density of point and line defects.
    Type: Application
    Filed: December 14, 2018
    Publication date: January 23, 2020
    Inventors: Ting Wu, Abdullah Alharbi, Roozbeh Kiani, Davood Shahrjerdi