Patents by Inventor De Yuan

De Yuan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210225722
    Abstract: A package includes a device die, an encapsulant encapsulating the device die therein, a first plurality of through-vias penetrating through the encapsulant, a second plurality of through-vias penetrating through the encapsulant, and redistribution lines over and electrically coupling to the first plurality of through-vias. The first plurality of through-vias include an array. The second plurality of through-vias are outside of the first array, and the second plurality of through-vias are larger than the first plurality of through-vias.
    Type: Application
    Filed: January 17, 2020
    Publication date: July 22, 2021
    Inventors: Hung-Jui Kuo, Tai-Min Chang, Hui-Jung Tsai, De-Yuan Lu, Ming-Tan Lee
  • Publication number: 20210217979
    Abstract: An array substrate (100) includes a first type of electroluminescent diode (110). The first type of electroluminescent diode (110) includes a first electrode (111), alight emitting structure layer (112) comprising nanoparticles (114), and a second electrode (113) disposed in a stacked manner. The nanoparticles (114) may be configured to increase luminous efficiency of the first type of electroluminescent diode (110).
    Type: Application
    Filed: June 6, 2019
    Publication date: July 15, 2021
    Applicants: CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventor: De Yuan
  • Patent number: 11005015
    Abstract: The disclosure discloses a method and apparatus for detecting an electromagnetic touch, where organic light-emitting diodes arranged in an array in an organic light-emitting diode display panel are controlled to be lightened row by row, and detection current flowing through the lightened organic light-emitting diodes is obtained in real time. The detection current of each of the lightened organic light-emitting diodes includes inductive current of the organic light-emitting diode, and driving current of the organic light-emitting diode being lightened, and the inductive current is the current, generated by the organic light-emitting diode, related to magnetic induction intensity of a magnetic field emitted by a magnetic field emitting apparatus only when the lightened organic light-emitting diodes senses the magnetic field, a position of an electromagnetic touch can be determined according to the driving current of each of the organic light-emitting diodes, and the obtained detection current thereof.
    Type: Grant
    Filed: April 30, 2019
    Date of Patent: May 11, 2021
    Assignees: Chengdu BOE Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Weilong Zhou, De Yuan
  • Publication number: 20210118697
    Abstract: A semiconductor device and method of making a conductive connector is provided. In an embodiment an opening is formed within a photoresist by adjusting the center point of an in-focus area during the exposure process. Once the photoresist has been developed to form an opening, an after development baking process is utilized to reshape the opening. Once reshaped, a conductive material is formed into the opening to take on the shape of the opening.
    Type: Application
    Filed: December 7, 2020
    Publication date: April 22, 2021
    Inventors: Hung-Jui Kuo, Ming-Tan Lee, Chen-Cheng Kuo, De-Yuan Lu
  • Patent number: 10921479
    Abstract: The disclosure discloses a magnetic induction intensity detection device and a terminal equipment. The magnetic induction intensity detection device provided by an embodiment of the disclosure includes: a power supply, an electroluminescence component and a current detection component, wherein the electroluminescence component and the current detection component are connected in series; the power supply is configured to supply a voltage to the electroluminescence component so that the electroluminescence component generates a current; the current detection component is configured to detect a current variation flowing through the electroluminescence component, and determine a current magnetic induction intensity according to the current variation and a correspondence between current variations and magnetic induction intensities.
    Type: Grant
    Filed: February 2, 2018
    Date of Patent: February 16, 2021
    Assignees: BOE Technology Group Co., Ltd., Chengdu BOE Optoelectronics Technology Co., Ltd.
    Inventors: De Yuan, Weilong Zhou, Jiangtao Deng
  • Publication number: 20200393592
    Abstract: The disclosure discloses a magnetic induction intensity detection device and a terminal equipment. The magnetic induction intensity detection device provided by an embodiment of the disclosure includes: a power supply, an electroluminescence component and a current detection component, wherein the electroluminescence component and the current detection component are connected in series; the power supply is configured to supply a voltage to the electroluminescence component so that the electroluminescence component generates a current; the current detection component is configured to detect a current variation flowing through the electroluminescence component, and determine a current magnetic induction intensity according to the current variation and a correspondence between current variations and magnetic induction intensities.
    Type: Application
    Filed: February 2, 2018
    Publication date: December 17, 2020
    Inventors: De YUAN, Weilong ZHOU, Jiangtao DENG
  • Patent number: 10861710
    Abstract: A semiconductor device and method of making a conductive connector is provided. In an embodiment an opening is formed within a photoresist by adjusting the center point of an in-focus area during the exposure process. Once the photoresist has been developed to form an opening, an after development baking process is utilized to reshape the opening. Once reshaped, a conductive material is formed into the opening to take on the shape of the opening.
    Type: Grant
    Filed: October 1, 2018
    Date of Patent: December 8, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hung-Jui Kuo, Ming-Tan Lee, Chen-Cheng Kuo, De-Yuan Lu
  • Patent number: 10777768
    Abstract: The present application discloses an organic light emitting diode assembly. The organic light emitting diode assembly includes a first base substrate; an organic light emitting diode on the first base substrate; and a second base substrate on a side of, the organic light emitting diode distal to the first base substrate. The organic light emitting diode and the second base substrate are spaced apart from each other by a tunable gap. A gap distance of the tunable gap is tunable such that a color of light emitted from the organic light emitting diode assembly is tunable in response to a change in the gap distance.
    Type: Grant
    Filed: November 23, 2017
    Date of Patent: September 15, 2020
    Assignees: BOE Technology Group Co., Ltd., Chengdu BOE Optoelectronics Technology Co., Ltd.
    Inventors: Weilong Zhou, De Yuan
  • Publication number: 20200133128
    Abstract: A photoresist apparatus and a method are provided. The photoresist apparatus includes a pre-baking apparatus. The pre-baking apparatus includes: a hot-plate, a first cover over the hot-plate, a second cover over the first cover, a first heating element extending along a topmost surface of the first cover, and a second heating element extending along a topmost surface of the second cover.
    Type: Application
    Filed: December 21, 2018
    Publication date: April 30, 2020
    Inventors: Hung-Jui Kuo, De-Yuan Lu, Chen-Hua Yu, Ming-Tan Lee
  • Publication number: 20200043782
    Abstract: A method includes the following steps. A seed layer is formed over a structure having at least one semiconductor die. A first patterned photoresist layer is formed over the seed layer, wherein the first patterned photoresist layer includes a first opening exposing a portion of the seed layer. A metallic wiring is formed in the first opening and on the exposed portion of the seed layer. A second patterned photoresist layer is formed on the first patterned photoresist layer and covers the metallic wiring, wherein the second patterned photoresist layer includes a second opening exposing a portion of the metallic wiring. A conductive via is formed in the second opening and on the exposed portion of the metallic wiring. The first patterned photoresist layer and the second patterned photoresist layer are removed. The metallic wiring and the conductive via are laterally wrapped around with an encapsulant.
    Type: Application
    Filed: July 7, 2019
    Publication date: February 6, 2020
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Po-Yuan Teng, Bor-Rung Su, De-Yuan Lu, Hao-Yi Tsai, Tin-Hao Kuo, Tzung-Hui Lee, Tai-Min Chang
  • Publication number: 20200006607
    Abstract: The disclosure discloses a method and apparatus for detecting an electromagnetic touch, where organic light-emitting diodes arranged in an array in an organic light-emitting diode display panel are controlled to be lightened row by row, and detection current flowing through the lightened organic light-emitting diodes is obtained in real time. The detection current of each of the lightened organic light-emitting diodes includes inductive current of the organic light-emitting diode, and driving current of the organic light-emitting diode being lightened, and the inductive current is the current, generated by the organic light-emitting diode, related to magnetic induction intensity of a magnetic field emitted by a magnetic field emitting apparatus only when the lightened organic light-emitting diodes senses the magnetic field, a position of an electromagnetic touch can be determined according to the driving current of each of the organic light-emitting diodes, and the obtained detection current thereof.
    Type: Application
    Filed: April 30, 2019
    Publication date: January 2, 2020
    Inventors: Weilong ZHOU, De YUAN
  • Publication number: 20200006086
    Abstract: A semiconductor device and method of making a conductive connector is provided. In an embodiment an opening is formed within a photoresist by adjusting the center point of an in-focus area during the exposure process. Once the photoresist has been developed to form an opening, an after development baking process is utilized to reshape the opening. Once reshaped, a conductive material is formed into the opening to take on the shape of the opening.
    Type: Application
    Filed: October 1, 2018
    Publication date: January 2, 2020
    Inventors: Hung-Jui Kuo, Ming-Tan Lee, Chen-Cheng Kuo, De-Yuan Lu
  • Publication number: 20190189953
    Abstract: The present application discloses an organic light emitting diode assembly. The organic light emitting diode assembly includes a first base substrate; an organic light emitting diode on the first base substrate; and a second base substrate on a side of, the organic light emitting diode distal to the first base substrate. The organic light emitting diode and the second base substrate are spaced apart from each other by a tunable gap. A gap distance of the tunable gap is tunable such that a color of light emitted from the organic light emitting diode assembly is tunable in response to a change in the gap distance.
    Type: Application
    Filed: November 23, 2017
    Publication date: June 20, 2019
    Applicants: BOE Technology Group Co., Ltd., Chengdu BOE Optoelectronics Technology Co., Ltd.
    Inventors: Weilong Zhou, De Yuan
  • Patent number: 10237554
    Abstract: A method and apparatus for video encoding to generate a partitioned bitstream without buffering transform coefficient and/or prediction data for subsequent coding units are disclosed. An encoder incorporating an embodiment according to the present invention receives first video parameters associated with a current coding unit, wherein no first video parameters associated with subsequent coding units are buffered. The encoder then encodes the first video parameters to generate a current first compressed data corresponding to the current coding unit. A first memory address in the first logic unit is determined and the encoder provides the current first compressed data at the first memory address in the first logic unit.
    Type: Grant
    Filed: September 23, 2016
    Date of Patent: March 19, 2019
    Assignee: MEDIATEK INC.
    Inventors: Yung-Chang Chang, Chi-Cheng Ju, Yi-Hau Chen, De-Yuan Shen
  • Publication number: 20180174909
    Abstract: A method for making a tri-gate FinFET and a dual-gate FinFET includes providing a semiconductor on insulator (SOI) wafer having a semiconductor layer over an insulator layer. The method further includes forming a hard mask on the semiconductor layer and patterning the hard mask to form first and second cap portions. The method also includes etching the semiconductor layer to form first and second fins using the first and second cap portions as an etch mask. The method also includes removing the second cap portion to expose the top surface of the second fin and forming a gate dielectric layer on the first and second fins. The method further includes forming a conductive layer over the gate dielectric layer, selectively etching the conductive layer to form first and second gate structures, forming an interlayer dielectric layer over the gate structures, and planarizing the interlayer dielectric layer using the first cap portion as a polish stop.
    Type: Application
    Filed: January 31, 2018
    Publication date: June 21, 2018
    Inventors: De Yuan Xiao, Guo Qing Chen, Roger Lee
  • Patent number: 9922878
    Abstract: A method for making a tri-gate FinFET and a dual-gate FinFET includes providing a semiconductor on insulator (SOI) wafer having a semiconductor layer over an insulator layer. The method further includes forming a hard mask on the semiconductor layer and patterning the hard mask to form first and second cap portions. The method also includes etching the semiconductor layer to form first and second fins using the first and second cap portions as an etch mask. The method also includes removing the second cap portion to expose the top surface of the second fin and forming a gate dielectric layer on the first and second fins. The method further includes forming a conductive layer over the gate dielectric layer, selectively etching the conductive layer to form first and second gate structures, forming an interlayer dielectric layer over the gate structures, and planarizing the interlayer dielectric layer using the first cap portion as a polish stop.
    Type: Grant
    Filed: December 11, 2012
    Date of Patent: March 20, 2018
    Assignee: Semiconductor Manufacturing International (Shanghai) Corporation
    Inventors: De Yuan Xiao, Guo Qing Chen, Roger Lee
  • Patent number: 9853026
    Abstract: A transistor device may include a substrate that has a well portion. The transistor device may further include a source member and a drain member. The transistor device may further include a fin bar. The fin bar may be formed of a first semiconductor material, may be disposed between the source member and the drain member, and may overlap the well portion. The transistor device may further include a fin layer. The fin layer may be formed of a second semiconductor material, may be disposed between the source member and the drain member, and may contact the fin bar.
    Type: Grant
    Filed: May 16, 2014
    Date of Patent: December 26, 2017
    Assignee: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION
    Inventor: De Yuan Xiao
  • Patent number: 9673060
    Abstract: A device and method for integrated circuits with surrounding gate structures are disclosed. The device includes a semiconductor substrate and a fin structure on the semiconductor substrate. The fin structure is doped with a first conductivity type and includes a source region at one distal end and a drain region at the opposite distal end. The device further includes a gate structure overlying a channel region disposed between the source and drain regions of the fin structure. The fin structure has a rectangular cross-sectional bottom portion and an arched cross-sectional top portion. The arched cross-sectional top portion is semi-circular shaped and has a radius that is equal to or smaller than the height of the rectangular cross-sectional bottom portion. The source, drain, and the channel regions each are doped with dopants of the same polarity and the same concentration.
    Type: Grant
    Filed: May 17, 2016
    Date of Patent: June 6, 2017
    Assignee: Semiconductor Manufacturing International (Shanghai) Corporation
    Inventors: De Yuan Xiao, Guo Qing Chen, Roger Lee, Chin Fu Yen, Su Xing, Xiao Lu Huang, Yong Sheng Yang
  • Publication number: 20170013263
    Abstract: A method and apparatus for video encoding to generate a partitioned bitstream without buffering transform coefficient and/or prediction data for subsequent coding units are disclosed. An encoder incorporating an embodiment according to the present invention receives first video parameters associated with a current coding unit, wherein no first video parameters associated with subsequent coding units are buffered. The encoder then encodes the first video parameters to generate a current first compressed data corresponding to the current coding unit. A first memory address in the first logic unit is determined and the encoder provides the current first compressed data at the first memory address in the first logic unit.
    Type: Application
    Filed: September 23, 2016
    Publication date: January 12, 2017
    Inventors: Yung-Chang Chang, Chi-Cheng Ju, Yi-Hau Chen, De-Yuan Shen
  • Patent number: 9449931
    Abstract: Apparatus and methods for providing solder pillar bumps. Pillar bump connections are formed on input/output terminals for integrated circuits by forming a pillar of conductive material using plating of a conductive material over terminals of an integrated circuit. A base portion of the pillar bump has a greater width than an upper portion. A cross-section of the base portion of the pillar bump may make a trapezoidal, rectangular, or sloping shape. Solder material may be formed on the top surface of the pillar. The resulting solder pillar bumps form fine pitch package solder connections that are more reliable than those of the prior art.
    Type: Grant
    Filed: August 25, 2014
    Date of Patent: September 20, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Cheng-Chung Lin, Chung-Shi Liu, Meng-Wei Chou, Kuo Cheng Lin, Wen-Hsiung Lu, Chien Ling Hwang, Ying-Jui Huang, De-Yuan Lu