Patents by Inventor Dean Probst

Dean Probst has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10268046
    Abstract: Cube polarizers can be designed for substantially equal optical path lengths of a reflected beam and a transmitted beam. For example, d11 of FIG. 1 can define a distance between a plane (face plane2) of the outer face (outer face2) of a second prism 16 and the first edge (first edge1) of the first prism, and d11 can be less than 400 micrometers. As another example, an optical path length differential between a transmitted beam and a reflected beam (|OPLT?OPLR|) can be < 0.5 * t * n p 2 ; where t is a thickness of the substrate between the first surface and the second surface of the substrate and np is an index of refraction of the first prism.
    Type: Grant
    Filed: November 21, 2016
    Date of Patent: April 23, 2019
    Assignee: Moxtek, Inc.
    Inventors: Austin Huang, Dean Probst, Bin Wang, Hua Li
  • Patent number: 9798058
    Abstract: Structures and methods of making wire grid polarizers having multiple regions, including side bars, strips, and/or side ribs along sides of a central region. The central region can include a single region or multiple regions. Each region can have a different function for improving polarizer performance. The various regions can support each other for improved wire grid polarizer durability.
    Type: Grant
    Filed: March 14, 2017
    Date of Patent: October 24, 2017
    Assignee: Moxtek, Inc.
    Inventors: Dean Probst, Qihong Wu, Eric Gardner, Mark Alan Davis
  • Patent number: 9726897
    Abstract: The cube polarizer can have modified prism dimensions to satisfy the following equation: ? OPL T - OPL R ? < 0.5 * t * n p 2 , where an optical path length is a distance of light travel through a material times an index of refraction of the material, OPLT is an optical path length of the transmitted beam, OPLR is an optical path length of the reflected beam, t is a thickness of the substrate between the first surface and the second surface of the substrate, and np is an index of refraction of the first prism.
    Type: Grant
    Filed: April 29, 2015
    Date of Patent: August 8, 2017
    Assignee: Motex, Inc.
    Inventors: Austin Huang, Dean Probst, Bin Wang, Hua Li
  • Publication number: 20170184768
    Abstract: Structures and methods of making wire grid polarizers having multiple regions, including side bars, strips, and/or side ribs along sides of a central region. The central region can include a single region or multiple regions. Each region can have a different function for improving polarizer performance. The various regions can support each other for improved wire grid polarizer durability.
    Type: Application
    Filed: March 14, 2017
    Publication date: June 29, 2017
    Inventors: Dean Probst, Qihong Wu, Eirc Gardner, Mark Alan Davis
  • Patent number: 9632223
    Abstract: Structures and methods of making wire grid polarizers having multiple regions, including side bars, strips, and/or side ribs along sides of a central region. The central region can include a single region or multiple regions. Each region can have a different function for improving polarizer performance. The various regions can support each other for improved wire grid polarizer durability.
    Type: Grant
    Filed: August 27, 2014
    Date of Patent: April 25, 2017
    Assignee: Moxtek, Inc.
    Inventors: Dean Probst, Qihong Wu, Eric Gardner, Mark Alan Davis
  • Publication number: 20170068103
    Abstract: Cube polarizers can be designed for substantially equal optical path lengths of a reflected beam and a transmitted beam. For example, d11 of FIG. 1 can define a distance between a plane (face plane2) of the outer face (outer face2) of a second prism 16 and the first edge (first edge1) of the first prism, and d11 can be less than 400 micrometers. As another example, an optical path length differential between a transmitted beam and a reflected beam (|OPLT?OPLR|) can be < 0.5 * t * n p 2 ; where t is a thickness of the substrate between the first surface and the second surface of the substrate and nP is an index of refraction of the first prism.
    Type: Application
    Filed: November 21, 2016
    Publication date: March 9, 2017
    Inventors: Austin Huang, Dean Probst, Bin Wang, Hua Li
  • Patent number: 9354374
    Abstract: Wire grid polarizers, and methods of making wire grid polarizers, including an array of parallel, elongated nano-structures disposed over a surface of a substrate. Each of the nano-structures can include a first rib disposed over a surface of a substrate and a pair of parallel, elongated wires, each laterally oriented with respect to one another, and disposed over the first rib. The wire grid polarizers can be durable with high transmission of one polarization of light, high contrast, and/or small pitch. The wire grid polarizers can also have high absorption or high reflection of an opposite polarization of light.
    Type: Grant
    Filed: August 27, 2014
    Date of Patent: May 31, 2016
    Assignee: Moxtek, Inc.
    Inventors: Bin Wang, Ted Wangensteen, Rumyana Petrova, Mike Black, Steven Marks, Dean Probst, Mark Alan Davis
  • Patent number: 9348076
    Abstract: A wire grid polarizer comprising an array of parallel, elongated nano-structures disposed over a surface of a substrate. Each of the nano-structures can include a pair of parallel, elongated wires (or top ribs), each oriented laterally with respect to one another. There can be a first gap disposed between the pair of wires (or top ribs). Each of the nano-structures can be separated from an adjacent nano-structure by a second gap disposed between adjacent nanostructures, and thus between adjacent pairs of wires. A first gap width of the first gap can be different than a second gap width of the second gap. Also included are methods of making wire grid polarizers.
    Type: Grant
    Filed: August 27, 2014
    Date of Patent: May 24, 2016
    Assignee: Moxtek, Inc.
    Inventors: Bin Wang, Ted Wangensteen, Rumyana Petrova, Mike Black, Steven Marks, Dean Probst
  • Patent number: 9293526
    Abstract: Exemplary power semiconductor devices with features providing increased breakdown voltage and other benefits are disclosed.
    Type: Grant
    Filed: November 2, 2012
    Date of Patent: March 22, 2016
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Joseph A. Yedinak, Ashok Challa, Dean Probst
  • Publication number: 20150346497
    Abstract: Cube polarizers designed for substantially equal optical path lengths of a reflected beam and a transmitted beam. Cube polarizers designed to reduce wire grid polarizer curvature in order to minimize wavefront distortion of the reflected beam and the transmitted beam.
    Type: Application
    Filed: April 29, 2015
    Publication date: December 3, 2015
    Inventors: Austin Huang, Dean Probst, Bin Wang, Hua Li
  • Publication number: 20150131150
    Abstract: Structures and methods of making wire grid polarizers having multiple regions, including side bars, strips, and/or side ribs along sides of a central region. The central region can include a single region or multiple regions. Each region can have a different function for improving polarizer performance. The various regions can support each other for improved wire grid polarizer durability.
    Type: Application
    Filed: August 27, 2014
    Publication date: May 14, 2015
    Inventors: Dean Probst, Qihong Wu, Eric Gardner
  • Publication number: 20150116825
    Abstract: A wire grid polarizer comprising an array of parallel, elongated nano-structures disposed over a surface of a substrate. Each of the nano-structures can include a pair of parallel, elongated wires (or top ribs), each oriented laterally with respect to one another. There can be a first gap disposed between the pair of wires (or top ribs). Each of the nano-structures can be separated from an adjacent nano-structure by a second gap disposed between adjacent nanostructures, and thus between adjacent pairs of wires. A first gap width of the first gap can be different than a second gap width of the second gap. Also included are methods of making wire grid polarizers.
    Type: Application
    Filed: August 27, 2014
    Publication date: April 30, 2015
    Inventors: Bin Wang, Ted Wangensteen, Rumyana Petrova, Mike Black, Steven Marks, Dean Probst
  • Publication number: 20150116824
    Abstract: Wire grid polarizers, and methods of making wire grid polarizers, including an array of parallel, elongated nano-structures disposed over a surface of a substrate. Each of the nano-structures can include a first rib disposed over a surface of a substrate and a pair of parallel, elongated wires, each laterally oriented with respect to one another, and disposed over the first rib. The wire grid polarizers can be durable with high transmission of one polarization of light, high contrast, and/or small pitch. The wire grid polarizers can also have high absorption or high reflection of an opposite polarization of light.
    Type: Application
    Filed: August 27, 2014
    Publication date: April 30, 2015
    Inventors: Bin Wang, Ted Wangensteen, Rumyana Petrova, Mike Black, Steven Marks, Dean Probst
  • Publication number: 20140203355
    Abstract: In accordance with an embodiment a structure can include a monolithically integrated trench field-effect transistor (FET) and Schottky diode. The structure can include a first gate trench extending into a semiconductor region, a second gate trench extending into the semiconductor region, and a source region flanking a side of the first gate trench. The source region can have a substantially triangular shape, and a contact opening extending into the semiconductor region between the first gate trench and the second gate trench. The structure can include a conductor layer disposed in the contact opening to electrically contact the source region along at least a portion of a slanted sidewall of the source region, and the semiconductor region along a bottom portion of the contact opening. The conductor layer can form a Schottky contact with the semiconductor region.
    Type: Application
    Filed: March 24, 2014
    Publication date: July 24, 2014
    Applicant: Fairchild Semiconductor Corporation
    Inventors: Christopher Boguslaw Kocon, Steven Sapp, Paul Thorup, Dean Probst, Robert Herrick, Becky Losee, Hamza Yilmaz, Christopher Lawrence Rexer, Daniel Calafut
  • Patent number: 8716783
    Abstract: A field effect transistor (FET) includes a plurality of trenches extending into a silicon layer, each trench having upper sidewalls that fan out. Contact openings extend into the silicon layer between adjacent trenches such that each trench and an adjacent contact opening form a common upper sidewall portion. Body regions extend between adjacent trenches. Source regions that are self-aligned to corresponding trenches extend in the body regions adjacent opposing sidewalls of each trench, and have a conductivity type opposite that of the body regions.
    Type: Grant
    Filed: October 10, 2011
    Date of Patent: May 6, 2014
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Robert Herrick, Becky Losee, Dean Probst
  • Patent number: 8680611
    Abstract: In accordance with an embodiment a structure can include a monolithically integrated trench field-effect transistor (FET) and Schottky diode. The structure can include a first gate trench extending into a semiconductor region, a second gate trench extending into the semiconductor region, and a source region flanking a side of the first gate trench. The source region can have a substantially triangular shape, and a contact opening extending into the semiconductor region between the first gate trench and the second gate trench. The structure can include a conductor layer disposed in the contact opening to electrically contact the source region along at least a portion of a slanted sidewall of the source region, and the semiconductor region along a bottom portion of the contact opening. The conductor layer can form a Schottky contact with the semiconductor region.
    Type: Grant
    Filed: August 30, 2012
    Date of Patent: March 25, 2014
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Christopher Boguslaw Kocon, Steven Sapp, Paul Thorup, Dean Probst, Robert Herrick, Becky Losee, Hamza Yilmaz, Christopher Lawrence Rexer, Daniel Calafut
  • Publication number: 20120319197
    Abstract: In accordance with an embodiment a structure can include a monolithically integrated trench field-effect transistor (FET) and Schottky diode. The structure can include a first gate trench extending into a semiconductor region, a second gate trench extending into the semiconductor region, and a source region flanking a side of the first gate trench. The source region can have a substantially triangular shape, and a contact opening extending into the semiconductor region between the first gate trench and the second gate trench. The structure can include a conductor layer disposed in the contact opening to electrically contact the source region along at least a portion of a slanted sidewall of the source region, and the semiconductor region along a bottom portion of the contact opening. The conductor layer can form a Schottky contact with the semiconductor region.
    Type: Application
    Filed: August 30, 2012
    Publication date: December 20, 2012
    Inventors: Christopher Boguslaw Kocon, Steven Sapp, Paul Thorup, Dean Probst, Robert Herrick, Becky Losee, Hamza Yilmaz, Christopher Lawrence Rexer, Daniel Calafut
  • Publication number: 20120156845
    Abstract: A method for forming a field effect transistor and Schottky diode includes forming a well region in a first portion of a silicon region where the field effect transistor is to be formed but not in a second portion of the silicon region where the Schottky diode is to be formed. Gate trenches are formed extending into the silicon region. A recessed gate is formed in each gate trench. A dielectric cap is formed over each recessed gate. Exposed surfaces of the well region are recessed to form a recess between every two adjacent trenches. Without masking any portion of the active area, a zero-degree blanket implant is performed to form a heavy body region of the second conductivity type in the well region between every two adjacent trenches.
    Type: Application
    Filed: December 13, 2011
    Publication date: June 21, 2012
    Applicant: Fairchild Semiconductor Corporation
    Inventors: Christopher Boguslaw Kocon, Steven Sapp, Paul Thorup, Dean Probst, Robert Herrick, Becky Losee, Hamza Yilmaz, Christopher Lawrence Rexer, Daniel Calafut
  • Publication number: 20120119291
    Abstract: A field effect transistor (FET) includes a plurality of trenches extending into a silicon layer, each trench having upper sidewalls that fan out. Contact openings extend into the silicon layer between adjacent trenches such that each trench and an adjacent contact opening form a common upper sidewall portion. Body regions extend between adjacent trenches. Source regions that are self-aligned to corresponding trenches extend in the body regions adjacent opposing sidewalls of each trench, and have a conductivity type opposite that of the body regions.
    Type: Application
    Filed: October 10, 2011
    Publication date: May 17, 2012
    Inventors: Robert Herrick, Becky Losee, Dean Probst
  • Patent number: 8034682
    Abstract: A method of forming a semiconductor device includes the following. Removing portions of a silicon layer such that a trench having sidewalls which fan out near the top of the trench to extend directly over a portion of the silicon layer is formed in the silicon layer; and forming source regions in the silicon layer adjacent the trench sidewall such that the source regions extend into the portions of the silicon layer directly over which the trench sidewalls extend.
    Type: Grant
    Filed: September 16, 2010
    Date of Patent: October 11, 2011
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Robert Herrick, Becky Losee, Dean Probst