Patents by Inventor Deenesh Padhi

Deenesh Padhi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240110284
    Abstract: A method of processing a substrate is disclosed which includes depositing a layer in a processing chamber on a field region, a sidewall region, and a fill region of a feature of the substrate, wherein a hardness of a portion of the layer deposited on the sidewall region is lower than a hardness of a portion of the layer deposited on the field region, and lower than a hardness of a portion of the layer deposited on the fill region.
    Type: Application
    Filed: September 26, 2023
    Publication date: April 4, 2024
    Inventors: Lulu XIONG, Kevin Hsiao, Chris LIU, Chieh-Wen LO, Sean M. SEUTTER, Deenesh PADHI, Prayudi LIANTO, Peng SUO, Guan Huei SEE, Zongbin WANG, Shengwei ZENG, Balamurugan RAMASAMY
  • Patent number: 11948846
    Abstract: Methods and systems are described for generating assessment maps. A method includes receiving a first vector map comprising a first set of vectors each indicating a distortion of a particular location on a substrate and generating a second vector map indicating a change in direction of a magnitude of the distortion of the particular location on the substrate. The method further includes generating a third vector map comprising vectors reflecting reduced noise in distortions across the plurality of locations on the substrate and generating a fourth vector map projecting a direction component of each vector component in the third set of vectors to a radial direction. The method further includes generating a fifth vector map by grouping the vectors of the fourth set of vectors and determining a magnitude associated with each group of vectors.
    Type: Grant
    Filed: April 4, 2023
    Date of Patent: April 2, 2024
    Assignee: Applied Materials, Inc.
    Inventors: Wenjiao Wang, Joshua Maher, Xinhai Han, Deenesh Padhi, Tza-Jing Gung
  • Patent number: 11935751
    Abstract: Exemplary deposition methods may include delivering a boron-containing precursor and a nitrogen-containing precursor to a processing region of a semiconductor processing chamber. The methods may include providing a hydrogen-containing precursor with the boron-containing precursor and the nitrogen-containing precursor. A flow rate ratio of the hydrogen-containing precursor to either of the boron-containing precursor or the nitrogen-containing precursor may be greater than or about 2:1. The methods may include forming a plasma of all precursors within the processing region of the semiconductor processing chamber. The methods may include depositing a boron-and-nitrogen material on a substrate disposed within the processing region of the semiconductor processing chamber.
    Type: Grant
    Filed: May 25, 2021
    Date of Patent: March 19, 2024
    Assignee: Applied Materials, Inc.
    Inventors: Siyu Zhu, Chuanxi Yang, Hang Yu, Deenesh Padhi, Yeonju Kwak, Jeong Hwan Kim, Qian Fu, Xiawan Yang
  • Publication number: 20240087882
    Abstract: Exemplary semiconductor processing methods may include providing one or more deposition precursors to a processing region of a semiconductor processing chamber. The methods may include contacting a substrate housed in the processing region with the one or more deposition precursors. The methods may include forming a silicon-containing material on the substrate. The methods may include providing a fluorine-containing precursor to the processing region of the semiconductor processing chamber. The methods may include contacting the silicon-containing material on the substrate with the fluorine-containing precursor to form a fluorine-treated silicon-containing material. The methods may include contacting the fluorine-treated silicon-containing material with plasma effluents of argon or diatomic nitrogen.
    Type: Application
    Filed: September 9, 2022
    Publication date: March 14, 2024
    Applicant: Applied Materials, Inc.
    Inventors: Siyu Zhu, Hang Yu, Deenesh Padhi, Sung-Kwan Kang, Abdul Wahab Mohammed, Abhijit Basu Mallick
  • Patent number: 11929278
    Abstract: Exemplary substrate support assemblies may include an electrostatic chuck body that defines a substrate support surface. The substrate support surface may define a plurality of protrusions that extend upward from the substrate support surface. A density of the plurality of protrusions within an outer region of the substrate support surface may be greater than in an inner region of the substrate support surface. The substrate support assemblies may include a support stem coupled with the electrostatic chuck body. The substrate support assemblies may include an electrode embedded within the electrostatic chuck body.
    Type: Grant
    Filed: May 19, 2021
    Date of Patent: March 12, 2024
    Assignee: Applied Materials, Inc.
    Inventors: Madhu Santosh Kumar Mutyala, Saketh Pemmasani, Akshay Dhanakshirur, Mayur Govind Kulkarni, Hang Yu, Deenesh Padhi
  • Publication number: 20240038833
    Abstract: Memory devices and methods of forming memory devices are described. Methods of forming electronic devices are described where carbon is used as the removable mold material for the formation of a DRAM capacitor. A dense, high-temperature (500° C. or greater) PECVD carbon material is used as the removable mold material, e.g., the core material, instead of oxide. The carbon material can be removed by isotropic etching with exposure to radicals of oxygen (O2), nitrogen (N2), hydrogen (H2), ammonia (NH3), and combinations thereof.
    Type: Application
    Filed: July 14, 2023
    Publication date: February 1, 2024
    Applicant: Applied Materials, Inc.
    Inventors: Fredrick Fishburn, Tomohiko Kitajima, Qian Fu, Srinivas Guggilla, Hang Yu, Jun Feng, Shih Chung Chen, Lakmal C. Kalutarage, Jayden Potter, Karthik Janakiraman, Deenesh Padhi, Yifeng Zhou, Yufeng Jiang, Sung-Kwan Kang
  • Patent number: 11869795
    Abstract: Exemplary substrate support assemblies may include a chuck body defining a substrate support surface. The substrate support surface may define a plurality of protrusions that extend upward from the substrate support surface. The substrate support surface may define an annular groove and/or ridge. A subset of the plurality of protrusions may be disposed within the annular groove and/or ridge. The substrate support assemblies may include a support stem coupled with the chuck body.
    Type: Grant
    Filed: July 9, 2021
    Date of Patent: January 9, 2024
    Assignee: Applied Materials, Inc.
    Inventors: Saketh Pemmasani, Akshay Dhanakshirur, Mayur Govind Kulkarni, Madhu Santosh Kumar Mutyala, Hang Yu, Deenesh Padhi
  • Publication number: 20230411462
    Abstract: Exemplary semiconductor structures and processing methods may include forming a first portion of a first semiconductor layer characterized by a first etch rate for an etch treatment, forming a second portion of the first semiconductor layer characterized by a second etch rate that is less than the first etch rate for the etch treatment, and forming a third portion of the first semiconductor layer characterized by a third etch rate that is greater than the second etch rate. The processing methods may further include etching an opening through the first semiconductor layer, where the opening has a height and a width, and where the opening is characterized by a variation in the width between a midpoint of the height of the opening and an endpoint of the opening that is less than or about 5 ?.
    Type: Application
    Filed: September 1, 2023
    Publication date: December 21, 2023
    Applicant: Applied Materials, Inc.
    Inventors: Akhil Singhal, Allison Yau, Sang-Jin Kim, Zeqiong Zhao, Zhijun Jiang, Deenesh Padhi, Ganesh Balasubramanian
  • Patent number: 11817313
    Abstract: Exemplary deposition methods may include forming a plasma of a silicon-containing precursor and at least one additional precursor within a processing region of a semiconductor processing chamber. The processing region may house a semiconductor substrate on a substrate support. The methods may include depositing material on the semiconductor substrate to a target thickness. The methods may include halting delivery of the silicon-containing precursor while maintaining the plasma with the one or more precursors. The methods may include purging the processing region of the semiconductor processing chamber.
    Type: Grant
    Filed: February 5, 2020
    Date of Patent: November 14, 2023
    Assignee: Applied Materials, Inc.
    Inventors: Madhu Santosh Kumar Mutyala, Sanjay Kamath, Deenesh Padhi
  • Patent number: 11784229
    Abstract: Exemplary semiconductor structures and processing methods may include forming a first portion of a first semiconductor layer characterized by a first etch rate for an etch treatment, forming a second portion of the first semiconductor layer characterized by a second etch rate that is less than the first etch rate for the etch treatment, and forming a third portion of the first semiconductor layer characterized by a third etch rate that is greater than the second etch rate. The processing methods may further include etching an opening through the first semiconductor layer, where the opening has a height and a width, and where the opening is characterized by a variation in the width between a midpoint of the height of the opening and an endpoint of the opening that is less than or about 5 ?.
    Type: Grant
    Filed: October 16, 2020
    Date of Patent: October 10, 2023
    Assignee: Applied Materials, Inc.
    Inventors: Akhil Singhal, Allison Yau, Sang-Jin Kim, Zeqiong Zhao, Zhijun Jiang, Deenesh Padhi, Ganesh Balasubramanian
  • Patent number: 11776835
    Abstract: Exemplary semiconductor processing systems may include a processing chamber and an electrostatic chuck disposed at least partially within the processing chamber. The electrostatic chuck may include at least one electrode and a heater. A semiconductor processing system may include a power supply to provide a signal to the electrode to provide electrostatic force to secure a substrate to the electrostatic chuck. The system may also include a filter communicatively coupled between the power supply and the electrode. The filter is configured to remove or reduce noise introduced into the chucking signal by operating the heater while the electrostatic force on the substrate is maintained. The filter may include active circuitry, passive circuitry, or both, and may include an adjustment circuit to set the gain of the filter so that an output signal level from the filter corresponds to an input signal level for the filter.
    Type: Grant
    Filed: September 29, 2020
    Date of Patent: October 3, 2023
    Assignee: Applied Materials, Inc.
    Inventors: Zheng John Ye, Daemian Raj Benjamin Raj, Rana Howlader, Abhigyan Keshri, Sanjay G. Kamath, Dmitry A. Dzilno, Juan Carlos Rocha-Alvarez, Shailendra Srivastava, Kristopher R. Enslow, Xinhai Han, Deenesh Padhi, Edward P. Hammond
  • Publication number: 20230274968
    Abstract: Semiconductor processing systems and method are described that may include flowing deposition precursors into a substrate processing region of a semiconductor processing chamber, where the substrate processing region includes an electrostatic chuck. The methods may further include depositing a seasoning layer on the electrostatic chuck from the deposition precursors to form a seasoned electrostatic chuck. The seasoning layer may be characterized by a dielectric constant greater than or about 3.5. The methods may still further include applying a voltage to the seasoned electrostatic chuck of greater than or about 500 V. The seasoned electrostatic chuck may be characterized by a leakage current of less than or about 25 mA when the voltage is applied.
    Type: Application
    Filed: May 5, 2023
    Publication date: August 31, 2023
    Applicant: Applied Materials, Inc.
    Inventors: Akhil Singhal, Allison Yau, Zeqiong Zhao, Sang-Jin Kim, Zhijun Jiang, Deenesh Padhi, Ganesh Balasubramanian
  • Publication number: 20230238289
    Abstract: Methods and systems are described for generating assessment maps. A method includes receiving a first vector map comprising a first set of vectors each indicating a distortion of a particular location on a substrate and generating a second vector map indicating a change in direction of a magnitude of the distortion of the particular location on the substrate. The method further includes generating a third vector map comprising vectors reflecting reduced noise in distortions across the plurality of locations on the substrate and generating a fourth vector map projecting a direction component of each vector component in the third set of vectors to a radial direction. The method further includes generating a fifth vector map by grouping the vectors of the fourth set of vectors and determining a magnitude associated with each group of vectors.
    Type: Application
    Filed: April 4, 2023
    Publication date: July 27, 2023
    Inventors: Wenjiao Wang, Joshua Maher, Xinhai Han, Deenesh Padhi, Tza-Jing Gung
  • Patent number: 11710631
    Abstract: Exemplary semiconductor processing methods may include flowing deposition gases that may include a nitrogen-containing precursor, a silicon-containing precursor, and a carrier gas, into a substrate processing region of a substrate processing chamber. The flow rate ratio of the nitrogen-containing precursor to the silicon-containing precursor may be greater than or about 1:1. The methods may further include generating a deposition plasma from the deposition gases to form a silicon-and-nitrogen containing layer on a substrate in the substrate processing chamber. The silicon-and-nitrogen-containing layer may be treated with a treatment plasma, where the treatment plasma is formed from the carrier gas without the silicon-containing precursor. The flow rate of the carrier gas in the treatment plasma may be greater than a flow rate of the carrier gas in the deposition plasma.
    Type: Grant
    Filed: October 23, 2020
    Date of Patent: July 25, 2023
    Assignee: Applied Materials, Inc.
    Inventors: Michael Wenyoung Tsiang, Yichuen Lin, Kevin Hsiao, Hang Yu, Deenesh Padhi, Yijun Liu, Li-Qun Xia
  • Patent number: 11646216
    Abstract: Semiconductor processing systems and method are described that may include flowing deposition precursors into a substrate processing region of a semiconductor processing chamber, where the substrate processing region includes an electrostatic chuck. The methods may further include depositing a seasoning layer on the electrostatic chuck from the deposition precursors to form a seasoned electrostatic chuck. The seasoning layer may be characterized by a dielectric constant greater than or about 3.5. The methods may still further include applying a voltage to the seasoned electrostatic chuck of greater than or about 500 V. The seasoned electrostatic chuck may be characterized by a leakage current of less than or about 25 mA when the voltage is applied.
    Type: Grant
    Filed: October 16, 2020
    Date of Patent: May 9, 2023
    Assignee: Applied Materials, Inc.
    Inventors: Akhil Singhal, Allison Yau, Zeqiong Zhao, Sang-Jin Kim, Zhijun Jiang, Deenesh Padhi, Ganesh Balasubramanian
  • Patent number: 11637043
    Abstract: Methods, systems, and non-transitory computer readable medium are described for generating assessment maps for corrective action. A method includes receiving a first vector map including a first set of vectors each indicating a distortion of a particular location of a plurality of locations on a substrate. The method further includes generating a second vector map including a second set of vectors by rotating a position of each vector in the first set of vectors. The method further includes generating a third vector map including a third set of vectors based on vectors in the second set of vectors and corresponding vectors in the first set of vectors. The method further includes generating a fourth vector map by subtracting each vector of the third set of vectors from a corresponding vector in the first set of vectors. The fourth vector map indicates a planar component of the first vector map.
    Type: Grant
    Filed: November 3, 2020
    Date of Patent: April 25, 2023
    Assignee: Applied Materials, Inc.
    Inventors: Wenjiao Wang, Joshua Maher, Xinhai Han, Deenesh Padhi, Tza-Jing Gung
  • Publication number: 20230094180
    Abstract: Exemplary methods of forming a silicon-and-carbon-containing material may include flowing a silicon-and-carbon-containing precursor into a processing region of a semiconductor processing chamber. A substrate may be housed within the processing region of the semiconductor processing chamber. The methods may include forming a plasma within the processing region of the silicon-and-carbon-containing precursor. The plasma may be formed at a frequency above 15 MHz. The methods may include depositing a silicon-and-carbon-containing material on the substrate. The silicon-and-carbon-containing material as-deposited may be characterized by a dielectric constant below or about 3.0.
    Type: Application
    Filed: December 5, 2022
    Publication date: March 30, 2023
    Applicant: Applied Materials, Inc.
    Inventors: Shaunak Mukherjee, Kang Sub Yim, Deenesh Padhi, Abhijit A. Kangude, Rahul Rajeev, Shubham Chowdhuri
  • Patent number: 11600468
    Abstract: Embodiments described herein relate to gas line systems with a multichannel splitter spool. In these embodiments, the gas line systems will include a first gas line that is configured to supply a first gas. The first gas line is coupled to a multichannel splitter spool with a plurality of second gas lines into which the first gas flows. Each gas line of the plurality of second gas lines will have a smaller volume than the volume of the first gas line. The smaller second gas lines will be wrapped by a heater jacket. Due to the smaller volume of the second gas lines, when the first gas is flowed through the second gas lines, the heater jacket will sufficiently heat the first gas, eliminating the condensation induced particle defects that occur in conventional gas line systems when the first gas meets with a second gas in the gas line system.
    Type: Grant
    Filed: January 21, 2020
    Date of Patent: March 7, 2023
    Assignee: Applied Materials, Inc.
    Inventors: Madhu Santosh Kumar Mutyala, Sanjay G. Kamath, Deenesh Padhi, Arkajit Roy Barman
  • Publication number: 20230063929
    Abstract: Embodiments described herein relate to layered structures having a top surface which is hydrophobic for reducing the wetting of water or ice on the layered structure without requiring reapplication. In one or more embodiments, a layered structure is provided and includes a coating containing silicon, oxygen, and carbon disposed over a substrate and an interface disposed between the substrate and the coating. The substrate is at least partially transparent to visible light, a concentration of carbon in the coating is greater at a top surface of the coating than the interface, and the top surface of the coating is disposed on the opposite side of the coating than the interface.
    Type: Application
    Filed: November 7, 2022
    Publication date: March 2, 2023
    Inventors: Rajeev BAJAJ, Mei CHANG, Deenesh PADHI
  • Patent number: 11594409
    Abstract: Exemplary methods of forming a silicon-and-carbon-containing material may include flowing a silicon-and-carbon-containing precursor into a processing region of a semiconductor processing chamber. A substrate may be housed within the processing region of the semiconductor processing chamber. The methods may include forming a plasma within the processing region of the silicon-and-carbon-containing precursor. The plasma may be formed at a frequency above 15 MHz. The methods may include depositing a silicon-and-carbon-containing material on the substrate. The silicon-and-carbon-containing material as-deposited may be characterized by a dielectric constant below or about 3.0.
    Type: Grant
    Filed: June 16, 2020
    Date of Patent: February 28, 2023
    Assignee: Applied Materials, Inc.
    Inventors: Shaunak Mukherjee, Kang Sub Yim, Deenesh Padhi, Abhijit A. Kangude, Rahul Rajeev, Shubham Chowdhuri