Patents by Inventor Deenesh Padhi
Deenesh Padhi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11594409Abstract: Exemplary methods of forming a silicon-and-carbon-containing material may include flowing a silicon-and-carbon-containing precursor into a processing region of a semiconductor processing chamber. A substrate may be housed within the processing region of the semiconductor processing chamber. The methods may include forming a plasma within the processing region of the silicon-and-carbon-containing precursor. The plasma may be formed at a frequency above 15 MHz. The methods may include depositing a silicon-and-carbon-containing material on the substrate. The silicon-and-carbon-containing material as-deposited may be characterized by a dielectric constant below or about 3.0.Type: GrantFiled: June 16, 2020Date of Patent: February 28, 2023Assignee: Applied Materials, Inc.Inventors: Shaunak Mukherjee, Kang Sub Yim, Deenesh Padhi, Abhijit A. Kangude, Rahul Rajeev, Shubham Chowdhuri
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Patent number: 11569257Abstract: Embodiments described herein relate to methods and materials for fabricating semiconductor devices, such as memory devices and the like. In one embodiment, a memory layer stack includes materials having differing etch rates in which one material is selectively removed to form an airgap in the device structure. In another embodiment, silicon containing materials of a memory layer stack are doped or fabricated as a silicide material. In another embodiment, a silicon nitride material is utilized as an interfacial layer between oxide containing and silicon containing layers of a memory layer stack.Type: GrantFiled: May 29, 2020Date of Patent: January 31, 2023Assignee: Applied Materials, Inc.Inventors: Xinhai Han, Deenesh Padhi, Er-Xuan Ping, Srinivas Guggilla
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Publication number: 20230008922Abstract: Exemplary substrate support assemblies may include a chuck body defining a substrate support surface. The substrate support surface may define a plurality of protrusions that extend upward from the substrate support surface. The substrate support surface may define an annular groove and/or ridge. A subset of the plurality of protrusions may be disposed within the annular groove and/or ridge. The substrate support assemblies may include a support stem coupled with the chuck body.Type: ApplicationFiled: July 9, 2021Publication date: January 12, 2023Applicant: Applied Materials, Inc.Inventors: Saketh Pemmasani, Akshay Dhanakshirur, Mayur Govind Kulkarni, Madhu Santosh Kumar Mutyala, Hang Yu, Deenesh Padhi
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Publication number: 20230011938Abstract: Exemplary semiconductor processing chambers may include a chamber body. The chambers may include a substrate support disposed within the chamber body. The substrate support may define a substrate support surface. The chambers may include a showerhead positioned supported atop the chamber body. The substrate support and a bottom surface of the showerhead may at least partially define a processing region within the semiconductor processing chamber. The showerhead may define a plurality of apertures through the showerhead. The bottom surface of the showerhead may define an annular groove or ridge that is positioned directly above at least a portion of the substrate support.Type: ApplicationFiled: July 9, 2021Publication date: January 12, 2023Applicant: Applied Materials, Inc.Inventors: Saketh Pemmasani, Daemian Raj Benjamin Raj, Xiaopu Li, Akshay Dhanakshirur, Mayur Govind Kulkarni, Madhu Santosh Kumar Mutyala, Deenesh Padhi, Hang Yu
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Publication number: 20220415651Abstract: Memory devices and methods of forming memory devices are described. The memory devices comprise a silicon nitride hard mask layer on a ruthenium layer. Forming the silicon nitride hard mask layer on the ruthenium comprises pre-treating the ruthenium layer with a plasma to form an interface layer on the ruthenium layer; and forming a silicon nitride layer on the interface layer by plasma-enhanced chemical vapor deposition (PECVD). Pre-treating the ruthenium layer, in some embodiments, results in the interface layer having a reduced roughness and the memory device having a reduced resistivity compared to a memory device that does not include the interface layer.Type: ApplicationFiled: June 29, 2021Publication date: December 29, 2022Applicant: Applied Materials, Inc.Inventors: Qixin Shen, Chuanxi Yang, Hang Yu, Deenesh Padhi, Gill Yong Lee, Sung-Kwan Kang, Abdul Wahab Mohammed, Hailing Liu
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Patent number: 11538677Abstract: Exemplary methods of semiconductor processing may include flowing a silicon-containing precursor, a nitrogen-containing precursor, and diatomic hydrogen into a processing region of a semiconductor processing chamber. A substrate may be housed within the processing region of the semiconductor processing chamber. The methods may also include forming a plasma of the silicon-containing precursor, the nitrogen-containing precursor, and the diatomic hydrogen. The plasma may be formed at a frequency above 15 MHz. The methods may also include depositing a silicon nitride material on the substrate.Type: GrantFiled: September 1, 2020Date of Patent: December 27, 2022Assignee: Applied Materials, Inc.Inventors: Chuanxi Yang, Hang Yu, Yu Yang, Chuan Ying Wang, Allison Yau, Xinhai Han, Sanjay G. Kamath, Deenesh Padhi
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Patent number: 11530478Abstract: A method of depositing a coating and a layered structure is provided. A coating is deposited on a substrate to make a layered structure, such that an interface between the coating and the substrate is formed. The coating includes silicon, oxygen, and carbon, where the carbon doping in the coating increases between the interface and the top surface of the coating. The top surface of the coating is inherently hydrophobic and icephobic, and reduces the wetting of water or ice film on the layered structure, without requiring reapplication of the coating.Type: GrantFiled: February 19, 2020Date of Patent: December 20, 2022Assignee: APPLIED MATERIALS, INC.Inventors: Rajeev Bajaj, Mei Chang, Deenesh Padhi
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Publication number: 20220384189Abstract: Exemplary deposition methods may include delivering a boron-containing precursor and a nitrogen-containing precursor to a processing region of a semiconductor processing chamber. The methods may include providing a hydrogen-containing precursor with the boron-containing precursor and the nitrogen-containing precursor. A flow rate ratio of the hydrogen-containing precursor to either of the boron-containing precursor or the nitrogen-containing precursor may be greater than or about 2:1. The methods may include forming a plasma of all precursors within the processing region of the semiconductor processing chamber. The methods may include depositing a boron-and-nitrogen material on a substrate disposed within the processing region of the semiconductor processing chamber.Type: ApplicationFiled: May 25, 2021Publication date: December 1, 2022Applicant: Applied Materials, Inc.Inventors: Siyu Zhu, Chuanxi Yang, Hang Yu, Deenesh Padhi, Yeonju Kwak, Jeong Hwan Kim, Qian Fu, Xiawan Yang
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Patent number: 11515145Abstract: Methods for forming a SiBN film comprising depositing a film on a feature on a substrate. The method comprises in a first cycle, depositing a SiB layer on a substrate in a chamber using a chemical vapor deposition process, the substrate having at least one feature thereon, the at least one feature comprising an upper surface, a bottom surface and sidewalls, the SiB layer formed on the upper surface, the bottom surface and the sidewalls. In a second cycle, the SiB layer is treated with a plasma comprising a nitrogen-containing gas to form a conformal SiBN film.Type: GrantFiled: September 11, 2020Date of Patent: November 29, 2022Assignee: Applied Materials, Inc.Inventors: Chuanxi Yang, Hang Yu, Deenesh Padhi
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Publication number: 20220375776Abstract: Exemplary substrate support assemblies may include an electrostatic chuck body that defines a substrate support surface. The substrate support surface may define a plurality of protrusions that extend upward from the substrate support surface. A density of the plurality of protrusions within an outer region of the substrate support surface may be greater than in an inner region of the substrate support surface. The substrate support assemblies may include a support stem coupled with the electrostatic chuck body. The substrate support assemblies may include an electrode embedded within the electrostatic chuck body.Type: ApplicationFiled: May 19, 2021Publication date: November 24, 2022Applicant: Applied Materials, Inc.Inventors: Madhu Santosh Kumar Mutyala, Saketh Pemmasani, Akshay Dhanakshirur, Mayur Govind Kulkarni, Hang Yu, Deenesh Padhi
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Patent number: 11501993Abstract: Exemplary support assemblies may include an electrostatic chuck body defining a substrate support surface. The assemblies may include a support stem coupled with the electrostatic chuck body. The assemblies may include a heater embedded within the electrostatic chuck body. The assemblies may also include an electrode embedded within the electrostatic chuck body between the heater and the substrate support surface. The substrate support assemblies may be characterized by a leakage current through the electrostatic chuck body of less than or about 4 mA at a temperature of greater than or about 500° C. and a voltage of greater than or about 600 V.Type: GrantFiled: July 22, 2020Date of Patent: November 15, 2022Assignee: Applied Materials, Inc.Inventors: Jian Li, Juan Carlos Rocha-Alvarez, Zheng John Ye, Daemian Raj Benjamin Raj, Shailendra Srivastava, Xinhai Han, Deenesh Padhi, Kesong Hu, Chuan Ying Wang
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Publication number: 20220336216Abstract: Exemplary deposition methods may include delivering a silicon-containing precursor and an inert gas to a processing region of a semiconductor processing chamber. The methods may include providing a hydrogen-containing precursor with the silicon-containing precursor and the inert gas. The methods may include forming a plasma of all precursors within the processing region of a semiconductor processing chamber. The methods may include depositing a silicon-containing material on a substrate disposed within the processing region of the semiconductor processing chamber. The processing region may be maintained free of helium delivery during the deposition method.Type: ApplicationFiled: April 20, 2021Publication date: October 20, 2022Applicant: Applied Materials, Inc.Inventors: Zeqiong Zhao, Allison Yau, Sang-Jin Kim, Akhil Singhal, Zhijun Jiang, Deenesh Padhi, Ganesh Balasubramanian
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Patent number: 11430654Abstract: Exemplary deposition methods may include forming a plasma of an oxygen-containing precursor within a processing region of a semiconductor processing chamber. The processing region may house a semiconductor substrate on a substrate support. The methods may include, while maintaining the plasma of the oxygen-containing precursor, flowing a silicon-containing precursor into the processing region of the semiconductor processing chamber at a first flow rate. The methods may include ramping the first flow rate of the silicon-containing precursor over a period of time to a second flow rate greater than the first flow rate. The methods may include depositing a silicon-containing material on the semiconductor substrate.Type: GrantFiled: November 27, 2019Date of Patent: August 30, 2022Assignee: Applied Materials, Inc.Inventors: Madhu Santosh Kumar Mutyala, Sanjay Kamath, Deenesh Padhi
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Publication number: 20220216048Abstract: Exemplary methods of forming semiconductor structures may include forming a silicon oxide layer from a silicon-containing precursor and an oxygen-containing precursor. The methods may include forming a silicon nitride layer from a silicon-containing precursor, a nitrogen-containing precursor, and an oxygen-containing precursor. The silicon nitride layer may be characterized by an oxygen concentration greater than or about 5 at. %. The methods may also include repeating the forming a silicon oxide layer and the forming a silicon nitride layer to produce a stack of alternating layers of silicon oxide and silicon nitride.Type: ApplicationFiled: January 6, 2021Publication date: July 7, 2022Applicant: Applied Materials, Inc.Inventors: Tianyang Li, Deenesh Padhi, Xinhai Han, Hang Yu, Chuan Ying Wang
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Patent number: 11339475Abstract: An apparatus and a method for depositing a film layer that may have minimum contribution to overlay error after a sequence of deposition and lithographic exposure processes are provided. In one example, a method includes positioning a substrate on a substrate support in a process chamber, and flowing a deposition gas mixture comprising a silicon containing gas and a reacting gas to the process chamber through a showerhead having a convex surface facing the substrate support or a concave surface facing the substrate support in accordance with a stress profile of the substrate. A plasma is formed in the presence of the deposition gas mixture in the process chamber by applying an RF power to multiple coupling points of the showerhead that are symmetrically arranged about a center point of the showerhead. A deposition process is then performed on the substrate.Type: GrantFiled: November 8, 2019Date of Patent: May 24, 2022Assignee: Applied Materials, Inc.Inventors: Xinhai Han, Deenesh Padhi, Daemian Raj Benjamin Raj, Kristopher Enslow, Wenjiao Wang, Masaki Ogata, Sai Susmita Addepalli, Nikhil Sudhindrarao Jorapur, Gregory Eugene Chichkanoff, Shailendra Srivastava, Jonghoon Baek, Zakaria Ibrahimi, Juan Carlos Rocha-Alvarez, Tza-Jing Gung
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Publication number: 20220157602Abstract: Exemplary deposition methods may include introducing a precursor into a processing region of a semiconductor processing chamber via a faceplate of the semiconductor processing chamber. The methods may include flowing an oxygen-containing precursor into the processing region from beneath a pedestal of the semiconductor processing chamber. The pedestal may support a substrate. The substrate may define a trench in a surface of the substrate. The methods may include forming a first plasma of the precursor in the processing region of the semiconductor processing chamber. The methods may include depositing a first oxide film within the trench. The methods may include forming a second plasma in the processing region. The methods may include etching the first oxide film, while flowing the oxygen-containing precursor. The methods may include re-forming the first plasma in the processing region. The methods may also include depositing a second oxide film over the etched oxide film.Type: ApplicationFiled: November 18, 2020Publication date: May 19, 2022Applicant: Applied Materials, Inc.Inventors: Madhu Santosh Kumar Mutyala, Deenesh Padhi, Hang Yu
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Publication number: 20220138396Abstract: Methods, systems, and non-transitory computer readable medium are described for generating assessment maps for corrective action. A method includes receiving a first vector map including a first set of vectors each indicating a distortion of a particular location of a plurality of locations on a substrate. The method further includes generating a second vector map including a second set of vectors by rotating a position of each vector in the first set of vectors. The method further includes generating a third vector map including a third set of vectors based on vectors in the second set of vectors and corresponding vectors in the first set of vectors. The method further includes generating a fourth vector map by subtracting each vector of the third set of vectors from a corresponding vector in the first set of vectors. The fourth vector map indicates a planar component of the first vector map.Type: ApplicationFiled: November 3, 2020Publication date: May 5, 2022Inventors: Wenjiao Wang, Joshua Maher, Xinhai Han, Deenesh Padhi, Tza-Jing Gung
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Publication number: 20220130661Abstract: Exemplary semiconductor processing methods may include flowing deposition gases that may include a nitrogen-containing precursor, a silicon-containing precursor, and a carrier gas, into a substrate processing region of a substrate processing chamber. The flow rate ratio of the nitrogen-containing precursor to the silicon-containing precursor may be greater than or about 1:1. The methods may further include generating a deposition plasma from the deposition gases to form a silicon-and-nitrogen containing layer on a substrate in the substrate processing chamber. The silicon-and-nitrogen-containing layer may be treated with a treatment plasma, where the treatment plasma is formed from the carrier gas without the silicon-containing precursor. The flow rate of the carrier gas in the treatment plasma may be greater than a flow rate of the carrier gas in the deposition plasma.Type: ApplicationFiled: October 23, 2020Publication date: April 28, 2022Applicant: Applied Materials, Inc.Inventors: Michael Wenyoung Tsiang, Yichuen Lin, Kevin Hsiao, Hang Yu, Deenesh Padhi, Yijun Liu, Li-Qun Xia
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Publication number: 20220119952Abstract: Exemplary deposition methods may include electrostatically chucking a semiconductor substrate at a first voltage within a processing region of a semiconductor processing chamber. The methods may include performing a deposition process. The deposition process may include forming a plasma within the processing region of the semiconductor processing chamber. The methods may include halting formation of the plasma within the semiconductor processing chamber. The methods may include, simultaneously with the halting, increasing the first voltage of electrostatic chucking to a second voltage. The methods may include purging the processing region of the semiconductor processing chamber.Type: ApplicationFiled: October 20, 2020Publication date: April 21, 2022Applicant: Applied Materials, Inc.Inventors: Rana Howlader, Hang Yu, Madhu Santosh Kumar Mutyala, Zheng John Ye, Abhigyan Keshri, Sanjay Kamath, Daemian Raj Benjamin Raj, Deenesh Padhi
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Publication number: 20220122872Abstract: Semiconductor processing systems and method are described that may include flowing deposition precursors into a substrate processing region of a semiconductor processing chamber, where the substrate processing region includes an electrostatic chuck. The methods may further include depositing a seasoning layer on the electrostatic chuck from the deposition precursors to form a seasoned electrostatic chuck. The seasoning layer may be characterized by a dielectric constant greater than or about 3.5. The methods may still further include applying a voltage to the seasoned electrostatic chuck of greater than or about 500 V. The seasoned electrostatic chuck may be characterized by a leakage current of less than or about 25 mA when the voltage is applied.Type: ApplicationFiled: October 16, 2020Publication date: April 21, 2022Applicant: Applied Materials, Inc.Inventors: Akhil Singhal, Allison Yau, Zeqiong Zhao, Sang-Jin Kim, Zhijun Jiang, Deenesh Padhi, Ganesh Balasubramanian