Patents by Inventor Deepak S
Deepak S has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11760916Abstract: A low dosage hydrate inhibitor blend comprising a cationic surfactant and a co-surfactant. The cationic surfactant has the structural formula: wherein: R1 is an alkyl group or alkenyl group having from 5 to 22 carbon atoms, R2 and R3 are alkyl groups having from 1 to 6 carbon atoms, R4 is a hydrogen atom or an alkyl group having from 1 to 6 carbon atoms, and X— is selected from the group of a carboxylate, an acrylate, a methacrylate, a halide, a phosphonate, a sulfate, a sulfonate, a hydroxide, a carbonate, or any combination thereof; and The co-surfactant is present in the inhibitor blend in an amount of no greater than about 10 percent by weight based on the total weight of the blend.Type: GrantFiled: January 31, 2019Date of Patent: September 19, 2023Assignee: Halliburton Energy Services, Inc.Inventors: Deepak S. Monteiro, Qiang Lan, Loan Vo, Philippe Prince
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Patent number: 11756247Abstract: An embodiment of a graphics apparatus may include a focus identifier to identify a focus area, and a color compressor to selectively compress color data based on the identified focus area. Another embodiment of a graphics apparatus may include a motion detector to detect motion of a real object, a motion predictor to predict a motion of the real object, and an object placer to place a virtual object relative to the real object based on the predicted motion of the real object. Another embodiment of a graphics apparatus may include a frame divider to divide a frame into viewports, a viewport prioritizer to prioritize the viewports, a renderer to render a viewport of the frame in order in accordance with the viewport priorities, and a viewport transmitter to transmit a completed rendered viewport. Other embodiments are disclosed and claimed.Type: GrantFiled: March 8, 2021Date of Patent: September 12, 2023Assignee: Intel CorporationInventors: Deepak S. Vembar, Atsuo Kuwahara, Chandrasekaran Sakthivel, Radhakrishnan Venkataraman, Brent E. Insko, Anupreet S. Kalra, Hugues Labbe, Abhishek R. Appu, Ankur N. Shah, Joydeep Ray, ElMoustapha Ould-Ahmed-Vall, James M. Holland
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Patent number: 11721275Abstract: In one example, a head mounted display system includes at least one memory; and at least one processor to execute instructions to: detect a first position and a first view direction of a head of a user based on sensor data generated by at least one of an accelerometer, at least one camera, or a gyroscope at a first point in time; determine a latency associated with a time to cause an image to be presented on the display; determine a predicted position and a predicted view direction of the head of the user at a second point in time based on the latency; render, prior to the second point in time, the image for presentation on the display based on the predicted position and the predicted view direction of the head of the user; and cause the display to present the rendered image.Type: GrantFiled: November 23, 2022Date of Patent: August 8, 2023Assignee: Intel CorporationInventors: Atsuo Kuwahara, Deepak S. Vembar, Paul S. Diefenbaugh, Vallabhajosyula S. Somayazulu, Kofi C. Whitney
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Publication number: 20230205718Abstract: Examples described herein relate to a configurable switch with dynamically configurable device connections to a processor socket, where the device connections are configured to meet service level agreement (SLA) parameters of a first service executing on the processor socket. For a second service that is to execute on the processor socket and the second service is higher priority than the first service, device connections of the switch to the processor socket are dynamically reconfigured to meet SLA parameters of the second service.Type: ApplicationFiled: December 24, 2021Publication date: June 29, 2023Inventors: Francesc GUIM BERNAT, Deepak S, Kannan Babu R. RAMIA, Palaniappan RAMANATHAN, Timothy VERRALL
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Patent number: 11652045Abstract: An example via contact patterning method includes providing a pattern of alternating trench contacts and gates over a support structure. For each pair of adjacent trench contacts and gates, a trench contact is electrically insulated from an adjacent gate by a dielectric material and/or multiple layers of different dielectric materials, and the gates are recessed with respect to the trench contacts. The method further includes wrapping a protective layer of one or more dielectric materials, and a sacrificial helmet material on top of the trench contacts to protect them during the via contact patterning and etch processes for forming via contacts over one or more gates. Such a method may advantageously allow increasing the edge placement error margin for forming via contacts of metallization stacks.Type: GrantFiled: October 27, 2021Date of Patent: May 16, 2023Assignee: Intel CorporationInventors: Mohit K. Haran, Daniel James Bahr, Deepak S. Rao, Marvin Young Paik, Seungdo An, Debashish Basu, Kilhyun Bang, Jason W. Klaus, Reken Patel, Charles Henry Wallace, James Jeong, Ruth Amy Brain
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Publication number: 20230110339Abstract: In one example, a head mounted display system includes at least one memory; and at least one processor to execute instructions to: detect a first position and a first view direction of a head of a user based on sensor data generated by at least one of an accelerometer, at least one camera, or a gyroscope at a first point in time; determine a latency associated with a time to cause an image to be presented on the display; determine a predicted position and a predicted view direction of the head of the user at a second point in time based on the latency; render, prior to the second point in time, the image for presentation on the display based on the predicted position and the predicted view direction of the head of the user; and cause the display to present the rendered image.Type: ApplicationFiled: November 23, 2022Publication date: April 13, 2023Inventors: Atsuo Kuwahara, Deepak S. Vembar, Paul S. Diefenbaugh, Vallabhajosyula S. Somayazulu, Kofi C. Whitney
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Patent number: 11597865Abstract: Dual cation hydrate inhibitor compositions and methods of using such compositions to, for example, inhibit the formation of gas hydrate agglomerates are provided. In some embodiments, such methods include introducing a hydrate inhibitor composition into a fluid, wherein the hydrate inhibitor composition includes at least one compound having the structural formula: wherein each of R1, R2, and R3 is independently a C1 to C6 hydrocarbon chain, wherein R4 is selected from the group consisting of hydrogen and any C1 to C50 hydrocarbon chain, wherein each of R5 and R6 is independently selected from the group consisting of hydrogen and a C1 to C50 hydrocarbon chain, wherein X? and Y? are counter anions, and wherein each of a and b is independently an integer from 1 to 10.Type: GrantFiled: April 15, 2022Date of Patent: March 7, 2023Assignee: Halliburton Energy Services, Inc.Inventors: Loan Vo, Deepak S. Monteiro, Qiang Lan, Philippe Prince
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Patent number: 11520555Abstract: An embodiment of a graphics apparatus may include a processor, memory communicatively coupled to the processor, and a collaboration engine communicatively coupled to the processor to identify a shared graphics component between two or more users in an environment, and share the shared graphics components with the two or more users in the environment. Embodiments of the collaboration engine may include one or more of a centralized sharer, a depth sharer, a shared preprocessor, a multi-port graphics subsystem, and a decode sharer. Other embodiments are disclosed and claimed.Type: GrantFiled: January 29, 2021Date of Patent: December 6, 2022Assignee: Intel CorporationInventors: Deepak S. Vembar, Atsuo Kuwahara, Chandrasekaran Sakthivel, Radhakrishnan Venkataraman, Brent E. Insko, Anupreet S. Kalra, Hugues Labbe, Altug Koker, Michael Apodaca, Kai Xiao, Jeffery S. Boles, Adam T. Lake, David M. Cimini, Balaji Vembu, Elmoustapha Ould-Ahmed-Vall, Jacek Kwiatkowski, Philip R. Laws, Ankur N. Shah, Abhishek R. Appu, Joydeep Ray, Wenyin Fu, Nikos Kaburlasos, Prasoonkumar Surti, Bhushan M. Borole
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Patent number: 11514839Abstract: In one example, a head mounted display system includes at least one memory; and at least one processor to execute instructions to: detect a first position and a first view direction of a head of a user based on sensor data generated by at least one of an accelerometer, at least one camera, or a gyroscope at a first point in time; determine a latency associated with a time to cause an image to be presented on the display; determine a predicted position and a predicted view direction of the head of the user at a second point in time based on the latency; render, prior to the second point in time, the image for presentation on the display based on the predicted position and the predicted view direction of the head of the user; and cause the display to present the rendered image.Type: GrantFiled: December 23, 2021Date of Patent: November 29, 2022Assignee: Intel CorporationInventors: Atsuo Kuwahara, Deepak S. Vembar, Paul S. Diefenbaugh, Vallabhajosyula S. Somayazulu, Kofi C. Whitney
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Patent number: 11503136Abstract: Systems and methods for migrating data. One system includes a server including at least one electronic processor. The electronic processor is configured to receive local storage information from a migration client executed by each of a plurality of source devices. The electronic processor is also configured to aggregate the local storage information received for each of the plurality of source devices to determine a migration load, and determine a reservation model based on the migration load. In addition, the electronic processor is configured to issue a first reservation to a first source device included in the plurality of source devices based on the reservation model, the first reservation triggering migration of data stored on the first source device to the at least one remote storage location, and, in response to completion of the first reservation, issue a second reservation based on the reservation model.Type: GrantFiled: November 30, 2016Date of Patent: November 15, 2022Assignee: MICROSOFT TECHNOLOGY LICENSING, LLCInventors: Edward B. Averett, Deepak S. Pemmaraju, Andrew K. LaChance
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Patent number: 11494868Abstract: An embodiment of a graphics apparatus may include a context engine to determine contextual information, a recommendation engine communicatively coupled to the context engine to determine a recommendation based on the contextual information, and a configuration engine communicatively coupled to the recommendation engine to adjust a configuration of a graphics operation based on the recommendation. Other embodiments are disclosed and claimed.Type: GrantFiled: February 19, 2021Date of Patent: November 8, 2022Assignee: Intel CorporationInventors: Joydeep Ray, Ankur N. Shah, Abhishek R. Appu, Deepak S. Vembar, ElMoustapha Ould-Ahmed-Vall, Atsuo Kuwahara, Travis T. Schluessler, Linda L. Hurd, Josh B. Mastronarde, Vasanth Ranganathan
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Publication number: 20220270317Abstract: An embodiment of an electronic processing system may include an application processor, persistent storage media communicatively coupled to the application processor, and a graphics subsystem communicatively coupled to the application processor. The graphics subsystem may include a first graphics engine to process a graphics workload, and a second graphics engine to offload at least a portion of the graphics workload from the first graphics engine. The second graphics engine may include a low precision compute engine. The system may further include a wearable display housing the second graphics engine. Other embodiments are disclosed and claimed.Type: ApplicationFiled: December 29, 2021Publication date: August 25, 2022Inventors: Atsuo Kuwahara, Deepak S. Vembar, Chandrasekaran Sakthivel, Radhakrishnan Venkataraman, Brent E. Insko, Anupreet S. Kalra, Hugues Labbe, Abhishek R. Appu, Ankur N. Shah, Joydeep Ray, Elmoustapha Ould-Ahmed-Vall, Prasoonkumar Surti, Murali Ramadoss
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Publication number: 20220235260Abstract: Dual cation hydrate inhibitor compositions and methods of using such compositions to, for example, inhibit the formation of gas hydrate agglomerates are provided. In some embodiments, such methods include introducing a hydrate inhibitor composition into a fluid, wherein the hydrate inhibitor composition includes at least one compound having the structural formula: wherein each of R1, R2, and R3 is independently a C1 to C6 hydrocarbon chain, wherein R4 is selected from the group consisting of hydrogen and any C1 to C50 hydrocarbon chain, wherein each of R5 and R6 is independently selected from the group consisting of hydrogen and a C1 to C50 hydrocarbon chain, wherein X? and Y? are counter anions, and wherein each of a and b is independently an integer from 1 to 10.Type: ApplicationFiled: April 15, 2022Publication date: July 28, 2022Inventors: Loan Vo, Deepak S. Monteiro, Qiang Lan, Philippe Prince
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Publication number: 20220229401Abstract: The present disclosure provides systems and methods for inferring knowledge about manufacturing process metrics. In an aspect, the present disclosure provides a method for inferring knowledge about manufacturing process metrics. The method may comprise: (a) receiving one or more metrics associated with a manufacturing process; and (b) using a hierarchy of models to generate one or more inferences about the manufacturing process based on the one or more metrics, wherein the hierarchy of models comprises one or more individual models and one or more ensemble models configured to generate the one or more inferences based on a combination or an aggregation of outputs generated by the one or more individual models.Type: ApplicationFiled: December 22, 2021Publication date: July 21, 2022Inventors: Matthew Henry LINDER, Devon PETICOLAS, Willem SUNDBLAD, Deepak S. TURAGA
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Publication number: 20220229424Abstract: The present disclosure provides systems and methods for analyzing runs. In an aspect, the present disclosure provides a method for extracting semantic artifacts from manufacturing data. The method may comprise: (a) receiving manufacturing data corresponding to a manufacturing process, wherein the manufacturing data comprises at least one of observation data, context data, temporal metric data, and/or overall equipment effectiveness (OEE) components associated with the manufacturing process; (b) extracting one or more semantic artifacts from the manufacturing data; and (c) using the one or more semantic artifacts to generate a summary representation of the manufacturing process.Type: ApplicationFiled: December 22, 2021Publication date: July 21, 2022Inventors: Matthew Henry LINDER, Devon PETICOLAS, Willem SUNDBLAD, Deepak S. TURAGA, Jeswanth YADAGANI
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Patent number: 11391250Abstract: Systems (100, 200 and 300) and methods (400, 500 and 600) for controlling exhaust gas emissions from naturally aspirated engine are disclosed. The system (100, 200 and 300) includes an open loop exhaust gas recirculation flow to the engine. The system (100, 200 and 300) includes a diesel oxidation catalyst (102, 202 and 302) mounted on or near exhaust manifold (106, 206 and 306) of the engine. Furthermore, the system (100 and 200) includes an exhaust gas mixing conduit (114 and 214) inserted into air intake conduit (104 and 204). The system (100, 200 and 300) further includes an exhaust gas recirculation valve (110, 210 and 310) mounted on cold side or a hot side of EGR cooler. Furthermore, the system (100, 210 and 310) includes an electronic control unit to control exhaust gas recirculation valve (110, 210 and 310) along with various other engine calibration parameters.Type: GrantFiled: July 26, 2019Date of Patent: July 19, 2022Assignee: MAHINDRA & MAHINDRA LTD.Inventors: Velusamy R, Dipankar Ray, Bhosale Sadanand, Hiranandani Pravesh, Rane Santosh, Suresh R, Dalvi Atmaram, Deepak S
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Publication number: 20220223035Abstract: In one embodiment, an apparatus comprises a memory and a processor. The memory is to store sensor data captured by one or more sensors associated with a first device. Further, the processor comprises circuitry to: access the sensor data captured by the one or more sensors associated with the first device; determine that an incident occurred within a vicinity of the first device; identify a first collection of sensor data associated with the incident, wherein the first collection of sensor data is identified from the sensor data captured by the one or more sensors; preserve, on the memory, the first collection of sensor data associated with the incident; and notify one or more second devices of the incident, wherein the one or more second devices are located within the vicinity of the first device.Type: ApplicationFiled: October 8, 2021Publication date: July 14, 2022Applicant: Intel CorporationInventors: Shao-Wen Yang, Eve M. Schooler, Maruti Gupta Hyde, Hassnaa Moustafa, Katalin Klara Bartfai-Walcott, Yen-Kuang Chen, Jessica McCarthy, Christina R. Strong, Arun Raghunath, Deepak S. Vembar
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Publication number: 20220224637Abstract: Methods, apparatus, systems, and articles of manufacture are disclosed for traffic control for application-independent service mesh. In one example, processor circuitry to perform operations to instantiate ingress traffic management circuitry to receive ingress traffic events, at least one of the ingress traffic events to request access to a target microservice running on the second endpoint. The processor circuitry further performs operations to instantiate virtual service authorization circuitry to perform a look up of an authorization policy to the target microservice in the microservice catalog. Finally, the processor circuitry performs operations to instantiate endpoint selection circuitry to select the second endpoint to service the ingress traffic event in response to the authorization policy allowing access to the target microservice.Type: ApplicationFiled: April 1, 2022Publication date: July 14, 2022Inventors: Deepak S, Kannan Babu Ramia, Palaniappan Ramanathan
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Publication number: 20220197367Abstract: A hardware and software coordinated processor power state policy (e.g., policy for C-state) that delivers optimal power state selection by taking in to account the performance and/or responsiveness needs of thread expected to be scheduled on the core entering idle, to achieve improved IPC and performance for cores running user critical tasks. The scheme provides the ability to deliver responsiveness gains for important and/or user-critical threads running on a system-on-chip. A power management controller coupled to the plurality of processing cores, wherein the power management controller receives a hint from an operating system indicative of a bias towards a power state or performance state for at least one of the processing cores of the plurality of processing cores based on a priority of a thread in context switch.Type: ApplicationFiled: December 18, 2020Publication date: June 23, 2022Applicant: Intel CorporationInventors: Deepak S Kirubakaran, Ramakrishnan Sivakumar, Russell Fenger, Monica Gupta, Jianwei Dai, Premanand Sakarda, Guy Therien, Rajshree Chabukswar, Chad Gutierrez, Renji Thomas
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Publication number: 20220169912Abstract: Low-dosage hydrate inhibitor additives and methods of using such additives to, for example, inhibit the formation of gas hydrate agglomerates are provided. In some embodiments, introducing a low-dosage hydrate inhibitor additive into a fluid including at least one component selected from the group consisting of: water, a gas, a liquid hydrocarbon, and any combination thereof, wherein the low-dosage hydrate inhibitor additive includes at least one compound having the structural formula: wherein each of R1, R2, and R3 is independently a C1 to C6 hydrocarbon chain, wherein R4 is a C1 to C50 hydrocarbon chain, and wherein X? is selected from the group consisting of wherein R5 is a methyl or ethyl group, and any combination thereof.Type: ApplicationFiled: May 17, 2019Publication date: June 2, 2022Inventors: Loan Vo, Deepak S. Monteiro