Patents by Inventor Deepukumar M. Nair

Deepukumar M. Nair has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230395321
    Abstract: The present disclosure relates to a process to integrate sintered components in a laminate substrate. The disclosed process starts with providing a precursor substrate, which includes a substrate body having an opening through the substrate body, and a first foil layer. Herein, the first foil layer is formed underneath the substrate body, so as to fully cover a bottom of the opening. Next, a sinterable base material is applied into the opening and over the first foil layer, and then sintered at a first sintering temperature to create a sintered base component. A sinterable contact material is applied over the sintered base component, and then sintered at a second sintering temperature to create a sintered contact film. The sintered base component is confined within the opening by the substrate body on sides, by the first foil layer on bottom, and by the sintered contact film on top.
    Type: Application
    Filed: August 18, 2023
    Publication date: December 7, 2023
    Inventors: Tarak A. Railkar, Deepukumar M. Nair, Jeffrey Dekosky
  • Patent number: 11783998
    Abstract: The present disclosure relates to a process to integrate sintered components in a laminate substrate. The disclosed process starts with providing a precursor substrate, which includes a substrate body having an opening through the substrate body, and a first foil layer. Herein, the first foil layer is formed underneath the substrate body, so as to fully cover a bottom of the opening. Next, a sinterable base material is applied into the opening and over the first foil layer, and then sintered at a first sintering temperature to create a sintered base component. A sinterable contact material is applied over the sintered base component, and then sintered at a second sintering temperature to create a sintered contact film. The sintered base component is confined within the opening by the substrate body on sides, by the first foil layer on bottom, and by the sintered contact film on top.
    Type: Grant
    Filed: August 16, 2019
    Date of Patent: October 10, 2023
    Assignee: Qorvo US, Inc.
    Inventors: Tarak A. Railkar, Deepukumar M. Nair, Jeffrey Dekosky
  • Patent number: 11551995
    Abstract: The present disclosure relates to a substrate that includes a substrate body and a thermoelectric cooler embedded in the substrate body. The thermoelectric cooler includes a top-side plate with an element-contact pad and a bottom-side plate. The element-contact pad is on a top surface of the top-side plate, which faces a same direction as a top surface of the substrate body and is exposed to the external space of the substrate body. The bottom-side plate is below the top-side plate and close to a bottom surface of the top-side plate. Herein, the element-contact pad is configured to accommodate attachment of a heat-generating electrical element. The top-side plate is configured to change temperature of the heat-generating electrical element, and the bottom-side plate is configured to transfer heat to or absorb heat from the bottom surface of the substrate body.
    Type: Grant
    Filed: October 15, 2018
    Date of Patent: January 10, 2023
    Assignee: Qorvo US, Inc.
    Inventors: Mark C. Woods, Kelly M. Lear, Deepukumar M. Nair, Tarak A. Railkar, Bradford Nelson
  • Patent number: 11114363
    Abstract: Electronic package arrangements and related methods are disclosed that provide one or more of improved thermal management and electromagnetic shielding. Electronic packages are disclosed that include arrangements of one or more electronic devices, overmold bodies, and heat spreaders or metal frame structures. The heat spreaders or metal frame structures may be arranged over the electronic devices to form heat dissipation paths that draw operating heat away from the electronic devices in one or more directions including above and below the electronic packages. The heat spreaders or metal frame structures may also be arranged to form electromagnetic shields that reduce crosstalk between the electronic devices within the electronic packages and to suppress unwanted emissions from either escaping or entering the electronic packages.
    Type: Grant
    Filed: September 23, 2019
    Date of Patent: September 7, 2021
    Assignee: Qorvo US, Inc.
    Inventors: Deepukumar M. Nair, Robert Charles Dry, Jeffrey Dekosky
  • Patent number: 10906274
    Abstract: The present disclosure relates to a laminate substrate with sintered components. The disclosed laminate substrate includes a substrate body having an opening through the substrate body, a first foil layer, a sintered base component, and a sintered contact film. The first foil layer is formed underneath the substrate body, such that a first portion of the first foil layer fully covers the bottom of the opening. The sintered base component is formed within the opening and over the first portion of the first foil layer. Herein, the sintered base component has a dielectric constant between 10 and 500, or has a relative permeability greater than 5. The sintered contact film is formed over the sintered base component. The sintered base component is confined within the opening by the substrate body on sides, by the first foil layer on the bottom, and by the sintered contact film on the top.
    Type: Grant
    Filed: August 16, 2019
    Date of Patent: February 2, 2021
    Assignee: Qorvo US, Inc.
    Inventors: Tarak A. Railkar, Deepukumar M. Nair, Jeffrey Dekosky
  • Publication number: 20200203248
    Abstract: Electronic package arrangements and related methods are disclosed that provide one or more of improved thermal management and electromagnetic shielding. Electronic packages are disclosed that include arrangements of one or more electronic devices, overmold bodies, and heat spreaders or metal frame structures. The heat spreaders or metal frame structures may be arranged over the electronic devices to form heat dissipation paths that draw operating heat away from the electronic devices in one or more directions including above and below the electronic packages. The heat spreaders or metal frame structures may also be arranged to form electromagnetic shields that reduce crosstalk between the electronic devices within the electronic packages and to suppress unwanted emissions from either escaping or entering the electronic packages.
    Type: Application
    Filed: September 23, 2019
    Publication date: June 25, 2020
    Inventors: Deepukumar M. Nair, Robert Charles Dry, Jeffrey Dekosky
  • Publication number: 20200147938
    Abstract: The present disclosure relates to a laminate substrate with sintered components. The disclosed laminate substrate includes a substrate body having an opening through the substrate body, a first foil layer, a sintered base component, and a sintered contact film. The first foil layer is formed underneath the substrate body, such that a first portion of the first foil layer fully covers the bottom of the opening. The sintered base component is formed within the opening and over the first portion of the first foil layer. Herein, the sintered base component has a dielectric constant between 10 and 500, or has a relative permeability greater than 5. The sintered contact film is formed over the sintered base component. The sintered base component is confined within the opening by the substrate body on sides, by the first foil layer on the bottom, and by the sintered contact film on the top.
    Type: Application
    Filed: August 16, 2019
    Publication date: May 14, 2020
    Inventors: Tarak A. Railkar, Deepukumar M. Nair, Jeffrey Dekosky
  • Publication number: 20200147695
    Abstract: The present disclosure relates to a process to integrate sintered components in a laminate substrate. The disclosed process starts with providing a precursor substrate, which includes a substrate body having an opening through the substrate body, and a first foil layer. Herein, the first foil layer is formed underneath the substrate body, so as to fully cover a bottom of the opening. Next, a sinterable base material is applied into the opening and over the first foil layer, and then sintered at a first sintering temperature to create a sintered base component. A sinterable contact material is applied over the sintered base component, and then sintered at a second sintering temperature to create a sintered contact film. The sintered base component is confined within the opening by the substrate body on sides, by the first foil layer on bottom, and by the sintered contact film on top.
    Type: Application
    Filed: August 16, 2019
    Publication date: May 14, 2020
    Inventors: Tarak A. Railkar, Deepukumar M. Nair, Jeffrey Dekosky
  • Patent number: 10587029
    Abstract: The present disclosure relates to a substrate that includes a substrate body and a resonator integrated within the substrate body. The resonator includes a resonator body, a top resonator plate, and a bottom resonator plate. The resonator body extends through the substrate body from a top surface to a bottom surface of the substrate body, and is formed of at least one of a dielectric material and a magnetic material. The top resonator plate is coupled to a top side of the resonator body and resides over the top surface of the substrate body, and the bottom resonator plate is coupled to a bottom side of the resonator body and resides over the bottom surface of the substrate body. The top resonator plate and the bottom resonator plate are electrically conductive.
    Type: Grant
    Filed: July 2, 2018
    Date of Patent: March 10, 2020
    Assignee: Qorvo US, Inc.
    Inventors: Jeffrey Dekosky, Deepukumar M. Nair, Scott M. Knapp, Tarak A. Railkar, Lawrence A. Carastro, Timothy G. Kraus
  • Publication number: 20190131209
    Abstract: The present disclosure relates to a substrate that includes a substrate body and a thermoelectric cooler embedded in the substrate body. The thermoelectric cooler includes a top-side plate with an element-contact pad and a bottom-side plate. The element-contact pad is on a top surface of the top-side plate, which faces a same direction as a top surface of the substrate body and is exposed to the external space of the substrate body. The bottom-side plate is below the top-side plate and close to a bottom surface of the top-side plate. Herein, the element-contact pad is configured to accommodate attachment of a heat-generating electrical element. The top-side plate is configured to change temperature of the heat-generating electrical element, and the bottom-side plate is configured to transfer heat to or absorb heat from the bottom surface of the substrate body.
    Type: Application
    Filed: October 15, 2018
    Publication date: May 2, 2019
    Inventors: Mark C. Woods, Kelly M. Lear, Deepukumar M. Nair, Tarak A. Railkar, Bradford Nelson
  • Publication number: 20190074571
    Abstract: The present disclosure relates to a substrate that includes a substrate body and a resonator integrated within the substrate body. The resonator includes a resonator body, a top resonator plate, and a bottom resonator plate. The resonator body extends through the substrate body from a top surface to a bottom surface of the substrate body, and is formed of at least one of a dielectric material and a magnetic material. The top resonator plate is coupled to a top side of the resonator body and resides over the top surface of the substrate body, and the bottom resonator plate is coupled to a bottom side of the resonator body and resides over the bottom surface of the substrate body. The top resonator plate and the bottom resonator plate are electrically conductive.
    Type: Application
    Filed: July 2, 2018
    Publication date: March 7, 2019
    Inventors: Jeffrey Dekosky, Deepukumar M. Nair, Scott M. Knapp, Tarak A. Railkar, Lawrence A. Carastro, Timothy G. Kraus
  • Patent number: 9579748
    Abstract: Substrates and methods to fabricate and use millimeter wave Sievenpiper EBG structures such that the conductive portions are internal to an LTCC package.
    Type: Grant
    Filed: June 4, 2014
    Date of Patent: February 28, 2017
    Assignees: E I DU PONT NEMOURS AND COMPANY, WEMTEC Inc.
    Inventors: Deepukumar M Nair, Michael Arnett Smith, James M Parisi, Elizabeth D Hughes, William E. Mckinzie, III
  • Patent number: 9153863
    Abstract: Disclosed are methods and devices of microwave/millimeter wave package application.
    Type: Grant
    Filed: January 24, 2013
    Date of Patent: October 6, 2015
    Assignee: E I DU PONT DE NEMOURS AND COMPANY
    Inventors: Deepukumar M Nair, Michael Arnett Smith, Bradley Thrasher, James M Parisi, Joao Carlos Malerbi, Elizabeth D Hughes
  • Publication number: 20140354513
    Abstract: Substrates and methods to fabricate and use millimeter wave Sievenpiper EBG structures such that the conductive portions are internal to an LTCC package.
    Type: Application
    Filed: June 4, 2014
    Publication date: December 4, 2014
    Inventors: DEEPUKUMAR M. NAIR, Michael Arnett Smith, James M Parisi, Elizabeth D. Hughes, William E. Mckinzie, III
  • Publication number: 20140353005
    Abstract: Disclosed are methods of using a laser to pattern unfired, screen printed metallization on unfired (green) LTCC tape material by a subtractive process especially on the internal layers of an LTCC circuit.
    Type: Application
    Filed: June 4, 2014
    Publication date: December 4, 2014
    Applicant: E I DU PONT DE NEMOURS AND COMPANY
    Inventors: DEEPUKUMAR M. NAIR, MICHAEL ARNETT SMITH, BRADLEY THRASHER, JAMES M. PARISI, ELIZABETH D. HUGHES
  • Patent number: 8742262
    Abstract: Disclosed herein is a multilayer low temperature co-fired ceramic (LTCC) structure comprising a multilayer low temperature co-fired ceramic comprising glass-ceramic dielectric layers with screen printed thick film inner conductors on portions of the layers and with thin film outer conductors deposited on the upper and lower outer surfaces of the LTCC. At least a portion of the thin film outer conductors is patterned in the form of lines and the spacings between the lines are less then 50 ?m. Also disclosed is a process for making the LTCC structure.
    Type: Grant
    Filed: May 30, 2012
    Date of Patent: June 3, 2014
    Assignee: E I du Pont de Nemours and Company
    Inventors: Scott E. Gordon, Elizabeth D. Hughes, Joao Carlos Malerbi, Deepukumar M. Nair, Kumaran Manikantan Nair, James M. Parisi, Michael Arnett Smith, Ken E. Souders
  • Patent number: 8633858
    Abstract: The invention relates to methods of forming high frequency receivers, transmitters and transceivers from Low Temperature Co-fired Ceramic (LTCC) materials. Two or more layers of a low k thick film dielectric tape and in contact with each other and two or more layers of a low k thick film dielectric tape and in contact with each other form a low k high k LTCC structure with improved properties and the ability to support economical mass production techniques for high frequency transceivers. The invention also relates to the LTCC receiving, transmitting and transceiving structures and the devices made from such structures.
    Type: Grant
    Filed: January 27, 2011
    Date of Patent: January 21, 2014
    Assignee: E I du Pont de Nemours and Company
    Inventors: Deepukumar M. Nair, Kumaran Manikantan Nair, Mark Frederick McCombs, Joao Carlos Malerbi, James M. Parisi
  • Patent number: 8391017
    Abstract: Provided are semiconductor packages comprising at least one thin-film capacitor attached to a printed wiring board core through build-up layers, wherein a first electrode of the thin-film capacitor comprises a thin nickel foil, a second electrode of the thin-film capacitor comprises a copper electrode, and a copper layer is formed on the nickel foil. The interconnections between the thin-film capacitor and the semiconductor device provide a low inductance path to transfer charge to and from the semiconductor device. Also provided are methods for fabricating such semiconductor packages.
    Type: Grant
    Filed: April 20, 2010
    Date of Patent: March 5, 2013
    Assignee: Georgia Tech Research Corporation
    Inventors: David Ross McGregor, Cheong-Wo Hunter Chan, Lynne E. Dellis, Fuhan Liu, Deepukumar M. Nair, Venkatesh Sundaram
  • Publication number: 20120305296
    Abstract: Disclosed herein is a multilayer low temperature co-fired ceramic (LTCC) structure comprising a multilayer low temperature co-fired ceramic comprising glass-ceramic dielectric layers with screen printed thick film inner conductors on portions of the layers and with thin film outer conductors deposited on the upper and lower outer surfaces of the LTCC. At least a portion of the thin film outer conductors is patterned in the form of lines and the spacings between the lines are less then 50 ?m. Also disclosed is a process for making the LTCC structure.
    Type: Application
    Filed: May 30, 2012
    Publication date: December 6, 2012
    Applicant: E I DU PONT DE NEMOURS AND COMPANY
    Inventors: SCOTT E. GORDON, ELIZABETH D. HUGHES, JOAO CARLOS MALERBI, DEEPUKUMAR M. NAIR, KUMARAN MANIKANTAN NAIR, JAMES M. PARISI, MICHAEL ARNETT SMITH, KEN E. SOUDERS
  • Publication number: 20110187602
    Abstract: The invention relates to methods of forming high frequency receivers, transmitters and transceivers from Low Temperature Co-fired Ceramic (LTCC) materials. Two or more layers of a low k thick film dielectric tape and in contact with each other and two or more layers of a low k thick film dielectric tape and in contact with each other form a low k high k LTCC structure with improved properties and the ability to support economical mass production techniques for high frequency transceivers. The invention also relates to the LTCC receiving, transmitting and transceiving structures and the devices made from such structures.
    Type: Application
    Filed: January 27, 2011
    Publication date: August 4, 2011
    Applicant: E.I. DU PONT DE NEMOURS AND COMPANY
    Inventors: Deepukumar M. Nair, Kumaran Manikantan Nair, Mark Frederick McCombs, Joao Carlos Malerbi, James M. Parisi