Patents by Inventor Deirdre O'Shea

Deirdre O'Shea has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240289292
    Abstract: Embodiments relate to an integrated circuit of an electronic device that coordinates activities with another integrated circuit of the electronic device. The integrated circuit includes an interface circuit and a processor circuit. The interface circuit communicates over a multi-drop bus connected to multiple electronic components. The processor circuit receives an authorization request from the integrated circuit via the interface circuit and the multi-drop bus. The received authorization request relates to authorization to perform an activity on the other integrated circuit. In response to receiving the authorization request, the processor circuit determines whether the other integrated circuit is authorized to execute the activity.
    Type: Application
    Filed: May 6, 2024
    Publication date: August 29, 2024
    Applicant: Apple Inc.
    Inventors: Helena Deirdre O'SHEA, Camille CHEN, Vijay Kumar RAMAMURTHI, Alon PAYCHER, Matthias SAUER, Bernd ADLER
  • Publication number: 20240275369
    Abstract: Embodiments relate to updating spur cancellation at a victim integrated circuit (IC) in accordance with dynamic changes in the operating frequencies of an aggressor IC. The aggressor IC changes its operating frequencies at an update time that is determined in advance. The update time and the changes to the operating frequencies are shared with the victim IC. The victim IC dynamically updates the relationships between frequencies of local clock signals for the victim IC and the aggressor IC. The victim IC generates a spur cancellation parameter based on the updated relationships of local clock frequencies, the update time and the changes to the operating frequencies of the aggressor IC, and configures a spur cancellation circuit. In this way, the victim IC may perform effective spur cancellation despite changes in the operating frequencies of the aggressor IC and deviation of the local clock frequencies.
    Type: Application
    Filed: April 26, 2024
    Publication date: August 15, 2024
    Applicant: Apple Inc.
    Inventors: Helena Deirdre O'SHEA, Dmitry CHERNIAVSKY, Tim SCHOENAUER, Ali MOAZ, Rahmi HEZAR, Ram KANUMALLI
  • Publication number: 20240202149
    Abstract: Embodiments relate to coordinating the operations of subsystems in a communication system of an electronic device where a coexistence hub device monitors the state information transmitted as coexistence messages over one or more multi-drop buses, processes the monitored coexistence messages and sends out control messages as coexistence messages to other systems on chips (SOCs). The coexistence hub device can also update the operations of the communication system. The coexistence hub device may receive an operation policy from a central processor and may execute the operation policy without further coordination of the central processor. The coexistence hub device broadcasts the control messages as coexistence messages according to the executed operation policy.
    Type: Application
    Filed: February 29, 2024
    Publication date: June 20, 2024
    Applicant: Apple Inc.
    Inventors: Helena Deirdre O'Shea, Matthias Sauer, Jorge L. Rivera Espinoza, Bernd Adler
  • Patent number: 12001364
    Abstract: Embodiments relate to an integrated circuit of an electronic device that coordinates activities with another integrated circuit of the electronic device. The integrated circuit includes an interface circuit and a processor circuit. The interface circuit communicates over a multi-drop bus connected to multiple electronic components. The processor circuit receives an authorization request from the integrated circuit via the interface circuit and the multi-drop bus. The received authorization request relates to authorization to perform an activity on the other integrated circuit. In response to receiving the authorization request, the processor circuit determines whether the other integrated circuit is authorized to execute the activity.
    Type: Grant
    Filed: March 21, 2023
    Date of Patent: June 4, 2024
    Assignee: APPLE INC.
    Inventors: Helena Deirdre O'Shea, Camille Chen, Vijay Kumar Ramamurthi, Alon Paycher, Matthias Sauer, Bernd W. Adler
  • Patent number: 12003244
    Abstract: Embodiments relate to updating spur cancellation at a victim integrated circuit (IC) in accordance with dynamic changes in the operating frequencies of an aggressor IC. The aggressor IC changes its operating frequencies at an update time that is determined in advance. The update time and the changes to the operating frequencies are shared with the victim IC. The victim IC dynamically updates the relationships between frequencies of local clock signals for the victim IC and the aggressor IC. The victim IC generates a spur cancellation parameter based on the updated relationships of local clock frequencies, the update time and the changes to the operating frequencies of the aggressor IC, and configures a spur cancellation circuit. In this way, the victim IC may perform effective spur cancellation despite changes in the operating frequencies of the aggressor IC and deviation of the local clock frequencies.
    Type: Grant
    Filed: September 8, 2021
    Date of Patent: June 4, 2024
    Assignee: APPLE INC.
    Inventors: Helena Deirdre O'Shea, Dmitry Cherniavsky, Tim Schoenauer, Ali Moaz, Rahmi Hezar, Ram Kanumalli
  • Patent number: 11978422
    Abstract: Embodiments relate to a billboard circuit that stores context information received from various component circuits in an electronic device. The context information indicates an operating status of the corresponding component circuit, system or shared resources. The stored context information may be retrieved by one or more component circuits when events (e.g., turning on of a component circuit) are detected. By using the billboard circuit, a component circuit may detect changes in the operating status of other components circuits and configure or update its operations even when the changes occurred while the component circuit was asleep or disabled. The billboard circuit may monitor updating of the context information by the component circuit and initiate notification to other components circuits when certain entries of the context information is updated.
    Type: Grant
    Filed: August 8, 2022
    Date of Patent: May 7, 2024
    Assignee: Apple Inc.
    Inventors: Helena Deirdre O'Shea, Matthias Sauer, Jorge L. Rivera Espinoza
  • Patent number: 11940936
    Abstract: Embodiments relate to coordinating the operations of subsystems in a communication system of an electronic device where a coexistence hub device monitors the state information transmitted as coexistence messages over one or more multi-drop buses, processes the monitored coexistence messages and sends out control messages as coexistence messages to other systems on chips (SOCs). The coexistence hub device can also update the operations of the communication system. The coexistence hub device may receive an operation policy from a central processor and may execute the operation policy without further coordination of the central processor. The coexistence hub device broadcasts the control messages as coexistence messages according to the executed operation policy.
    Type: Grant
    Filed: July 30, 2021
    Date of Patent: March 26, 2024
    Assignee: Apple Inc.
    Inventors: Helena Deirdre O'Shea, Matthias Sauer, Jorge L. Rivera Espinoza, Bernd Adler
  • Publication number: 20240097937
    Abstract: Embodiments relate to including information in a data packet transmitted by a transmitting integrated circuit (e.g., SOC) to account for a time delay associated with an unsuccessful arbitration attempt to send the data packet over a multi-drop bus. The unsuccessful arbitration attempt by the integrated circuit may delay the transmission of the data packet until the multi-drop bus becomes available for the integrated circuit to send the data packet. The data packet includes a data field to include time delay information caused by the unsuccessful arbitration attempt. A receiving integrated circuit may determine the time that the data packet would have been sent out from the transmitting integrated circuit absent the unsuccessful arbitration attempt based on the delay information. Embodiments also relate to a synchronization generator circuit in an integrated circuit that generates timing signals indicating times at which periodic events occur at another integrated circuit.
    Type: Application
    Filed: November 21, 2023
    Publication date: March 21, 2024
    Applicant: Apple Inc.
    Inventors: Helena Deirdre O'SHEA, Matthias SAUER, Jorge L. RIVERA ESPINOZA
  • Publication number: 20240056066
    Abstract: Embodiments relate to identifying frequencies to be protected at a victim integrated circuit (IC) and sending protection information including the identified frequencies to an aggressor IC. The aggressor IC configures its subsystems or circuits to operate using operating frequencies that prevents spurs that may interfere with the frequencies identified in the protection information. If not all of the frequencies in the protection information can be protected, the aggressor IC selects a subset of the frequencies to be protected. Then, the aggressor IC configures the operating frequencies of its subsystems or circuits so that spurs that they generate do not interfere with the selected frequencies.
    Type: Application
    Filed: August 25, 2023
    Publication date: February 15, 2024
    Applicant: Apple Inc.
    Inventors: Helena Deirdre O'SHEA, Ali MOAZ, Tim SCHOENAUER, Rahmi HEZAR
  • Patent number: 11863346
    Abstract: Embodiments relate to including information in a data packet transmitted by a transmitting integrated circuit (e.g., SOC) to account for a time delay associated with an unsuccessful arbitration attempt to send the data packet over a multi-drop bus. The unsuccessful arbitration attempt by the integrated circuit may delay the transmission of the data packet until the multi-drop bus becomes available for the integrated circuit to send the data packet. The data packet includes a data field to include time delay information caused by the unsuccessful arbitration attempt. A receiving integrated circuit may determine the time that the data packet would have been sent out from the transmitting integrated circuit absent the unsuccessful arbitration attempt based on the delay information. Embodiments also relate to a synchronization generator circuit in an integrated circuit that generates timing signals indicating times at which periodic events occur at another integrated circuit.
    Type: Grant
    Filed: January 30, 2023
    Date of Patent: January 2, 2024
    Assignee: APPLE INC.
    Inventors: Helena Deirdre O'Shea, Matthias Sauer, Jorge L. Rivera Espinoza
  • Patent number: 11777479
    Abstract: Embodiments relate to identifying frequencies to be protected at a victim integrated circuit (IC) and sending protection information including the identified frequencies to an aggressor IC. The aggressor IC configures its subsystems or circuits to operate using operating frequencies that prevents spurs that may interfere with the frequencies identified in the protection information. If not all of the frequencies in the protection information can be protected, the aggressor IC selects a subset of the frequencies to be protected. Then, the aggressor IC configures the operating frequencies of its subsystems or circuits so that spurs that they generate do not interfere with the selected frequencies.
    Type: Grant
    Filed: October 31, 2022
    Date of Patent: October 3, 2023
    Assignee: APPLE INC.
    Inventors: Helena Deirdre O'Shea, Ali Moaz, Tim Schoenauer, Rahmi Hezar
  • Publication number: 20230171126
    Abstract: Embodiments relate to including information in a data packet transmitted by a transmitting integrated circuit (e.g., SOC) to account for a time delay associated with an unsuccessful arbitration attempt to send the data packet over a multi-drop bus. The unsuccessful arbitration attempt by the integrated circuit may delay the transmission of the data packet until the multi-drop bus becomes available for the integrated circuit to send the data packet. The data packet includes a data field to include time delay information caused by the unsuccessful arbitration attempt. A receiving integrated circuit may determine the time that the data packet would have been sent out from the transmitting integrated circuit absent the unsuccessful arbitration attempt based on the delay information. Embodiments also relate to a synchronization generator circuit in an integrated circuit that generates timing signals indicating times at which periodic events occur at another integrated circuit.
    Type: Application
    Filed: January 30, 2023
    Publication date: June 1, 2023
    Inventors: Helena Deirdre O'Shea, Matthias Sauer, Jorge L. Rivera Espinoza
  • Patent number: 11652522
    Abstract: Certain aspects of the present disclosure relate to communication systems, and more particularly, to improving performance for sounding reference signal (SRS) antenna switching in carrier aggregation (CA). A method is provided, that may be performed by a user equipment (UE) for wireless communications. The method includes determining one or more band combinations that share an antenna switch and sending a list of one or more bands in the one or more band combinations to a base station (BS). The BS receives the list and schedules the UE based on the received list.
    Type: Grant
    Filed: August 8, 2018
    Date of Patent: May 16, 2023
    Assignee: QUALCOMM Incorporated
    Inventors: Prashanth Akula, Alberto Rico Alvarino, Aamod Khandekar, Helena Deirdre O'Shea, Supratik Bhattacharjee
  • Patent number: 11640365
    Abstract: Embodiments relate to an integrated circuit of an electronic device that coordinates activities with another integrated circuit of the electronic device. The integrated circuit includes an interface circuit and a processor circuit. The interface circuit communicates over a multi-drop bus connected to multiple electronic components. The processor circuit receives an authorization request from the integrated circuit via the interface circuit and the multi-drop bus. The received authorization request relates to authorization to perform an activity on the other integrated circuit. In response to receiving the authorization request, the processor circuit determines whether the other integrated circuit is authorized to execute the activity.
    Type: Grant
    Filed: October 13, 2021
    Date of Patent: May 2, 2023
    Inventors: Helena Deirdre O'Shea, Camille Chen, Vijay Kumar Ramamurthi, Alon Paycher, Matthias Sauer, Bernd W. Adler
  • Publication number: 20230073376
    Abstract: Embodiments relate to identifying frequencies to be protected at a victim integrated circuit (IC) and sending protection information including the identified frequencies to an aggressor IC. The aggressor IC configures its subsystems or circuits to operate using operating frequencies that prevents spurs that may interfere with the frequencies identified in the protection information. If not all of the frequencies in the protection information can be protected, the aggressor IC selects a subset of the frequencies to be protected. Then, the aggressor IC configures the operating frequencies of its subsystems or circuits so that spurs that they generate do not interfere with the selected frequencies.
    Type: Application
    Filed: October 31, 2022
    Publication date: March 9, 2023
    Inventors: Helena Deirdre O'Shea, Ali Moaz, Tim Schoenauer, Rahmi Hezar
  • Publication number: 20230072903
    Abstract: Embodiments relate to updating spur cancellation at a victim integrated circuit (IC) in accordance with dynamic changes in the operating frequencies of an aggressor IC. The aggressor IC changes its operating frequencies at an update time that is determined in advance. The update time and the changes to the operating frequencies are shared with the victim IC. The victim IC dynamically updates the relationships between frequencies of local clock signals for the victim IC and the aggressor IC. The victim IC generates a spur cancellation parameter based on the updated relationships of local clock frequencies, the update time and the changes to the operating frequencies of the aggressor IC, and configures a spur cancellation circuit. In this way, the victim IC may perform effective spur cancellation despite changes in the operating frequencies of the aggressor IC and deviation of the local clock frequencies.
    Type: Application
    Filed: September 8, 2021
    Publication date: March 9, 2023
    Inventors: Helena Deirdre O'Shea, Dmitry Cherniavsky, Tim Schoenauer, Ali Moaz, Rahmi Hezar, Ram Kanumalli
  • Patent number: 11595230
    Abstract: Embodiments relate to including information in a data packet transmitted by a transmitting integrated circuit (e.g., SOC) to account for a time delay associated with an unsuccessful arbitration attempt to send the data packet over a multi-drop bus. The unsuccessful arbitration attempt by the integrated circuit may delay the transmission of the data packet until the multi-drop bus becomes available for the integrated circuit to send the data packet. The data packet includes a data field to include time delay information caused by the unsuccessful arbitration attempt. A receiving integrated circuit may determine the time that the data packet would have been sent out from the transmitting integrated circuit absent the unsuccessful arbitration attempt based on the delay information. Embodiments also relate to a synchronization generator circuit in an integrated circuit that generates timing signals indicating times at which periodic events occur at another integrated circuit.
    Type: Grant
    Filed: June 30, 2022
    Date of Patent: February 28, 2023
    Assignee: Apple Inc.
    Inventors: Helena Deirdre O'Shea, Matthias Sauer, Jorge L. Rivera Espinoza
  • Patent number: 11522531
    Abstract: Identifying frequencies to be protected at a victim integrated circuit (IC) and sending protection information including the identified frequencies to an aggressor IC. The aggressor IC configures its subsystems or circuits to operate using operating frequencies that prevents spurs that may interfere with the frequencies identified in the protection information. If not all of the frequencies in the protection information can be protected, the aggressor IC selects a subset of the frequencies to be protected. Then, the aggressor IC configures the operating frequencies of its subsystems or circuits so that spurs that they generate do not interfere with the selected frequencies.
    Type: Grant
    Filed: September 8, 2021
    Date of Patent: December 6, 2022
    Assignee: Apple Inc.
    Inventors: Helena Deirdre O'Shea, Ali Moaz, Tim Schoenauer, Rahmi Hezar
  • Publication number: 20220382701
    Abstract: Embodiments relate to a billboard circuit that stores context information received from various component circuits in an electronic device. The context information indicates an operating status of the corresponding component circuit, system or shared resources. The stored context information may be retrieved by one or more component circuits when events (e.g., turning on of a component circuit) are detected. By using the billboard circuit, a component circuit may detect changes in the operating status of other components circuits and configure or update its operations even when the changes occurred while the component circuit was asleep or disabled. The billboard circuit may monitor updating of the context information by the component circuit and initiate notification to other components circuits when certain entries of the context information is updated.
    Type: Application
    Filed: August 8, 2022
    Publication date: December 1, 2022
    Inventors: Helena Deirdre O'Shea, Matthias Sauer, Jorge L. Rivera Espinoza
  • Publication number: 20220337452
    Abstract: Embodiments relate to including information in a data packet transmitted by a transmitting integrated circuit (e.g., SOC) to account for a time delay associated with an unsuccessful arbitration attempt to send the data packet over a multi-drop bus. The unsuccessful arbitration attempt by the integrated circuit may delay the transmission of the data packet until the multi-drop bus becomes available for the integrated circuit to send the data packet. The data packet includes a data field to include time delay information caused by the unsuccessful arbitration attempt. A receiving integrated circuit may determine the time that the data packet would have been sent out from the transmitting integrated circuit absent the unsuccessful arbitration attempt based on the delay information. Embodiments also relate to a synchronization generator circuit in an integrated circuit that generates timing signals indicating times at which periodic events occur at another integrated circuit.
    Type: Application
    Filed: June 30, 2022
    Publication date: October 20, 2022
    Inventors: Helena Deirdre O'Shea, Matthias Sauer, Jorge L. Rivera Espinoza