Patents by Inventor Dennis Alexander

Dennis Alexander has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11006818
    Abstract: A portable laparoscope is disclosed. In implementations, the portable laparoscope includes a housing and an elongated tube coupled to the housing. A lighting source and a camera are disposed proximate to an end of the elongated tube opposite the housing. The camera is configured to capture an image in a viewing area that is illuminated by light provided by the lighting source. The portable laparoscope includes an image display apparatus configured to display the images acquired by the camera and/or to transmit the images to a remote display device. The housing may be configured to hold and position an insufflator.
    Type: Grant
    Filed: February 1, 2018
    Date of Patent: May 18, 2021
    Assignee: The Board of Regents of the University of Nebraska
    Inventors: Chandrakanth Are, Madhuri Are, Dennis Alexander
  • Patent number: 11005494
    Abstract: A DAC driver includes a number of DAC drivers coupled to a load network. A first DAC driver includes a first set of data switches that can be controlled by a first digital input signal. The first DAC driver further includes a first set of output switches, a first set of dump switches and a first set of current sources. Another DAC driver includes a second set of output switches, dump switches, and current sources. The first set of output switches or the second set of output switches are operable to respectively couple either one of the first set of data switches or the first set of current sources to the load network. The first set of dump switches or the second set of dump switches are operable to respectively dump the first set of current sources or the second set current sources into a respective dump load.
    Type: Grant
    Filed: July 23, 2020
    Date of Patent: May 11, 2021
    Assignee: Jariet Technologies, Inc.
    Inventors: Ark-Chew Wong, Richard Dennis Alexander
  • Patent number: 10985768
    Abstract: A ultra-high speed DAC apparatus (e.g., with a full sampling frequency not less than 20 GHz) may include one or more digital pre-coders and DAC modules. Each DAC module may include multiple current-mode DAC systems and a first power combiner. The gate length of transistors within each DAC module may be between 6 and 40 nm. Each current-mode DAC system includes a transmission line (e.g., 40 to 80 microns long) coupled to multiple interleaving sub-DAC systems (within the current-mode DAC systems) and the first power combiner. The first power combiner combines, without interleaving, analog signals that have been interleaved within the current-mode DAC systems. The impedance of the first power combiner matches the impedance of each of the current-mode DAC systems and a load of the first power combiner. A second power combiner combines, without interleaving, analog signals from the DAC modules.
    Type: Grant
    Filed: August 11, 2020
    Date of Patent: April 20, 2021
    Assignee: JARIET TECHNOLOGIES, INC.
    Inventors: Ark-Chew Wong, Richard Dennis Alexander, Craig A. Hornbuckle
  • Publication number: 20210058093
    Abstract: A double-balanced radio-frequency (RF) mixing digital-to-analog converter (DAC) apparatus includes a load network, a first set of resistive DAC driver circuits and a first mixing core. The first mixing core can receive first RF input signals from the first set of resistive DAC driver circuits and can provide a first mixed signal to the load network. The first mixing core includes a first input differential pair coupled to two first cross-coupled differential pairs. The first input differential pair can receive first RF input signals at respective first input nodes. Each of the two first cross-coupled differential pairs can receive first positive and negative local oscillator (LO) signals at corresponding first input nodes. The first mixing core can mix the first RF input signals with the first positive and negative LO signals.
    Type: Application
    Filed: November 6, 2020
    Publication date: February 25, 2021
    Inventors: Ark-Chew WONG, Craig A. HORNBUCKLE, Richard Dennis ALEXANDER
  • Patent number: 10897266
    Abstract: A double-balanced radio-frequency (RF) mixing digital-to-analog converter (DAC) apparatus includes a load network, a first set of resistive DAC driver circuits and a first mixing core. The first mixing core can receive first RF input signals from the first set of resistive DAC driver circuits and can provide a first mixed signal to the load network. The first mixing core includes a first input differential pair coupled to two first cross-coupled differential pairs. The first input differential pair can receive first RF input signals at respective first input nodes. Each of the two first cross-coupled differential pairs can receive first positive and negative local oscillator (LO) signals at corresponding first input nodes. The first mixing core can mix the first RF input signals with the first positive and negative LO signals.
    Type: Grant
    Filed: May 1, 2018
    Date of Patent: January 19, 2021
    Assignee: Jariet Technologies, Inc.
    Inventors: Ark-Chew Wong, Craig A. Hornbuckle, Richard Dennis Alexander
  • Publication number: 20200409407
    Abstract: A band-pass clock distribution circuit includes a clock tree circuit including at least one clock buffer circuit. The clock tree circuit may be configured to receive a first clock signal from a clock generator circuit and to generate a second clock signal based on the first clock signal. A band-pass filter may be configured to receive the second clock signal and to provide a third clock signal to one or more load circuits. The band-pass filter includes a filtering resonant network including a first inductor and a second inductor coupled to one another at a center tap. The filtering resonant network is configurable to resonate with a parasitic capacitance associated with the one or more load circuits. A portion of the band-pass filter is integrated with the clock tree circuit.
    Type: Application
    Filed: September 16, 2020
    Publication date: December 31, 2020
    Inventors: Ark-Chew WONG, Richard Dennis ALEXANDER, Clifford N. DUONG
  • Publication number: 20200373932
    Abstract: A ultra-high speed DAC apparatus (e.g., with a full sampling frequency not less than 20 GHz) may include one or more digital pre-coders and DAC modules. Each DAC module may include multiple current-mode DAC systems and a first power combiner. The gate length of transistors within each DAC module may be between 6 and 40 nm. Each current-mode DAC system includes a transmission line (e.g., 40 to 80 microns long) coupled to multiple interleaving sub-DAC systems (within the current-mode DAC systems) and the first power combiner. The first power combiner combines, without interleaving, analog signals that have been interleaved within the current-mode DAC systems. The impedance of the first power combiner matches the impedance of each of the current-mode DAC systems and a load of the first power combiner. A second power combiner combines, without interleaving, analog signals from the DAC modules.
    Type: Application
    Filed: August 11, 2020
    Publication date: November 26, 2020
    Inventors: Ark-Chew WONG, Richard Dennis ALEXANDER, Craig A. HORNBUCKLE
  • Publication number: 20200358452
    Abstract: A DAC driver includes a number of DAC drivers coupled to a load network. A first DAC driver includes a first set of data switches that can be controlled by a first digital input signal. The first DAC driver further includes a first set of output switches, a first set of dump switches and a first set of current sources. Another DAC driver includes a second set of output switches, dump switches, and current sources. The first set of output switches or the second set of output switches are operable to respectively couple either one of the first set of data switches or the first set of current sources to the load network. The first set of dump switches or the second set of dump switches are operable to respectively dump the first set of current sources or the second set current sources into a respective dump load.
    Type: Application
    Filed: July 23, 2020
    Publication date: November 12, 2020
    Inventors: Ark-Chew WONG, Richard Dennis ALEXANDER
  • Patent number: 10802533
    Abstract: A band-pass clock distribution circuit includes a clock tree circuit including at least one clock buffer circuit. The clock tree circuit may be configured to receive a first clock signal from a clock generator circuit and to generate a second clock signal based on the first clock signal. A band-pass filter may be configured to receive the second clock signal and to provide a third clock signal to one or more load circuits. The band-pass filter includes a filtering resonant network including a first inductor and a second inductor coupled to one another at a center tap. The filtering resonant network is configurable to resonate with a parasitic capacitance associated with the one or more load circuits. A portion of the band-pass filter is integrated with the clock tree circuit.
    Type: Grant
    Filed: February 17, 2017
    Date of Patent: October 13, 2020
    Assignee: Jariet Technologies, Inc.
    Inventors: Ark-Chew Wong, Richard Dennis Alexander, Clifford N. Duong
  • Patent number: 10792660
    Abstract: Systems and methods are described for propelling a liquid droplet in a Leidenfrost state. A microfluidic device embodiment includes, but is not limited to, a solid structure having a patterned surface, the patterned surface including at least a first patterned region having a first Leidenfrost temperature with respect to a fluid material and a second patterned region having a second Leidenfrost temperature with respect to the fluid, the first patterned region adjacent to the second patterned region, the first patterned region defining a path over which a droplet of the fluid is configured to travel in a Leidenfrost state.
    Type: Grant
    Filed: January 13, 2015
    Date of Patent: October 6, 2020
    Assignee: NUtech Ventures
    Inventors: Sidy Ndao, George Gogos, Dennis Alexander, Troy Anderson, Craig Zuhlke
  • Patent number: 10784880
    Abstract: A ultra-high speed DAC apparatus (e.g., with a full sampling frequency not less than 20 GHz) may include one or more digital pre-coders and DAC modules. Each DAC module may include multiple current-mode DAC systems and a first power combiner. The gate length of transistors within each DAC module may be between 6 and 40 nm. Each current-mode DAC system includes a transmission line (e.g., 40 to 80 microns long) coupled to multiple interleaving sub-DAC systems (within the current-mode DAC systems) and the first power combiner. The first power combiner combines, without interleaving, analog signals that have been interleaved within the current-mode DAC systems. The impedance of the first power combiner matches the impedance of each of the current-mode DAC systems and a load of the first power combiner. A second power combiner combines, without interleaving, analog signals from the DAC modules.
    Type: Grant
    Filed: July 5, 2018
    Date of Patent: September 22, 2020
    Assignee: Jariet Technologies, Inc.
    Inventors: Ark-Chew Wong, Richard Dennis Alexander, Craig A. Hornbuckle
  • Patent number: 10771086
    Abstract: A DAC driver includes a number of DAC drivers coupled to a load network. A first DAC driver includes a first set of data switches that can be controlled by a first digital input signal. The first DAC driver further includes a first set of output switches, a first set of dump switches and a first set of current sources. Another DAC driver includes a second set of output switches, dump switches, and current sources. The first set of output switches or the second set of output switches are operable to respectively couple either one of the first set of data switches or the first set of current sources to the load network. The first set of dump switches or the second set of dump switches are operable to respectively dump the first set of current sources or the second set current sources into a respective dump load.
    Type: Grant
    Filed: December 19, 2017
    Date of Patent: September 8, 2020
    Assignee: Jariet Technologies, Inc.
    Inventors: Ark-Chew Wong, Richard Dennis Alexander
  • Publication number: 20200228133
    Abstract: A hybrid digital-to-analog converter (DAC) driver circuit includes a current-mode DAC driver, a voltage-mode DAC driver, and a combination circuit. The current-mode DAC driver may be configured to receive a first set of bits of a digital input signal and to generate a first analog signal. The voltage-mode DAC driver may be configured to receive a second set of bits of the digital input signal and to generate a second analog signal. The combination circuit may be configured to combine the first analog signal and the second analog signal and to generate an analog output signal. The DAC driver circuit may be terminated by adjusting resistor values of the voltage-mode DAC driver. The current-mode DAC driver and the voltage-mode DAC driver are differential drivers, and may be configured to operate with a single clock signal.
    Type: Application
    Filed: March 30, 2020
    Publication date: July 16, 2020
    Inventors: Ark-Chew WONG, Richard Dennis ALEXANDER
  • Publication number: 20200220551
    Abstract: A ultra-high speed DAC apparatus (e.g., with a full sampling frequency not less than 20 GHz) may include one or more digital pre-coders and DAC modules. Each DAC module may include multiple current-mode DAC systems and a first power combiner. The gate length of transistors within each DAC module may be between 6 and 40 nm. Each current-mode DAC system includes a transmission line (e.g., 40 to 80 microns long) coupled to multiple interleaving sub-DAC systems (within the current-mode DAC systems) and the first power combiner. The first power combiner combines, without interleaving, analog signals that have been interleaved within the current-mode DAC systems. The impedance of the first power combiner matches the impedance of each of the current-mode DAC systems and a load of the first power combiner. A second power combiner combines, without interleaving, analog signals from the DAC modules.
    Type: Application
    Filed: July 5, 2018
    Publication date: July 9, 2020
    Inventors: Ark-Chew WONG, Richard Dennis ALEXANDER, Craig A. HORNBUCKLE
  • Publication number: 20200119746
    Abstract: A double-balanced radio-frequency (RF) mixing digital-to-analog converter (DAC) apparatus includes a load network, a first set of resistive DAC driver circuits and a first mixing core. The first mixing core can receive first RF input signals from the first set of resistive DAC driver circuits and can provide a first mixed signal to the load network. The first mixing core includes a first input differential pair coupled to two first cross-coupled differential pairs. The first input differential pair can receive first RF input signals at respective first input nodes. Each of the two first cross-coupled differential pairs can receive first positive and negative local oscillator (LO) signals at corresponding first input nodes. The first mixing core can mix the first RF input signals with the first positive and negative LO signals.
    Type: Application
    Filed: May 1, 2018
    Publication date: April 16, 2020
    Inventors: Ark-Chew WONG, Craig A. HORNBUCKLE, Richard Dennis ALEXANDER
  • Patent number: 10608662
    Abstract: A hybrid digital-to-analog converter (DAC) driver circuit includes a current-mode DAC driver, a voltage-mode DAC driver, and a combination circuit. The current-mode DAC driver may be configured to receive a first set of bits of a digital input signal and to generate a first analog signal. The voltage-mode DAC driver may be configured to receive a second set of bits of the digital input signal and to generate a second analog signal. The combination circuit may be configured to combine the first analog signal and the second analog signal and to generate an analog output signal. The DAC driver circuit may be terminated by adjusting resistor values of the voltage-mode DAC driver. The current-mode DAC driver and the voltage-mode DAC driver are differential drivers, and may be configured to operate with a single clock signal.
    Type: Grant
    Filed: March 30, 2017
    Date of Patent: March 31, 2020
    Assignee: Jariet Technologies, Inc.
    Inventors: Ark-Chew Wong, Richard Dennis Alexander
  • Publication number: 20190382671
    Abstract: The invention relates to a plant for generating negative emissions of CO2. The plant 100 comprises a gasifier 110, a lime kiln 130, a separator 150, and a CO2 permanent storage 170. The gasifier is suitable for receiving as input a fuel 111 and for producing as output a high-temperature syngas flow 114. The lime kiln is suitable for receiving as input carbonate mineral 131 and the high-temperature syngas flow, the lime kiln being further suitable for producing an oxide 134 and for releasing as output a flow of syngas 133 enriched with CO2. The separator is suitable for receiving as input a gas flow containing CO2 and for treating it so as to separately provide at least CO2 151. The CO2 permanent storage is suitable for enclosing along time the CO2. The invention also relates to a method for generating negative emissions of CO2.
    Type: Application
    Filed: January 19, 2018
    Publication date: December 19, 2019
    Inventors: Dennis Alexander ROSS MORREY, Giovanni CAPPELLO
  • Publication number: 20190372587
    Abstract: A DAC driver includes a number of DAC drivers coupled to a load network. A first DAC driver includes a first set of data switches that can be controlled by a first digital input signal. The first DAC driver further includes a first set of output switches, a first set of dump switches and a first set of current sources. Another DAC driver includes a second set of output switches, dump switches, and current sources. The first set of output switches or the second set of output switches are operable to respectively couple either one of the first set of data switches or the first set of current sources to the load network. The first set of dump switches or the second set of dump switches are operable to respectively dump the first set of current sources or the second set current sources into a respective dump load.
    Type: Application
    Filed: December 19, 2017
    Publication date: December 5, 2019
    Applicant: Jariet Technologies, Inc.
    Inventors: Ark-Chew WONG, Richard Dennis ALEXANDER
  • Patent number: 10481481
    Abstract: A camera-mounting apparatus includes a mechanically stabilizing frame, a plurality of camera fastenings, each being suitable for receiving and fixing at least one camera. The camera fastenings are attached in a distributed manner around the frame and are oriented such that a total field of view of all the cameras is larger than a field of view of an individual camera. Each point of the total field of view lies in the field of view of at least two of the cameras. An interior of the frame includes a cavity for receiving a support, in particular the head of a person wearing the device or a small (approximately head-sized) vehicle or aircraft.
    Type: Grant
    Filed: November 7, 2016
    Date of Patent: November 19, 2019
    Assignee: BERLINER KTA SHAREHOLDER GMBH
    Inventor: Dennis Alexander Niewöhner
  • Patent number: 10267567
    Abstract: A monolithic heat-transfer device can include a container wall configured to retain a working fluid, where the container wall is formed of a single material. The container wall also includes an interior surface configured to be in fluid communication with the working fluid. The monolithic heat-transfer device also includes a channel disposed in the interior surface of the container wall, where the channel comprises a microstructure and a nanostructure. The microstructure and the nanostructure are materially contiguous with the single material forming the container wall. In some embodiments, the nanostructure comprises one or more layers of nanoparticles. The monolithic heat-transfer device can be configured as a heat pipe, which can be constructed from the container wall and a second container wall joined together and sealed to one another to contain the working fluid (e.g., using laser welding, electron beam welding (EBW), and so forth).
    Type: Grant
    Filed: January 13, 2015
    Date of Patent: April 23, 2019
    Assignee: NUtech Ventures
    Inventors: Sidy Ndao, George Gogos, Dennis Alexander, Troy Anderson, Craig Zuhlke