Patents by Inventor Denny D. Tang

Denny D. Tang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7319262
    Abstract: An apparatus including a pillar located over a substrate and having at least one sloped surface oriented at an acute angle relative to the substrate. The apparatus also includes an MRAM stack substantially conforming to the sloped surface, the MRAM stack thereby also oriented at the acute angle relative to the substrate. The MRAM stack may comprise a plurality of substantially planar, parallel layers each oriented at an acute angle relative to the substrate.
    Type: Grant
    Filed: August 13, 2004
    Date of Patent: January 15, 2008
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chi-Wen Liu, Kuo-Ching Chiang, Horng-Huei Tseng, Denny D. Tang
  • Patent number: 7313858
    Abstract: A Damascene process is provided for manufacturing a coil structure for a magnetic head. During the manufacturing process, an insulating layer is initially deposited after which a photoresist layer is deposited. A silicon dielectric layer is then deposited on the photoresist layer. After masking the silicon dielectric layer, at least one channel is etched in the photoresist layer and the silicon dielectric layer. Then, a conductive seed layer is deposited in the at least one channel. The at least one channel is then ready to be filled with a conductive material and chemically/mechanically polished to define a coil structure.
    Type: Grant
    Filed: March 31, 2004
    Date of Patent: January 1, 2008
    Assignee: Hitachi Global Storage Technologies Netherlands B.V.
    Inventors: Richard Hsiao, Prakash Kasiraj, Quang Le, Paul Phong Nguyen, Son Van Nguyen, Denny D. Tang, Patrick Rush Webb
  • Patent number: 7304821
    Abstract: A Damascene process is provided for manufacturing a coil structure for a magnetic head. During the manufacturing process, an insulating layer is initially deposited after which a photoresist layer is deposited. A silicon dielectric layer is then deposited on the photoresist layer. After masking the silicon dielectric layer, at least one channel is etched in the photoresist layer and the silicon dielectric layer. Then, a conductive seed layer is deposited in the at least one channel. The at least one channel is then ready to be filled with a conductive material and chemically/mechanically polished to define a coil structure.
    Type: Grant
    Filed: November 19, 2003
    Date of Patent: December 4, 2007
    Assignee: Hitachi Global Storage Technologies Netherlands B.V.
    Inventors: Richard Hsiao, Prakash Kasiraj, Quang Le, Paul Phong Nguyen, Son Van Nguyen, Denny D. Tang, Patrick Rush Webb
  • Patent number: 7221584
    Abstract: A magnetic memory includes two first magnetic layers each oriented over a substrate, a second magnetic layer interposing the two first magnetic layers, and two dielectric layers each contacting the second magnetic layer and interposing the second magnetic layer and one of the two first magnetic layers. Each of the first and second magnetic layers and the dielectric layers may be oriented substantially perpendicular to the substrate or at an acute angle relative to the substrate.
    Type: Grant
    Filed: February 8, 2005
    Date of Patent: May 22, 2007
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chi-Wen Liu, Kuo-Ching Chiang, Horng-Huei Tseng, Denny D. Tang
  • Patent number: 7205632
    Abstract: A microelectronics device including a semiconductor device located at least partially over a substrate, a bombarded area located at least partially over the substrate and adjacent the semiconductor device, and a bombarded attenuator interposing the semiconductor device and the bombarded area.
    Type: Grant
    Filed: April 5, 2004
    Date of Patent: April 17, 2007
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wen-Chin Lin, Denny D. Tang, Chao-Hsiung Wang
  • Patent number: 7173846
    Abstract: A new magnetic RAM cell device is achieved. The device comprisese, first, a MTJ cell comprising a free layer and a pinned layer separated by a dielectric layer. A reading switch is coupled between the free layer and a reading line. A writing switch is coupled between a first end of the pinned layer and a first writing line. A second end of the pinned layer is coupled to a second writing line. Architectures using MRAM cells are disclosed.
    Type: Grant
    Filed: February 13, 2003
    Date of Patent: February 6, 2007
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wen-Chin Lin, Denny D. Tang, Yu Der Chih
  • Patent number: 7170775
    Abstract: A magnetic random access memory (MRAM) cell that includes an MRAM stack and a conductive line for carrying write current associated with the MRAM cell. The conductive line is oriented in a direction that is angularly offset from an easy axis of the MRAM stack by an acute angle, such as about 45 degrees.
    Type: Grant
    Filed: January 6, 2005
    Date of Patent: January 30, 2007
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wen Chin Lin, Denny D. Tang, Li-Shyue Lai
  • Patent number: 7166881
    Abstract: The present disclosure provides an improved magnetic memory cell. The magnetic memory cell includes a switching element and two magnetic tunnel junction (MTJ) devices. A conductor connects the first and second MTJ devices in a parallel configuration, and serially connecting the parallel configuration to an electrode of the switching element. The resistance of the first MTJ device is different from the resistance of the second.
    Type: Grant
    Filed: August 23, 2004
    Date of Patent: January 23, 2007
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wen Chin Lin, Denny D. Tang, Chien-Chung Hung
  • Patent number: 7151304
    Abstract: In magnetic memories it is important to be able to switch the states of the memory elements using minimal power i.e. external fields of minimal intensity. This has been achieved by giving each memory element an easy axis whose direction parallels its minimum surface dimension. Then, when the magnetic state of the element is switched by rotating its direction of magnetization, said rotation is assisted, rather than being opposed, by the crystalline anisotropy. Consequently, relative to the prior art, a lower external field is required to switch the state of the element.
    Type: Grant
    Filed: January 18, 2005
    Date of Patent: December 19, 2006
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventor: Denny D. Tang
  • Patent number: 7099176
    Abstract: An MRAM cell including an MRAM cell stack located over a substrate and first and second write lines spanning at least one side of the MRAM cell stack and defining a projected region of intersection of the MRAM cell stack and the first and second write lines. The MRAM cell stack includes a pinned layer, a tunneling barrier layer, and a free layer, the tunneling barrier layer interposing the pinned layer and the free layer. The first write line extends in a first direction within the projected region of intersection. The second write line extends in a second direction within the projected region of intersection. The first and second directions are angularly offset by an angle ranging between 45 and 90 degrees, exclusively. At least one write line may be perpendicular to the easy axis of free layer, while the other line may be rotated off the easy axis of the free layer by an angle which is larger than zero, such as to compensate for a shifting astroid curve.
    Type: Grant
    Filed: April 19, 2004
    Date of Patent: August 29, 2006
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wen Chin Lin, Denny D. Tang, Li-Shyue Lai
  • Patent number: 7079355
    Abstract: A method for producing a magnetic transducer with an inductive write head having a multilayer coil with a high aspect ratio and a short yoke is disclosed. A damascene process is used for two coil layers and a conventional process for the third coil layer. The process of the invention allows a seed layer for the coil to be deposited on the side walls of the trenches for the first and second coil layers. In one embodiment the seed layer for the coil is preceded by an adhesion layer.
    Type: Grant
    Filed: March 29, 2004
    Date of Patent: July 18, 2006
    Assignee: Hitachi Global Storage Technologies Netherlands B.V.
    Inventors: Richard D. Hsiao, Quang Le, Edward Hin Pong Lee, Paul Phong Nguyen, Son Van Nguyen, Denny D. Tang, Bradley Douglas Webb, Patrick Rush Webb, Samuel Wei-san Yuan
  • Patent number: 6985383
    Abstract: A multilevel reference generator has a plurality of nonlinear standard resistive elements where each resistive element is biased at a constant level to develop a resultant level. The multilevel reference generator has a plurality of mirror sources. Each mirror source is in communication with the one of the plurality of resistive elements such that each mirror source receives the resultant level from the one standard resistive element and provides a mirrored replication of the resultant level. The multilevel reference generator has a plurality of reference level combining circuits. The reference level combining circuit includes a resultant level summing circuit that additively combines the first and second mirrored replication level and a level scaling circuit to create a scaling of the combined first and second mirrored replication levels to create the reference level.
    Type: Grant
    Filed: October 20, 2003
    Date of Patent: January 10, 2006
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Denny D. Tang, Wen-Chin Lin
  • Patent number: 6909628
    Abstract: A new magnetic RAM cell device is achieved. The device comprises a MTJ cell comprising a free layer and a pinned layer separated by a dielectric layer. A diode is coupled between the free layer and a reading line. A writing switch is coupled between a first end of the pinned layer and a first writing line. A second end of the pinned layer is coupled to a second writing line. Architectures using MRAM cells are disclosed.
    Type: Grant
    Filed: February 13, 2003
    Date of Patent: June 21, 2005
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wen-Chin Lin, Denny D. Tang, Yu Der Chih
  • Patent number: 6901653
    Abstract: A Damascene process is provided for manufacturing a coil structure for a magnetic head. During the manufacturing process, an insulating layer is initially deposited after which a photoresist layer is deposited. A silicon dielectric layer is then deposited on the photoresist layer. After masking the silicon dielectric layer, at least one channel is etched in the photoresist layer and the silicon dielectric layer. Then, a conductive seed layer is deposited in the at least one channel. The at least one channel is then ready to be filled with a conductive material and chemically/mechanically polished to define a coil structure.
    Type: Grant
    Filed: April 2, 2002
    Date of Patent: June 7, 2005
    Assignee: Hitachi Global Storage Technologies Netherlands B.V.
    Inventors: Richard Hsiao, Prakash Kasiraj, Quang Le, Paul Phong Nguyen, Son Van Nguyen, Denny D. Tang, Patrick Rush Webb
  • Patent number: 6890767
    Abstract: In magnetic memories it is important to be able to switch the states of the memory elements using minimal power i.e. external fields of minimal intensity. This has been achieved by giving each memory element an easy axis whose direction parallels its minimum surface dimension. Then, when the magnetic state of the element is switched by rotating its direction of magnetization, said rotation is assisted, rather than being opposed, by the crystalline anisotropy. Consequently, relative to the prior art, a lower external field is required to switch the state of the element.
    Type: Grant
    Filed: October 24, 2002
    Date of Patent: May 10, 2005
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventor: Denny D. Tang
  • Patent number: 6847061
    Abstract: During the conventional manufacture of HBTs, implant damage occurs which leads to enhanced internal base diffusion. This problem has been overcome by making the base and base contact area from a single, uniformly doped layer of silicon-germanium. Instead of an ion implant step to selectively reduce the resistance of this layer away from the base, a layer of polysilicon is selectively deposited (using selective epi deposition) onto only that part. Additionally, the performance of the polysilicon emitter is enhanced by means a brief thermal anneal that drives a small amount of opposite doping type silicon into the SiGe base layer.
    Type: Grant
    Filed: April 3, 2003
    Date of Patent: January 25, 2005
    Assignee: Taiwan Semiconductor Manufacturing Co.
    Inventors: Chun-Lin Tsai, Denny D. Tang, Chih-Min Chiang, Kuan-Lun Chang, Tsyr Shyang, Ruey-Hsin Liu
  • Patent number: 6804879
    Abstract: A method for producing a magnetic transducer with a inductive write head having a multilayer coil with a high aspect ratio and a short yoke is provided. A damascene process is used for two coil layers and a conventional process for the third coil layer. The process of the invention allows a seed layer for the coil to be deposited on the side walls of the trenches for the first and second coil layers. In one embodiment the seed layer for the coil is preceded by an adhesion layer.
    Type: Grant
    Filed: October 23, 2002
    Date of Patent: October 19, 2004
    Assignee: Hitachi Global Storage Technologies Netherlands, B.V.
    Inventors: Richard D. Hsiao, Quang Le, Edward Hin Pong Lee, Paul Phong Nguyen, Son Van Nguyen, Denny D. Tang, Bradley Douglas Webb, Patrick Rush Webb, Samuel Wei-san Yuan
  • Publication number: 20040195587
    Abstract: During the conventional manufacture of HBTs, implant damage occurs which leads to enhanced internal base diffusion. This problem has been overcome by making the base and base contact area from a single, uniformly doped layer of silicon-germanium. Instead of an ion implant step to selectively reduce the resistance of this layer away from the base, a layer of polysilicon is selectively deposited (using selective epi deposition) onto only that part. Additionally, the performance of the polysilicon emitter is enhanced by means a brief thermal anneal that drives a small amount of opposite doping type silicon into the SiGe base layer.
    Type: Application
    Filed: April 3, 2003
    Publication date: October 7, 2004
    Inventors: Chun-Lin Tsai, Denny D. Tang, Chih-Min Chiang, Kuan-Lun Chang, Tsyr Shyang, Ruey-Hsin Liu
  • Publication number: 20040190196
    Abstract: Applicants disclose a method for producing a magnetic transducer with a inductive write head having a multilayer coil with a high aspect ratio and a short yoke. A damascene process is used for two coil layers and a conventional process for the third coil layer. The process of the invention allows a seed layer for the coil to be deposited on the side walls of the trenches for the first and second coil layers. In one embodiment the seed layer for the coil is preceded by an adhesion layer.
    Type: Application
    Filed: March 29, 2004
    Publication date: September 30, 2004
    Inventors: Richard D. Hsiao, Quang Le, Edward Hin Pong Lee, Paul Phong Nguyen, Son Van Nguyen, Denny D. Tang, Bradley Douglas Webb, Patrick Rush Webb, Samuel Wei-san Yuan
  • Publication number: 20040177493
    Abstract: A Damascene process is provided for manufacturing a coil structure for a magnetic head. During the manufacturing process, an insulating layer is initially deposited after which a photoresist layer is deposited. A silicon dielectric layer is then deposited on the photoresist layer. After masking the silicon dielectric layer, at least one channel is etched in the photoresist layer and the silicon dielectric layer. Then, a conductive seed layer is deposited in the at least one channel. The at least one channel is then ready to be filled with a conductive material and chemically/mechanically polished to define a coil structure.
    Type: Application
    Filed: March 31, 2004
    Publication date: September 16, 2004
    Inventors: Richard Hsiao, Prakash Kasiraj, Quang Le, Paul Phong Nguyen, Son Van Nguyen, Denny D. Tang, Patrick Rush Webb