Patents by Inventor Deok-Yong Kim
Deok-Yong Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240083384Abstract: A vehicle seat reinforcement device includes a leg portion mounted on a floor panel, a seat cushion frame slidably mounted on the leg portion, and a load reinforcing structure connected between the leg portion and the seat cushion frame, wherein when a seat belt anchorage load is transferred to the seat cushion frame, the seat cushion frame is locked to the leg portion by the load reinforcing structure.Type: ApplicationFiled: February 3, 2023Publication date: March 14, 2024Applicants: Hyundai Motor Company, Kia Corporation, Daechang Seat Co.,LTD-Dongtan, Hyundai Transys Inc.Inventors: Sang Soo LEE, Chan Ho JUNG, Mu Young KIM, Sang Hark LEE, Ho Suk JUNG, Deok Soo LIM, Sang Do PARK, In Sun BAEK, Sin Chan YANG, Chan Ki CHO, Myung Soo LEE, Jae Yong JANG, Jun Sik HWANG, Ho Sung KANG, Hae Dong KWAK, Hyun Tak KO
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Patent number: 11158499Abstract: A semiconductor component includes a semiconductor substrate, a first oxide layer, an oxide, a first polysilicon layer, a first metal layer, a first mask on the first metal layer, and a bitline. The semiconductor substrate includes an array region, a periphery region and a boundary open region. The boundary open region isolates the array region from the periphery region. The first oxide layer is deposited on the array region. The first polysilicon layer is deposited on the periphery region. The first metal layer is deposited on the first polysilicon layer. A trench is formed on the array region and passes through the first oxide layer. The bitline includes a second polysilicon layer filling in the trench and a second metal layer on the second polysilicon layer. A second mask is formed on the second metal layer. The second polysilicon layer is flush with the first oxide layer.Type: GrantFiled: March 9, 2020Date of Patent: October 26, 2021Assignee: XIA TAI XIN SEMICONDUCTOR (QING DAO) LTD.Inventors: Deok-Yong Kim, Yongchul Oh
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Patent number: 11133227Abstract: The instant disclosure discloses a method comprises receiving a substrate having a first region and a second region defined thereon and an insulating structure formed there-between; forming, extending across the first region and the second region, a gate stack including a dielectric layer and a gate poly layer formed thereon; forming a first well mask covering the second region while defining a first opening that projectively overlaps the first region to partially exposes the gate poly layer; performing a first doping process, through the first opening and the gate stack, to form a first well in the substrate beneath the first opening; and performing a second doping process through the first opening to form a first gate conductor in the gate poly layer.Type: GrantFiled: November 11, 2019Date of Patent: September 28, 2021Assignee: XIA TAI XIN SEMICONDUCTOR (QING DAO) LTD.Inventors: Deok-Yong Kim, Yongchul Oh
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Publication number: 20210280412Abstract: A semiconductor component includes a semiconductor substrate, a first oxide layer, an oxide, a first polysilicon layer, a first metal layer, a first mask on the first metal layer, and a bitline. The semiconductor substrate includes an array region, a periphery region and a boundary open region. The boundary open region isolates the array region from the periphery region. The first oxide layer is deposited on the array region. The first polysilicon layer is deposited on the periphery region. The first metal layer is deposited on the first polysilicon layer. A trench is formed on the array region and passes through the first oxide layer. The bitline includes a second polysilicon layer filling in the trench and a second metal layer on the second polysilicon layer. A second mask is formed on the second metal layer. The second polysilicon layer is flush with the first oxide layer.Type: ApplicationFiled: March 9, 2020Publication date: September 9, 2021Inventors: DEOK-YONG KIM, YONGCHUL OH
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Publication number: 20200219776Abstract: The instant disclosure discloses a method comprises receiving a substrate having a first region and a second region defined thereon and an insulating structure formed there-between; forming, extending across the first region and the second region, a gate stack including a dielectric layer and a gate ploy layer formed thereon; forming a first well mask covering the second region while defining a first opening that projectively overlaps the first region to partially exposes the gate ploy layer; performing a first doping process, through the first opening and the gate stack, to form a first well in the substrate beneath the first opening; and performing a second doping process through the first opening to form a first gate conductor in the gate ploy layer.Type: ApplicationFiled: November 11, 2019Publication date: July 9, 2020Inventors: DEOK-YONG KIM, YONGCHUL OH
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Patent number: 9551653Abstract: The inventive concept provides apparatuses and methods for monitoring semiconductor fabrication processes in real time using polarized light. In some embodiments, the apparatus comprises a light source configured to generate light, a beam splitter configured to reflect the light toward the wafer being processed, an objective polarizer configured to polarize the light reflected toward the wafer and to allow light reflected by the wafer to pass therethrough, a blaze grating configured to separate light reflected by the wafer according to wavelength, an array detector configured to detect the separated light and an analyzer to analyze the three-dimensional profile of the structure/pattern being formed in the wafer.Type: GrantFiled: March 23, 2016Date of Patent: January 24, 2017Assignee: Samsung Electronics Co., Ltd.Inventors: Woong-Kyu Son, Kwang-Hoon Kim, Deok-Yong Kim, Sung-Soo Moon, Jung-Hoon Byun, Ji-Hye Lee, Choon-Shik Leem, Soo-Bok Chin
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Publication number: 20160204043Abstract: The inventive concept provides apparatuses and methods for monitoring semiconductor fabrication processes in real time using polarized light. In some embodiments, the apparatus comprises a light source configured to generate light, a beam splitter configured to reflect the light toward the wafer being processed, an objective polarizer configured to polarize the light reflected toward the wafer and to allow light reflected by the wafer to pass therethrough, a blaze grating configured to separate light reflected by the wafer according to wavelength, an array detector configured to detect the separated light and an analyzer to analyze the three-dimensional profile of the structure/pattern being formed in the wafer.Type: ApplicationFiled: March 23, 2016Publication date: July 14, 2016Inventors: Woong-Kyu Son, Kwang-Hoon KIM, Deok-Yong KIM, Sung-Soo MOON, Jung-Hoon BYUN, Ji-Hye LEE, Choon-Shik LEEM, Soo-Bok CHIN
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Patent number: 9322771Abstract: The inventive concept provides apparatuses and methods for monitoring semiconductor fabrication processes in real time using polarized light. In some embodiments, the apparatus comprises a light source configured to generate light, a beam splitter configured to reflect the light toward the wafer being processed, an objective polarizer configured to polarize the light reflected toward the wafer and to allow light reflected by the wafer to pass therethrough, a blaze grating configured to separate light reflected by the wafer according to wavelength, an array detector configured to detect the separated light and an analyzer to analyze the three-dimensional profile of the structure/pattern being formed in the wafer.Type: GrantFiled: March 5, 2014Date of Patent: April 26, 2016Assignee: Samsung Electronics Co., Ltd.Inventors: Woong-Kyu Son, Kwang-Hoon Kim, Deok-Yong Kim, Sung-Soo Moon, Jung-Hoon Byun, Ji-Hye Lee, Choon-Shik Leem, Soo-Bok Chin
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Patent number: 9165354Abstract: Methods of analyzing photolithography processes are provided. The methods may include obtaining an image from a pattern formed on a wafer and obtaining dimensions of the image. The methods may further include converting the dimensions into a profile graph and then dividing the profile graph into a low-frequency band profile graph and a high-frequency band profile graph.Type: GrantFiled: June 3, 2013Date of Patent: October 20, 2015Assignee: Samsung Electronics Co., Ltd.Inventors: Woong-Kyu Son, Hyo-Cheon Kang, Deok-Yong Kim, Jae-Kwan Park, Jeong-Ho Ahn, Soo-Bok Chin
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Publication number: 20150219446Abstract: Methods and apparatuses for measuring parameters of integrated circuit devices may be provided. The methods may include performing detecting operations on samples to obtain a set of data. Each detecting operation may include irradiating a light beam to the samples using a light irradiation part and detecting reflected light from the samples using a light detector. The samples may have values of a parameter different from one another. The method may also include obtaining a principal component based on the set of data and obtaining a regression model for the parameter using the principal component and values of the parameter of the samples.Type: ApplicationFiled: February 5, 2015Publication date: August 6, 2015Inventors: Choon-Shik LEEM, Woo-Jin Jung, Ji-Hye Lee, Deok-Yong Kim, Chul-Gi Song, Soo-Bok Chin
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Publication number: 20140342477Abstract: A method of monitoring a semiconductor fabrication process including forming a barrier pattern on a substrate, forming a sacrificial pattern on the barrier pattern, removing the sacrificial pattern to expose a surface of the barrier pattern, generating photoelectrons by irradiating X-rays to a surface of the substrate, and inferring at least one material existing on the surface of the substrate by collecting and analyzing the photoelectrons may be provided.Type: ApplicationFiled: March 4, 2014Publication date: November 20, 2014Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Choon-Shik LEEM, Deok-Yong KIM, Sang-Ho SONG, Chul-Gi SONG, Ho-Yeol LEE, Soo-Bok CHIN
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Publication number: 20140264052Abstract: The inventive concept provides apparatuses and methods for monitoring semiconductor fabrication processes in real time using polarized light. In some embodiments, the apparatus comprises a light source configured to generate light, a beam splitter configured to reflect the light toward the wafer being processed, an objective polarizer configured to polarize the light reflected toward the wafer and to allow light reflected by the wafer to pass therethrough, a blaze grating configured to separate light reflected by the wafer according to wavelength, an array detector configured to detect the separated light and an analyzer to analyze the three-dimensional profile of the structure/pattern being formed in the wafer.Type: ApplicationFiled: March 5, 2014Publication date: September 18, 2014Applicant: Samsung Electronics Co., Ltd.Inventors: Woong-Kyu SON, Kwang-Hoon KIM, Deok-Yong KIM, Sung-Soo MOON, Jung-Hoon BYUN, Ji-Hye LEE, Choon-Shik LEEM, Soo-Bok CHIN
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Publication number: 20140037186Abstract: Methods of analyzing photolithography processes are provided. The methods may include obtaining an image from a pattern formed on a wafer and obtaining dimensions of the image. The methods may further include converting the dimensions into a profile graph and then dividing the profile graph into a low-frequency band profile graph and a high-frequency band profile graph.Type: ApplicationFiled: June 3, 2013Publication date: February 6, 2014Inventors: Woong-Kyu Son, Hyo-Cheon Kang, Deok-Yong Kim, Jae-Kwan Park, Jeong-Ho Ahn, Soo-Bok Chin
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Patent number: 7466853Abstract: A light is irradiated on a wafer including a plurality of pixels. Image information corresponding to each pixel is measured by sensing the light reflected by the wafer surface. A raw datum is calculated by subtracting the image information of a corresponding pixel from the image information of a target pixel. The target pixel is a subject pixel for detecting a defect. The corresponding pixel is a pixel located in a first device unit and corresponds to the target pixel. The first device unit is located adjacent to a second device unit that includes the target pixel. The threshold region is preset to have at least one pair of upper and lower limits. The target pixel is marked as a defective pixel when the raw datum thereof is included in the threshold region. Accordingly, the killer defect can be detected separate from the non-killer defects that are usually detected together with the killer defects.Type: GrantFiled: December 30, 2003Date of Patent: December 16, 2008Assignee: Samsung Electronics Co., Inc.Inventors: Deok-Yong Kim, Byoung-Ho Lee
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Publication number: 20080213069Abstract: An apparatus for fabricating semiconductor devices is provided. The apparatus includes a process equipment in which a process is performed and a transfer system attached to the process equipment to supply a substrate to the process equipment. The transfer system includes a transfer robot for moving the substrate and a light supplier for supplying ultraviolet rays to the substrate. Methods of fabricating the semiconductor devices using the apparatus are also provided.Type: ApplicationFiled: February 11, 2008Publication date: September 4, 2008Inventors: Chul-Gi Song, Deok-yong Kim, Yong-Chul Lee
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Patent number: 7245365Abstract: An apparatus for detecting particles located on an object includes an emitter for irradiating lights to the particles. The object is disposed on a stage in a direction substantially parallel to a surface of the object. The apparatus further includes a driver for generating a relative motion between the emitter and the object for scanning the surface of the object with the lights and a detector for detecting the lights emitted from the emitter or lights scattered from the particle. With embodiments of the present invention, the particles can be quickly detected.Type: GrantFiled: April 8, 2004Date of Patent: July 17, 2007Assignee: Samsung Electronics Co., Ltd.Inventors: Deok-Yong Kim, Duck-Sun Yang
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Patent number: 7200258Abstract: A method for selecting reference images, a method and an apparatus for inspecting patterns on a wafer, and a method for dividing a wafer into application regions. In a method for inspecting patterns according to at least one exemplary embodiment of the present invention, a plurality of reference dies may be selected and a difference in gray levels of images of the references dies may be determined. The reference dies may include a first die substantially centrally located on the wafer and at least one second die located at an edge portion of the wafer. One reference image is selected if the difference in gray levels is within a permitted tolerance and more than one reference image may be selected if the difference in gray levels is not within the permitted tolerance. A pattern inspection may be performed using the reference images.Type: GrantFiled: May 22, 2003Date of Patent: April 3, 2007Assignee: Samsung Electronics Co., Ltd.Inventors: Byoung-Ho Lee, Deok-Yong Kim
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Patent number: 7084969Abstract: According to a method of optimizing a focus of an optical inspection apparatus, a first light is irradiated onto a substrate. Then, the first light is reflected on the substrate to form a second light. The second light is sensed with various foci to form image information corresponding to each of the foci. Then, a relation between foci of the optical inspection apparatus and gain value corresponding to the image information is obtained. Then, the focus corresponding to a minimum gain value is set up as an optimized focus. Thus, a focus of an optical inspection apparatus is accurately adjusted to enhance efficiency of defecting defects, so that defects of semiconductor apparatus are more accurately detected.Type: GrantFiled: March 12, 2004Date of Patent: August 1, 2006Assignee: Samsung Electronics Co., Ltd.Inventors: Deok-Yong Kim, Seong-Jin Kim
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Patent number: 6995074Abstract: A method for forming a semiconductor wafer such as a standard semiconductor wafer used in a surface analysis system. Openings may be formed by partially etching a semiconductor substrate, and an insulation film may be formed on the openings. Contact holes may be formed to expose portions of the semiconductor substrate and the insulation film in the openings. The contact holes may be inspected by the surface analysis system, and the reliability of data obtained from the surface analysis system may be more precisely discriminated.Type: GrantFiled: March 21, 2003Date of Patent: February 7, 2006Assignee: Samsung Electronics Co., Ltd.Inventor: Deok-Yong Kim
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Publication number: 20040201841Abstract: An apparatus for detecting particles located on an object includes an emitter for irradiating lights to the particles. The object is disposed on a stage in a direction substantially parallel to a surface of the object. The apparatus further includes a driver for generating a relative motion between the emitter and the object for scanning the surface of the object with the lights and a detector for detecting the lights emitted from the emitter or lights scattered from the particle. With embodiments of the present invention, the particles can be quickly detected.Type: ApplicationFiled: April 8, 2004Publication date: October 14, 2004Inventors: Deok-Yong Kim, Duck-Sun Yang