Patents by Inventor Deok-Yong Kim

Deok-Yong Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20040178351
    Abstract: According to a method of optimizing a focus of an optical inspection apparatus, a first light is irradiated onto a substrate. Then, the first light is reflected on the substrate to form a second light. The second light is sensed with various foci to form image information corresponding to each of the foci. Then, a relation between foci of the optical inspection apparatus and gain value corresponding to the image information is obtained. Then, the focus corresponding to a minimum gain value is set up as an optimized focus. Thus, a focus of an optical inspection apparatus is accurately adjusted to enhance efficiency of defecting defects, so that defects of semiconductor apparatus are more accurately detected.
    Type: Application
    Filed: March 12, 2004
    Publication date: September 16, 2004
    Inventors: Deok-Yong Kim, Seong-Jin Kim
  • Publication number: 20040150813
    Abstract: A light is irradiated on a wafer including a plurality of pixels. Image information corresponding to each pixel is measured by sensing the light reflected by the wafer surface. A raw datum is calculated by subtracting the image information of a corresponding pixel from the image information of a target pixel. The target pixel is a subject pixel for detecting a defect. The corresponding pixel is a pixel located in a first device unit and corresponds to the target pixel. The first device unit is located adjacent to a second device unit that includes the target pixel. The threshold region is preset to have at least one pair of upper and lower limits. The target pixel is marked as a defective pixel when the raw datum thereof is included in the threshold region. Accordingly, the killer defect can be detected separate from the non-killer defects that are usually detected together with the killer defects.
    Type: Application
    Filed: December 30, 2003
    Publication date: August 5, 2004
    Inventors: Deok-Yong Kim, Byoung-Ho Lee
  • Publication number: 20040141640
    Abstract: A light is irradiated on a wafer on which a plurality of cells are formed. Each cell includes a plurality of pixels. A gray level on each pixel is formed for every cell by sensing the light reflected from the wafer surface. The gray level of the killer defect can be formed by observing the wafer. The gray level of the killer defect is then respectively compared with the gray level on each pixel. The pixel having the gray level corresponding to that of the killer defect is checked to be defective. Therefore, the killer defect can be distinguished from the non-killer defects. As a result, the killer defect can be detected promptly and accurately, increasing the throughput.
    Type: Application
    Filed: January 5, 2004
    Publication date: July 22, 2004
    Inventors: Byoung-Ho Lee, Deok-Yong Kim
  • Publication number: 20040057611
    Abstract: A method for selecting reference images, a method and an apparatus for inspecting patterns on a wafer, and a method for dividing a wafer into application regions. In a method for inspecting patterns according to at least one exemplary embodiment of the present invention, a plurality of reference dies may be selected and a difference in gray levels of images of the references dies may be determined. The reference dies may include a first die substantially centrally located on the wafer and at least one second die located at an edge portion of the wafer. One reference image is selected if the difference in gray levels is within a permitted tolerance and more than one reference image may be selected if the difference in gray levels is not within the permitted tolerance. A pattern inspection may be performed using the reference images.
    Type: Application
    Filed: May 22, 2003
    Publication date: March 25, 2004
    Inventors: Byoung-Ho Lee, Deok-Yong Kim
  • Publication number: 20040026788
    Abstract: A method for forming a semiconductor wafer such as a standard semiconductor wafer used in a surface analysis system. Openings may be formed by partially etching a semiconductor substrate, and an insulation film may be formed on the openings. Contact holes may be formed to expose portions of the semiconductor substrate and the insulation film in the openings. The contact holes may be inspected by the surface analysis system, and the reliability of data obtained from the surface analysis system may be more precisely discriminated.
    Type: Application
    Filed: March 21, 2003
    Publication date: February 12, 2004
    Inventor: Deok-Yong Kim
  • Publication number: 20030120366
    Abstract: A semiconductor cleaning system includes deionized water cleaning units for removing particles and chemicals from the wafer surface, and chemical cleaning units for removing organic materials and oxides from the wafer surface. The system is interlocked when chemicals used to clean the surface of a wafer are erroneously supplied to one or more chemical cleaning units of the system. To this end, the semiconductor cleaning system also includes a respective detection unit for detecting the state under which chemicals are being supplied to a chemical cleaning unit, a control unit for determining whether the cleaning system should be interlocked based on data from the detection units, and an alarm unit for providing an alarm in response to a control signal issued from the control unit.
    Type: Application
    Filed: December 4, 2002
    Publication date: June 26, 2003
    Inventors: Choul-Gue Park, Deok-Yong Kim
  • Patent number: 6545491
    Abstract: The present invention provides apparatus and methods for detecting defects in a semiconductor device. The semiconductor device includes a plurality of conductive pads, which may be formed, for example, between insulating layers for insulating the conductive pads from conductive lines formed between ones of the conductive pads. Electrons and/or holes are accumulated in ones of the conductive pads, for example, on the surface of the conductive pads. A contrast associated with one of the conductive pads is detected based on secondary electron emissions from the ones of the conductive pads after accumulation of the electrons and/or holes. The presence of defects is determined based on the detected contrast.
    Type: Grant
    Filed: August 28, 2001
    Date of Patent: April 8, 2003
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yang-hyong Kim, Hyo-cheon Kang, Deok-yong Kim
  • Patent number: 6525318
    Abstract: Methods of inspecting integrated circuit substrates include the steps of directing a beam of electrons into a first conductive plug located within a first contact hole on an integrated circuit substrate and then measuring a quantity of electrons emitted from the first conductive plug to determine an absence or presence of an electrically insulating residue in the first contact hole. The quantity of electrons emitted from the first conductive plug by secondary electron emission can be measured in order to determine whether electrons are being accumulated within the conductive plug because an insulating residue is blocking passage of the electrons into an underlying conductive portion of the substrate. If an electrically insulating residue is present, then sufficient repulsive forces between the accumulated electrons will result in the secondary emission of excess electrons from an upper surface of the conductive plug as the conductive plug is being irradiated with the electron beam.
    Type: Grant
    Filed: August 27, 1999
    Date of Patent: February 25, 2003
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yang hyong Kim, Hyo-cheon Kang, Deok-yong Kim, Sang-myun Lee
  • Publication number: 20020043628
    Abstract: The present invention provides apparatus and methods for detecting defects in a semiconductor device. The semiconductor device includes a plurality of conductive pads, which may be formed, for example, between insulating layers for insulating the conductive pads from conductive lines formed between ones of the conductive pads. Electrons and/or holes are accumulated in ones of the conductive pads, for example, on the surface of the conductive pads. A contrast associated with one of the conductive pads is detected based on secondary electron emissions from the ones of the conductive pads after accumulation of the electrons and/or holes. The presence of defects is determined based on the detected contrast.
    Type: Application
    Filed: August 28, 2001
    Publication date: April 18, 2002
    Inventors: Yang-Hyong Kim, Hyo-Cheon Kang, Deok-Yong Kim
  • Patent number: 6100102
    Abstract: A method of in-line monitoring for shallow pits formed on a semiconductor substrate using an electron beam. The electron beam is scanned across exposed pads on the semiconductor substrate and relative concentrations of secondary electrodes are examined to identify shallow pits.
    Type: Grant
    Filed: March 10, 1999
    Date of Patent: August 8, 2000
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yang-hyong Kim, Chun-ha Hwang, Hyo-cheon Kang, Deok-yong Kim