Patents by Inventor DerChang Kau

DerChang Kau has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20040056304
    Abstract: A transistor comprising a gate, a channel beneath the gate and separated from the gate by an insulator, a source adjacent to the channel on a first side of the gate, a drain adjacent to the channel on a second side of the gate, doped extension regions into the channel from the source and the drain that underlap the gate, and insulating spacers adjacent to sidewalls of the gate that overlap the extension regions. The insulating spacers may be used to align the doped extension regions, offset the extension regions from the gate, and reduce Miller capacitance and standby leakage current.
    Type: Application
    Filed: July 15, 2003
    Publication date: March 25, 2004
    Inventors: Shafqat Ahmed, Henry Chao, DerChang Kau
  • Publication number: 20040056301
    Abstract: A transistor comprising a gate, a channel beneath the gate and separated from the gate by an insulator, a source adjacent to the channel on a first side of the gate, a drain adjacent to the channel on a second side of the gate, doped extension regions into the channel from the source and the drain that underlap the gate, and insulating spacers adjacent to sidewalls of the gate that overlap the extension regions. The insulating spacers may be used to align the doped extension regions, offset the extension regions from the gate, and reduce Miller capacitance and standby leakage current.
    Type: Application
    Filed: September 19, 2002
    Publication date: March 25, 2004
    Inventors: Shafqat Ahmed, Henry Chao, DerChang Kau