Patents by Inventor Derek R. Witty
Derek R. Witty has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8563090Abstract: Methods of depositing boron-containing liner layers on substrates involve the formation of a bilayer including an initiation layer which includes barrier material to inhibit the diffusion of boron from the bilayer into the underlying substrate.Type: GrantFiled: June 22, 2009Date of Patent: October 22, 2013Assignee: Applied Materials, Inc.Inventors: Mihaela Balseanu, Li-Qun Xia, Derek R Witty, Yi Chen
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Patent number: 8501568Abstract: A methods of forming a flash memory device are provided. The flash memory device comprises a silicon dioxide layer on a substrate and a silicon nitride layer that is formed on the silicon dioxide layer. The properties of the silicon nitride layer can be modified by any of: exposing the silicon nitride layer to ultraviolet radiation, exposing the silicon nitride layer to an electron beam, and by plasma treating the silicon nitride layer. A dielectric material is deposited on the silicon nitride layer and a conductive date is formed over the dielectric material. The flash memory device with modified silicon nitride layer provides an increase in charge holding capacity and charge retention time of the unit cell of a non-volatile memory device.Type: GrantFiled: October 22, 2008Date of Patent: August 6, 2013Assignee: Applied Materials, Inc.Inventors: Mihaela Balseanu, Vladimir Zubkov, Li-Qun Xia, Atif Noori, Reza Arghavani, Derek R. Witty, Amir Al-Bayati
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Publication number: 20130189845Abstract: A method of forming a nitrogen-doped amorphous carbon layer on a substrate in a processing chamber is provided. The method generally includes depositing a predetermined thickness of a sacrificial dielectric layer over a substrate, forming patterned features on the substrate by removing portions of the sacrificial dielectric layer to expose an upper surface of the substrate, depositing conformally a predetermined thickness of a nitrogen-doped amorphous carbon layer on the patterned features and the exposed upper surface of the substrate, selectively removing the nitrogen-doped amorphous carbon layer from an upper surface of the patterned features and the upper surface of the substrate using an anisotropic etching process to provide the patterned features filled within sidewall spacers formed from the nitrogen-doped amorphous carbon layer, and removing the patterned features from the substrate.Type: ApplicationFiled: January 19, 2012Publication date: July 25, 2013Applicant: APPLIED MATERIALS, INC.Inventors: Sungjin Kim, Deenesh Padhi, Song Hyun Hong, Bok Hoen Kim, Derek R. Witty
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Publication number: 20130189841Abstract: A method for forming an integrated circuit is provided. In one embodiment, the method includes forming a stop layer comprising carbon doped silicon nitride on a gate region on a substrate, the gate region having a poly gate and one or more spacers formed adjacent the poly gate, forming a dielectric layer on the stop layer, and removing a portion of the dielectric layer above the gate region using a CMP process, wherein the stop layer is a strain inducing layer having a CMP removal rate that is less than the CMP removal rate of the dielectric layer and equal to or less than the CMP removal rate of the one or more spacers.Type: ApplicationFiled: January 20, 2012Publication date: July 25, 2013Applicant: APPLIED MATERIALS, INC.Inventors: Mihaela Balseanu, Li-Qun Xia, Derek R. Witty, Thomas H. Osterheld, Christopher Heung-Gyun Lee, William H. McClintock
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Publication number: 20130183835Abstract: Methods and apparatus for forming conformal silicon nitride films at low temperatures on a substrate are provided. The methods of forming a silicon nitride layer include performing a deposition cycle including flowing a processing gas mixture into a processing chamber having a substrate therein, wherein the processing gas mixture comprises precursor gas molecules having labile silicon to nitrogen, silicon to carbon, or nitrogen to carbon bonds, activating the precursor gas at a temperature between about 20° C. to about 480° C. by preferentially breaking labile bonds to provide one or more reaction sites along a precursor gas molecule, forming a precursor material layer on the substrate, wherein the activated precursor gas molecules bond with a surface on the substrate at the one or more reaction sites, and performing a plasma treatment process on the precursor material layer to form a conformal silicon nitride layer.Type: ApplicationFiled: January 18, 2012Publication date: July 18, 2013Applicant: APPLIED MATERIALS, INC.Inventors: Victor Nguyen, Mihaela Balseanu, Li-Qun Xia, Derek R. Witty
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Patent number: 8389376Abstract: Methods are provided for forming a structure that includes an air gap. In one embodiment, a method is provided for forming a damascene structure including depositing a porous low dielectric constant layer by a method including reacting an organosilicon compound and a porogen-providing precursor, depositing a porogen-containing material, and removing at least a portion of the porogen-containing material, depositing an organic layer on the porous low dielectric constant layer by reacting the porogen-providing precursor, forming a feature definition in the organic layer and the porous low dielectric constant layer, filing the feature definition with a conductive material therein, depositing a mask layer on the organic layer and the conductive material disposed in the feature definition, forming apertures in the mask layer to expose the organic layer, removing a portion or all of the organic layer through the apertures, and forming an air gap adjacent the conductive material.Type: GrantFiled: March 1, 2010Date of Patent: March 5, 2013Assignee: Applied Materials, Inc.Inventors: Alexandros T. Demos, Li-Qun Xia, Bok Hoen Kim, Derek R. Witty, Hichem M'Saad
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Patent number: 8343881Abstract: A silicon dioxide layer is deposited onto a substrate using a process gas comprising BDEAS and an oxygen-containing gas such as ozone. The silicon dioxide layer can be part of an etch-resistant stack that includes a resist layer. In another version, the silicon dioxide layer is deposited into through holes to form an oxide liner for through-silicon vias.Type: GrantFiled: June 4, 2010Date of Patent: January 1, 2013Assignee: Applied Materials, Inc.Inventors: Yong-Won Lee, Vladimir Zubkov, Mei-Yee Shek, Li-Qun Xia, Prahallad Iyengar, Sanjeev Baluja, Scott A Hendrickson, Juan Carlos Rocha-Alvarez, Thomas Nowak, Derek R Witty
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Patent number: 8337950Abstract: Methods for processing a substrate with a boron rich film are provided. A patterned layer of boron rich material is deposited on a substrate and can be used as an etch stop. By varying the chemical composition, the selectivity and etch rate of the boron rich material can be optimized for different etch chemistries. The boron rich materials can be deposited over a layer stack substrate in multiple layers and etched in a pattern. The exposed layer stack can then be etched with multiple etch chemistries. Each of the boron rich layers can have a different chemical composition that is optimized for the multiple etch chemistries.Type: GrantFiled: May 24, 2010Date of Patent: December 25, 2012Assignee: Applied Materials, Inc.Inventors: Victor Nguyen, Yi Chen, Mihaela Balseanu, Isabelita Roflox, Li-Qun Xia, Derek R Witty
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Publication number: 20120289049Abstract: A method for the removal of copper oxide from a copper and dielectric containing structure of a semiconductor chip is provided. The copper and dielectric containing structure may be planarized by chemical mechanical planarization (CMP) and treated by the method to remove copper oxide and CMP residues. Annealing in a hydrogen (H2) gas and ultraviolet (UV) environment removes copper oxide, and a pulsed ammonia plasma removes CMP residues.Type: ApplicationFiled: May 10, 2011Publication date: November 15, 2012Applicant: APPLIED MATERIALS, INC.Inventors: WEIFENG YE, Victor Nguyen, Mei-Yee Shek, Mihaela Balseanu, Li-Qun Xia, Derek R. Witty
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Publication number: 20120276301Abstract: Embodiments described herein provide a method of processing a substrate. The method includes depositing an interface adhesion layer between a conductive material and a dielectric material such that the interface adhesion layer provides increased adhesion between the conductive material and the dielectric material. In one embodiment a method for processing a substrate is provided. The method comprises depositing an interface adhesion layer on a substrate comprising a conductive material, exposing the interface adhesion layer to a nitrogen containing plasma, and depositing a dielectric layer on the interface adhesion layer after exposing the interface adhesion layer to the nitrogen containing plasma.Type: ApplicationFiled: July 10, 2012Publication date: November 1, 2012Inventors: Yong-Won Lee, Sang M. Lee, Meiyee (Maggie Le) Shek, Weifeng Ye, Li-Qun Xia, Derek R. Witty, Thomas Nowak, Juan Carlos Rocha-Alvarez, Jigang Li
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Patent number: 8282734Abstract: An article having a protective coating for use in semiconductor applications and methods for making the same are provided. In certain embodiments, a method of coating an aluminum surface of an article utilized in a semiconductor processing chamber is provided. The method comprises providing a processing chamber; placing the article into the processing chamber; flowing a first gas comprising a carbon source into the processing chamber; flowing a second gas comprising a nitrogen source into the processing chamber; forming a plasma in the chamber; and depositing a coating material on the aluminum surface. In certain embodiments, the coating material comprises an amorphous carbon nitrogen containing layer. In certain embodiments, the article comprises a showerhead configured to deliver a gas to the processing chamber.Type: GrantFiled: October 21, 2008Date of Patent: October 9, 2012Assignee: Applied Materials, Inc.Inventors: Deenesh Padhi, Chiu Chan, Sudha Rathi, Ganesh Balasubramanian, Jianhua Zhou, Karthik Janakiraman, Martin J. Seamons, Visweswaren Sivaramakrishnan, Derek R. Witty, Hichem M'Saad
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Patent number: 8252653Abstract: A flash memory device and methods of forming a flash memory device are provided. The flash memory device includes a doped silicon nitride layer having a dopant comprising carbon, boron or oxygen. The doped silicon nitride layer generates a higher number and higher concentration of nitrogen and silicon dangling bonds in the layer and provides an increase in charge holding capacity and charge retention time of the unit cell of a non-volatile memory device.Type: GrantFiled: October 21, 2008Date of Patent: August 28, 2012Assignee: Applied Materials, Inc.Inventors: Mihaela Balseanu, Vladimir Zubkov, Li-Qun Xia, Atif Noori, Reza Arghavani, Derek R. Witty, Amir Al-Bayati
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Publication number: 20120204795Abstract: An article having a protective coating for use in semiconductor applications and methods for making the same are provided. In certain embodiments, a method of coating an aluminum surface of an article utilized in a semiconductor processing chamber is provided. The method comprises providing a processing chamber; placing the article into the processing chamber; flowing a first gas comprising a carbon source into the processing chamber; flowing a second gas comprising a nitrogen source into the processing chamber; forming a plasma in the chamber; and depositing a coating material on the aluminum surface. In certain embodiments, the coating material comprises an amorphous carbon nitrogen containing layer. In certain embodiments, the article comprises a showerhead configured to deliver a gas to the processing chamber.Type: ApplicationFiled: April 26, 2012Publication date: August 16, 2012Applicant: APPLIED MATERIALS, INC.Inventors: Deenesh Padhi, Chiu Chan, Sudha Rathi, Ganesh Balasubramanian, Jianhua Zhou, Karthik Janakiraman, Martin J. Seamons, Visweswaren Sivaramakrishnan, Derek R. Witty, Hichem M'Saad
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Publication number: 20120208373Abstract: A method for depositing an amorphous carbon layer on a substrate includes the steps of positioning a substrate in a chamber, introducing a hydrocarbon source into the processing chamber, introducing a heavy noble gas into the processing chamber, and generating a plasma in the processing chamber. The heavy noble gas is selected from the group consisting of argon, krypton, xenon, and combinations thereof and the molar flow rate of the noble gas is greater than the molar flow rate of the hydrocarbon source. A post-deposition termination step may be included, wherein the flow of the hydrocarbon source and the noble gas is stopped and a plasma is maintained in the chamber for a period of time to remove particles therefrom.Type: ApplicationFiled: April 25, 2012Publication date: August 16, 2012Applicant: Applied Materials, Inc.Inventors: DEENESH PADHI, Hyoung-Chan Ha, Sudha Rathi, Derek R. Witty, Chiu Chan, Sohyun Park, Ganesh Balasubramanian, Karthik Janakiraman, Martin Jay Seamons, Visweswaren Sivaramakrishnan, Bok Hoen Kim, Hichem M'Saad
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Publication number: 20120196450Abstract: Stress of a silicon nitride layer may be enhanced by deposition at higher temperatures. Employing an apparatus that allows heating of a substrate to substantially greater than 400° C. (for example a heater made from ceramic rather than aluminum), the silicon nitride film as-deposited may exhibit enhanced stress allowing for improved performance of the underlying MOS transistor device. In accordance with some embodiments, a deposited silicon nitride film is exposed to curing with plasma and ultraviolet (UV) radiation, thereby helping remove hydrogen from the film and increasing film stress. In accordance with other embodiments, a silicon nitride film is formed utilizing an integrated process employing a number of deposition/curing cycles to preserve integrity of the film at the sharp corner of the underlying raised feature. Adhesion between successive layers may be promoted by inclusion of a post-UV cure plasma treatment in each cycle.Type: ApplicationFiled: February 2, 2012Publication date: August 2, 2012Applicant: Applied Materials, Inc.Inventors: Mihaela Balseanu, Victor Nguyen, Li-Qun Xia, Derek R. Witty, Hichem M'Saad, Mei-Yee Shek, Isabelita Roflox
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Publication number: 20120097330Abstract: A substrate processing system includes a thermal processor or a plasma generator adjacent to a processing chamber. A first processing gas enters the thermal processor or plasma generator. The first processing gas then flows directly through a showerhead into the processing chamber. A second processing gas flows through a second flow path through the showerhead. The first and second processing gases are mixed below the showerhead and a layer of material is deposited on a substrate under the showerhead.Type: ApplicationFiled: October 20, 2010Publication date: April 26, 2012Applicant: Applied Materials, Inc.Inventors: Prahallad Iyengar, Sanjeev Baluja, Dale R. DuBois, Juan Carlos Rocha-Alverez, Thomas Nowak, Scott A. Hendrickson, Yong-Won Lee, Mei-Yee Shek, Li-Qun Xia, Derek R. Witty
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Patent number: 8148269Abstract: A method and apparatus are provided to form spacer materials adjacent substrate structures. In one embodiment, a method is provided for processing a substrate including placing a substrate having a substrate structure adjacent a substrate surface in a deposition chamber, depositing a spacer layer on the substrate structure and substrate surface, and etching the spacer layer to expose the substrate structure and a portion of the substrate surface, wherein the spacer layer is disposed adjacent the substrate structure. The spacer layer may comprise a boron nitride material. The spacer layer may comprise a base spacer layer and a liner layer, and the spacer layer may be etched in a two-step etching process.Type: GrantFiled: March 31, 2009Date of Patent: April 3, 2012Assignee: Applied Materials, Inc.Inventors: Mihaela Balseanu, Christopher D. Bencher, Yongmei Chen, Li Yan Miao, Victor Nguyen, Isabelita Roflox, Li-Qun Xia, Derek R. Witty
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Patent number: 8138104Abstract: Stress of a silicon nitride layer may be enhanced by deposition at higher temperatures. Employing an apparatus that allows heating of a substrate to substantially greater than 400° C. (for example a heater made from ceramic rather than aluminum), the silicon nitride film as-deposited may exhibit enhanced stress allowing for improved performance of the underlying MOS transistor device. In accordance with alternative embodiments, a deposited silicon nitride film is exposed to curing with ultraviolet (UV) radiation at an elevated temperature, thereby helping remove hydrogen from the film and increasing film stress. In accordance with still other embodiments, a silicon nitride film is formed utilizing an integrated process employing a number of deposition/curing cycles to preserve integrity of the film at the sharp corner of the underlying raised feature. Adhesion between successive layers may be promoted by inclusion of a post-UV cure plasma treatment in each cycle.Type: GrantFiled: June 13, 2007Date of Patent: March 20, 2012Assignee: Applied Materials, Inc.Inventors: Mihaela Balseanu, Victor Nguyen, Li-Qun Xia, Derek R. Witty, Hichem M'Saad, Mei-Yee Shek, Isabelita Roflox
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Publication number: 20110315992Abstract: In a method of depositing a crystalline germanium layer on a substrate, a substrate is placed in the process zone comprising a pair of process electrodes. In a deposition stage, a crystalline germanium layer is deposited on the substrate by introducing a deposition gas comprising a germanium-containing gas into the process zone, and forming a capacitively coupled plasma of the deposition gas by coupling energy to the process electrodes. In a subsequent treatment stage, the deposited crystalline germanium layer is treated by exposing the crystalline germanium layer to an energized treatment gas or by annealing the layer.Type: ApplicationFiled: June 25, 2010Publication date: December 29, 2011Applicant: Applied Materials, Inc.Inventors: Victor T. Nguyen, Li-Qun Xia, Mihaela Balseanu, Derek R. Witty
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Patent number: 8084105Abstract: Methods for forming boron-containing films are provided. The methods include introducing a boron-containing precursor and a nitrogen or oxygen-containing precursor into a chamber and forming a boron nitride or boron oxide film on a substrate in the chamber. In one aspect, the method includes depositing a boron-containing film and then exposing the boron-containing film to the nitrogen-containing or oxygen-containing precursor to incorporate nitrogen or oxygen into the film. The deposition of the boron-containing film and exposure of the film to the precursor may be performed for multiple cycles to obtain a desired thickness of the film. In another aspect, the method includes reacting the boron-containing precursor and the nitrogen-containing or oxygen-containing precursor to chemically vapor deposit the boron nitride or boron oxide film.Type: GrantFiled: June 19, 2007Date of Patent: December 27, 2011Assignee: Applied Materials, Inc.Inventors: Jeong-Uk Huh, Mihaela Balseanu, Li-Qun Xia, Victor T. Nguyen, Derek R. Witty, Hichem M'Saad