Abstract: A bidirectional level shifter circuit includes first and second driver circuits, first and second comparators, and a control circuit. The first driver circuit includes a first driver output and a first enable input. The second driver circuit includes a second driver output and a second enable input. The first comparator includes a first comparator output, a first reference input, and a first comparator input that is coupled to the second driver output. The second comparator includes a second comparator output, a second reference input, and a second comparator input is coupled to the first driver output. The control circuit includes a first control input coupled to the first comparator output, a second control input coupled to the second comparator output, a first control output coupled to the first enable input, and a second control output coupled to the second enable input.

Abstract: In one embodiment, a system includes a power delivery (“PD”) controller in a USB Type-C system that includes a configuration channel (“CC”), PD preamble detector, and a power-usage circuit. The PD controller includes a CC input that receives a PD message. The PD preamble detector is configured to detect a PD message preamble based in part upon a power of a filtered PD message and communicates a wake-up signal to the power-usage circuit in response to detecting a PD message preamble. The power-usage circuit is configured to exit a low-power mode in response to receiving the wake-up signal.

Abstract: An example system includes: a device coupled to a data line, the device configured to: send a first command on the data line, the first command including a first address; after sending the first command, read a first value on the data line, the first value including data from a first target device and a second target device; responsive to reading the first value, send a second command including the first address and data representing the first value on the data line; send a third command on the data line, the third command including the first address; after sending the third command, read a second value on the data line, the second value including data from the first target device and the second target device; responsive to reading the second value, send a fourth command on the data line, the fourth command including the first address.

Abstract: An example apparatus includes: a switch having a first current terminal, a second current terminal and a control terminal, the first current terminal adapted to be coupled to a first capacitor, the second current terminal adapted to be coupled to a second capacitor; a comparator having a comparator input and a comparator output, the comparator input coupled to a configuration terminal; a deglitch circuit having a deglitch input and a deglitch output, the deglitch input coupled to the comparator output, the deglitch circuit having a deglitch duration between a first duration and a second duration; and a universal serial bus (USB) controller having a controller output and a controller input, the controller output coupled to the control terminal, the controller input coupled to the deglitch output.

Abstract: A universal serial bus (USB) source device adapted to be coupled to a USB sink device via a USB cable, the USB source device including: a voltage bus (VBUS) terminal adapted to be coupled to a VBUS conductor of the USB cable; a configuration channel (CC) terminal adapted to be coupled to a CC conductor of the USB cable; a VOUT node coupled to the VBUS terminal and adapted to be coupled to a voltage supply; a controller circuit coupled to the VBUS terminal, the CC terminal and the VOUT node; a load circuit coupled to a discharge signal connection of the controller and to the VOUT node; and a resistor divider coupled to the VOUT node and the controller and adapted to be coupled to the voltage supply.

Abstract: A circuit comprising a first processing element having a first output configured to couple to a voltage control circuit, a second output configured to couple to a gate terminal of a first transistor, and a third output configured to couple to a first node and a control circuit. The control circuit comprises a second processing element having multiple outputs, a second transistor having a gate terminal configured to couple to one of the outputs of the second processing element, a first terminal configured to couple to a second node and to a drain terminal of the first transistor, and a second terminal, and a third transistor having a gate terminal configured to couple to a second of the outputs of the second processing element, a first terminal configured to couple to a third node, and a second terminal.

Abstract: A circuit includes a controller to communicate with a sink device and communicate a plurality of power sources that are available to the sink device. A plurality of switch devices switch power from one of the plurality of power sources to the sink device in response to a control signal from the controller. A policy engine in the controller defines policies for the operation of the controller during different communications phases between the controller and the sink device.

Abstract: Described examples include USB port controllers with a control circuit configured to switch from a normal first power mode to a second power mode for reduced power consumption in response a command from a port manager circuit, and to switch from the second power mode to the first power mode in response to detected activity on a communications connection, or a detected connection of a USB device to a USB port connector. After switching back to the first power mode in response to detected communications activity, the control circuit automatically switches operation of the USB port controller back to the second power mode unless a communications transaction addressed to the USB port controller is received within a non-zero certain time after switching from the second power mode to the first power mode.

Abstract: A power provider circuit includes a plurality of power delivery controllers, a single stage power supply, and control circuitry. Each of the plurality of power delivery controllers is configured to provide power to a detachable device. The single stage power supply is configured to generate the power for provision to the detachable devices, and to provide the power at a plurality of selectable voltages. The control circuitry configured to select a given voltage of the plurality of selectable voltages to be made available via all of the power delivery controllers based on power utilization capabilities and other optional status indications reported by the detachable devices.

Abstract: Described examples include USB port controllers with a control circuit configured to switch from a normal first power mode to a second power mode for reduced power consumption in response a command from a port manager circuit, and to switch from the second power mode to the first power mode in response to detected activity on a communications connection, or a detected connection of a USB device to a USB port connector. After switching back to the first power mode in response to detected communications activity, the control circuit automatically switches operation of the USB port controller back to the second power mode unless a communications transaction addressed to the USB port controller is received within a non-zero certain time after switching from the second power mode to the first power mode.

Abstract: A system may include a power supply configurable to generate any of a plurality of output voltages on a power supply output node. The system also may include a voltage auto-detection power distribution (PD) controller coupled to the power supply. The voltage auto-detection PD controller is configured to monitor an input signal for detection of presence of a device coupled to the system via a cable and assert combinations of a plurality of control signals. For each combination of control signals, the voltage auto-detection PD controller measures a value of an output voltage from the power supply, stores the measured value, and generates a plurality of packets for transmission to the device. Each packet contains a parameter indicative of a measured output voltage.

Abstract: A circuit comprising a first processing element having a first output configured to couple to a voltage control circuit, a second output configured to couple to a gate terminal of a first transistor, and a third output configured to couple to a first node and a control circuit. The control circuit comprises a second processing element having multiple outputs, a second transistor having a gate terminal configured to couple to one of the outputs of the second processing element, a first terminal configured to couple to a second node and to a drain terminal of the first transistor, and a second terminal, and a third transistor having a gate terminal configured to couple to a second of the outputs of the second processing element, a first terminal configured to couple to a third node, and a second terminal.

Abstract: A universal serial bus (USB) source device adapted to be coupled to a USB sink device via a USB cable, the USB source device including: a voltage bus (VBUS) terminal adapted to be coupled to a VBUS conductor of the USB cable; a configuration channel (CC) terminal adapted to be coupled to a CC conductor of the USB cable; a VOUT node coupled to the VBUS terminal and adapted to be coupled to a voltage supply; a controller circuit coupled to the VBUS terminal, the CC terminal and the VOUT node; a load circuit coupled to a discharge signal connection of the controller and to the VOUT node; and a resistor divider coupled to the VOUT node and the controller and adapted to be coupled to the voltage supply.

Abstract: A circuit comprising a first processing element having a first output configured to couple to a voltage control circuit, a second output configured to couple to a gate terminal of a first transistor, and a third output configured to couple to a first node and a control circuit. The control circuit comprises a second processing element having multiple outputs, a second transistor having a gate terminal configured to couple to one of the outputs of the second processing element, a first terminal configured to couple to a second node and to a drain terminal of the first transistor, and a second terminal, and a third transistor having a gate terminal configured to couple to a second of the outputs of the second processing element, a first terminal configured to couple to a third node, and a second terminal.

Abstract: In one embodiment, a system includes a power delivery (“PD”) controller in a USB Type-C system that includes a configuration channel (“CC”), PD preamble detector, and a power-usage circuit. The PD controller includes a CC input that receives a PD message. The PD preamble detector is configured to detect a PD message preamble based in part upon a power of a filtered PD message and communicates a wake-up signal to the power-usage circuit in response to detecting a PD message preamble. The power-usage circuit is configured to exit a low-power mode in response to receiving the wake-up signal.

Abstract: A circuit includes a regulation circuit configured to intercept messages on a configuration channel of a universal serial bus (USB) cable between a USB source device and a USB sink device. The regulation circuit regulates a source capability message from the USB cable configuration channel based on a predetermined power capability of the USB cable.

Abstract: In one embodiment, a system includes a power delivery (“PD”) controller in a USB Type-C system that includes a configuration channel (“CC”), PD preamble detector, and a power-usage circuit. The PD controller includes a CC input that receives a PD message. The PD preamble detector is configured to detect a PD message preamble based in part upon a power of a filtered PD message and communicates a wake-up signal to the power-usage circuit in response to detecting a PD message preamble. The power-usage circuit is configured to exit a low-power mode in response to receiving the wake-up signal.

Abstract: At least some embodiments are directed to an electronic device port system comprising a first device configured to negotiate power supply contracts from a power source via a universal serial bus (USB) cable. The system also comprises a second device configured to negotiate power supply contracts from the power source via the USB cable when the first device is unable to negotiate power supply contracts from the power source. The second device is configured to activate a switch after the second device negotiates a power supply contract with the power source. The switch is configured to permit the provision of power from the power source to a battery system of the electronic device per the negotiated power supply contract.

Abstract: A power provider circuit includes a plurality of power delivery controllers, a single stage power supply, and control circuitry. Each of the plurality of power delivery controllers is configured to provide power to a detachable device. The single stage power supply is configured to generate the power for provision to the detachable devices, and to provide the power at a plurality of selectable voltages. The control circuitry configured to select a given voltage of the plurality of selectable voltages to be made available via all of the power delivery controllers based on power utilization capabilities and other optional status indications reported by the detachable devices.

Abstract: Methods and apparatus for operating a communication system comprising three or more communication transceivers. In illustrative embodiments, multiple unique start-of-packet delimiters are maintained. A data packet to be transmitted is constructed using a specified one of the plurality of start-of-packet delimiters to demarcate the start of said data packet. The chosen start-of-packet delimiter reflects one or more transceivers that are intended recipients of said data packet. When a data packet is received by a transceiver, the start-of-packet delimiter of the received data packet is compared to one or more valid start-of-packet delimiters for the receiving transceiver. If the start-of-packet delimiter of the received data packet matches a valid start-of-packet delimiter for the receiving transceiver, the data packet is accepted, otherwise it is rejected.