Abstract: A power supply system comprises a parallel arrangement of a first switched mode power supply (1) which has a first system bandwidth (LB 1) and a second switched mode power supply (2) which has a second system bandwidth (LB2) covering higher frequencies than the first system bandwidth (LB 1). The first switched mode power supply (1) is dimensioned to supply a first maximal output power (P1m), the second switched mode power supply (2) is dimensioned to supply a second maximal output power (P2m) being smaller than the first maximal output power (P1m). A control circuit (3) varies a reference voltage (Vr) of both the first switched mode power supply (1) and the second switched mode power supply (2) to obtain a corresponding variation of an output voltage (Vout) of the parallel arrangement.

Abstract: An integration substrate for a system in package comprises a through-substrate via and a trench capacitor wherein with a trench filling that includes at least four electrically conductive capacitor-electrode layers in an alternating arrangement with dielectric layers. —The capacitor-electrode layers are alternatingly connected to a respective one of two capacitor terminals provided on the first or second substrate side. The trench capacitor and the through-substrate via are formed in respective trench openings and via openings in the semiconductor substrate, which have an equal lateral extension exceeding 10 micrometer. This structure allows, among other advantages, a particularly cost-effective fabrication of the integration substrate because the via openings and the trench openings in the substrate can be fabricated simultaneously.

Abstract: An electronic device is provided which comprises a DC-DC converter. The DC-DC converter comprises at least one solid-state rechargeable battery (B1, B2) for storing energy for the DC-DC conversion and an output capacitor (C2).

Abstract: The present invention relates to a configurable trench multi-capacitor device comprising a trench in a semiconductor substrate. The trench has a lateral extension exceeding 10 micrometer and a trench filling includes a number of at least four electrically conductive capacitor-electrode layers. A switching unit is provided that comprises a plurality of switching elements electrically interconnected between different capacitor-electrode layers of the trench filling. A control unit is connected with the switching unit and configured to generate and provide to the switching unit respective control signals for forming a respective one of a plurality of multi-capacitor configurations using the capacitor-electrode layers of the trench filling.

Abstract: A power supply system comprises a parallel arrangement of a linear amplifier (LA) and a DC-DC converter (CO). The linear amplifier (LA) has an amplifier output to supply a first current (II) to the load (LO). The DC-DC converter (CO) comprises: a converter output for supplying a second current (12) to the load (LO), a first inductor (L1), and a switch (SC) coupled to the first inductor (L1) for generating a current in the first inductor (L1), and a low-pass filter (FI) arranged between the first inductor (L1) and the load (LO). The low pass filter (FI) comprises a first capacitor (C1; CA) which has a first terminal coupled to the switch (SC) an a second terminal coupled to a reference voltage level (GND), and a second inductor (L2; LC) which has a first terminal coupled to the first inductor (L1) and a second terminal coupled to the load (LO).

Abstract: An audio coding scheme allowing PCM signal to lossless DSD signal expansion for next generation optical disc formats. The method of encoding an input DSD signal includes up-sampling a corresponding PCM signal to the DSD sample rate. Then a set of loop filter parameters for a noise-shaping loop of a sigma-delta modulator are generated, either using a random starting condition of the sigma-delta modulator or including synchronization parameters. This will allow a decoder to regenerate an almost perfect signal, but still it needs a correction signal to be able to bit identically regenerate the DSD input signal. Therefore, a correction signal is generated based on a difference between a sigma-delta modulated version of the up-sampled PCM signal and the input DSD signal, wherein the sigma-delta modulated version of the up-sampled PCM signal is obtained using the set of loop filter parameters.

Abstract: In a wireless communications system, such as a multiband Ultra Wideband communications system, data is transmitted by means of the phases of pulses in multiple frequency bands. A signal is transmitted with a predetermined phase in at least one of the frequency bands for at least a part of the time, and can be used to allow accurate detection of the phases of the signals transmitted in the other frequency bands. One of the frequency bands can be designated as a reference band, and pulses can be transmitted with constant phase in the reference band. More generally, pulses can be transmitted in the other frequency bands with phases which have a known relationship with the phases of the pulses in the reference band.

Abstract: The chip (100) comprises a network of trench capacitors (102) and an inductor (114), wherein the trench capacitors (102) are coupled in parallel with a pattern of interconnects (113A,B, . . . ) that is designed so as to limit generation of eddy current induced by the inductor (114) in the interconnects (113A,B, . . . ). This allows the use of the chip (100) as a portion of a DC-DC converter, that is integrated in an assembly of a first chip and this—second chip (100). The inductor of this integrated DC-DC converter may be defined elsewhere within the assembly.

Abstract: An electronic quadrature device is provided comprising at least one I signal path (I) and at least one Q signal path (Q); at least one first sigma-delta modulator (DSDMI) and at least one first digital/analog converter unit (DACI) arranged in the at least one I signal path (I); and at least one second sigma-delta modulator (DSDMQ) and at least one second digital/analog converter unit (DACQ) arranged in the at least one Q signal path (Q). The at least one first sigma-delta modulator (DSDMI) is coupled to the at least one second sigma-delta modulator (DSDMQ) via at least one complex signal path (C1-C4) to implement a complex filter.

Abstract: The present invention relates to an electronic device (300) comprising at least one trench capacitor (302) that can also take the form of an inverse structure, a pillar capacitor. An alternating layer sequence (308) of at least two dielectric layers (312, 316) and at least two electrically conductive layers (314, 318) is provided in the trench capacitor or on the pillar capacitor, such that the at least two electrically conductive layers are electrically isolated from each other and from the substrate by respective ones of the at least two dielectric layers. A set of internal contact pads (332, 334, 340) is provided, and each internal contact pad is connected with a respective one of the electrically conductive layers or with the substrate. By providing an individual internal contact pad for each of the electrically conductive layers, a range of switching opportunities is opened up that allows tuning the specific capacitance of the capacitor to a desired value.

Abstract: In a wireless communications system, such as a multiband Ultra Wideband communications system, data is tranmitted by means of the phases of pulses in multiple frequency bands. Data is encoded in the phase difference between a pulse and a previously transmitted pulse. The previously transmitted pulse may be the immediately preceding pulse in the same frequency band, or may be separated from the present pulse by a number of intervening pulses.

Abstract: A semiconductor chip (CHP) and a semiconductor chip driver (RDR) communicate with each other in a wireless fashion. To that end, the semiconductor chip driver (RDR) generates an energy flux (FX1; FX2) that is concentrated on a transducer area (AT1; AT2) of the semiconductor chip (CHP). In the semiconductor chip (CHP), a wireless communication interlace (WCI) provides an electrical signal to a signal processing circuit in response to the energy flux (FX1; FX2). The signal processing circuit occupies an area (AS) that is substantially separate from the transducer area (AT1; AT2) on which the energy flux (FX1; FX2) is concentrated.

Abstract: Consistent with an example embodiment a, DA-converter system comprises the cascade of a multi-bit sigma-delta modulator and a DA-converter. The quantization noise of the sigma-delta modulator is isolated; the isolated quantization noise is word-length reduced in a second noise shaper with frequency independent signal transfer function and the isolated word-length reduced quantization noise is subtracted from the quantization noise of said cascade. In another embodiment, the isolated quantization noise is amplified before and attenuated after the second noise shaper.

Abstract: A sigma-delta modulator (SDM) including n (n>_1) integrators in series, where a first of the n integrators receiving an input signal, at least one Q device, which acts as a quantizer when an absolute value of a signal input thereto is smaller and as a gain element (either with or without offset) when the absolute value of the signal input thereto is larger, and a device for quantizing an output of the unit. The SDM may be a feed back or feed forward SDM. The SDM may include a single or multiple Q devices. The single Q device may be positioned so that the signal input to the one Q device is an output of the last integrator and the output of the one device Q1 is input to the device for quantizing and/or to the n integrators. For multiple Q devices, each of the Q devices may have different parameters set to improve stability, improve SNR, and/or reduce introduction of artifacts. The SDM may be part of an analog to digital converter and/or a digital to digital converter.

Abstract: A robust watermark embedded into a Direct Stream Digital (DSD) audio signal including a flat frequency response in a specific frequency range which does not extend below 20 kHz or above 100 kHz. The watermark is therefore hidden in the noise spectrum of the DSD signal, such that the watermark is inaudible to a listener. Since the noise spectrum contains important information that helps provide the DSD signals with sharp transients and an accurate impulse response, the watermark cannot be removed from the DSD signal without causing significant degradation to the signal's audio quality.

Abstract: Improved sigma-delta modulator (SDM) for 1-bit digital audio noise shaping. It is the object to produce a bit stream that is compatible with the Scarlet Book specification (Super Audio CD standard, SACD) and that achieves a higher lossless compression ratio when compressed and decompressed according to the standard. This goal is achieved by using a trellis-based SDM and/or a prediction filter within the SDM that is similar or identical to the prediction filter in the encoder. The trellis SDM is designed to produce a predicted signal from a range of candidate signals that is as close to the input signal as possible.

Abstract: A mixing system for mixing a plurality of digital audio signals, at least one of which is a noise-shaped oversampled digital audio signal having a predetermined sampling frequency and bit resolution, said system comprising a summing unit for computing a sum signal of said plurality of input signals; a clipping unit having an input for receiving said sum signal, said clipping unit clipping said sum signal; further comprising a filter unit between the input terminals and the clipping unit, arranged to selectively suppress frequency components outside an audio frequency band from the sum signal; and a converter unit arranged to receive a clipped sum signal from the clipping unit and to convert said clipped sum signal into an output signal of said bit resolution, using noise-shaping, the clipping unit being arranged to limit the input values to a range of values that the converter is able to handle in a stable manner.

Abstract: A DA-converter system comprises the cascade of a multi-bit sigma-delta modulator and a DA-converter. The quantization noise of the sigma-delta modulator is isolated, the isolated quantization noise is word-length reduced in a second noise shaper with frequency independent signal transfer function and the isolated word-length reduced quantization noise is subtracted from the quantization noise of said cascade. Preferably the isolated quantization noise is amplified before and attenuated after the second noise shaper.

Abstract: A system (10) and method that generate bit-streams that result in higher compression gains. The system is akin to a normal 1-bit SDM. Internally, the system (10) tries to find the best possible bit sequence by tracing N possible solutions at every time instant. In an implementation, the system has N>I trellis path structures (20). Every path is used to track a possible output bitstream. The quality of a bitstream is determined by measuring the (frequency weighted) difference between input and output; it is this measure that is reduced or minimized.

Abstract: An adaptive filtering device and method where at least one adaptive filter receives an input signal and a metering device receives an output of the at least one adaptive filter, monitors a characteristic of the output, such as power of high-frequency components, and forwards a correction signal in a feedback loop to adjust the characteristic of the at least one filter in order to change the characteristic of the output. An adaptive filtering device (200) and method where two low-pass FIR filters (202, 204) receive an input signal, a weighted adder (206) receives outputs from the two low-pass FIR filters and changes a weighting of each to produce filtered output data, and a controller (208) that receives a cutoff frequency (203), supplies the cut-off frequency to the two low-pass FIR filters, and supplies a signal to the weighted adder for varying the weighting of each of the low-pass FIR filters to switch therebetween.