Patents by Inventor Derwin W. Mattos

Derwin W. Mattos has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11658476
    Abstract: A Universal Serial Bus (USB) device includes a USB Type-C connector having a configuration channel (CC) terminal and an integrated circuit (IC) controller. The IC controller comprises a VCONN pin coupled to the CC terminal of the USB Type-C connector, an output terminal, and an on-chip voltage protection circuit coupled between the VCONN pin and the output terminal. The on-chip voltage protection circuit comprises a switch coupled between the VCONN pin and the output terminal, a pump logic coupled to a gate of the switch, a resistor coupled between the VCONN pin and the gate of the switch, and a diode clamp coupled between the gate of the switch and ground.
    Type: Grant
    Filed: March 4, 2021
    Date of Patent: May 23, 2023
    Assignee: Cypress Semiconductor Corporation
    Inventors: Nicholas Alexander Bodnaruk, Derwin W. Mattos
  • Publication number: 20210328389
    Abstract: A Universal Serial Bus (USB) device includes a USB Type-C connector having a configuration channel (CC) terminal and an integrated circuit (IC) controller. The IC controller comprises a VCONN pin coupled to the CC terminal of the USB Type-C connector, an output terminal, and an on-chip voltage protection circuit coupled between the VCONN pin and the output terminal. The on-chip voltage protection circuit comprises a switch coupled between the VCONN pin and the output terminal, a pump logic coupled to a gate of the switch, a resistor coupled between the VCONN pin and the gate of the switch, and a diode clamp coupled between the gate of the switch and ground.
    Type: Application
    Filed: March 4, 2021
    Publication date: October 21, 2021
    Applicant: Cypress Semiconductor Corporation
    Inventors: Nicholas Alexander Bodnaruk, Derwin W. Mattos
  • Patent number: 10950987
    Abstract: An electronic device includes a first switch configured to connect a first sideband use (SBU) terminal of a Universal Serial Bus Type-C (USB-C) controller to a first SBU terminal of a USB-C receptacle. The electronic device also includes a second switch configured to connect a second sideband use (SBU) terminal of the USB-C controller to a second SBU terminal of the USB-C receptacle. The electronic device further includes a voltage protection circuit configured to deactivate one or more of the first switch and the second switch when a voltage exceeding a predetermined threshold is detected. The voltage protection circuit includes a first set of diodes coupled to the first SBU terminal of the USB-C controller and a second set of diodes coupled to the second SBU terminal of the USB-C controller.
    Type: Grant
    Filed: June 20, 2019
    Date of Patent: March 16, 2021
    Assignee: Cypress Semiconductor Corporation
    Inventors: Nicholas Alexander Bodnaruk, Derwin W. Mattos
  • Patent number: 10847964
    Abstract: In an example embodiment, a universal serial bus (USB) Type-C controller comprises a current detector circuit configured to provide over-current protection on a voltage bus (VBUS) line. The current detector circuit comprises a current sense amplifier, a reference voltage generator, and a comparator coupled to the current sense amplifier and to the reference voltage generator. The current sense amplifier is configured to receive a pair of input voltages from the VBUS line and to output an indicator signal responsive to an input voltage difference between the pair of input voltages. The reference voltage generator is configured to generate a reference voltage in response to a voltage selector signal. The comparator is configured to output an interrupt signal responsive to the indicator signal exceeding the reference voltage.
    Type: Grant
    Filed: June 26, 2019
    Date of Patent: November 24, 2020
    Assignee: Cypress Semiconductor Corporation
    Inventors: Derwin W. Mattos, Arnab Chakraborty, Ramakrishna Venigalla, Gerard Kato, Vaidyanathan Varsha
  • Patent number: 10788875
    Abstract: A device and method that include a power control analog subsystem of a universal serial bus (USB) compatible power supply device is disclosed. The power control analog subsystem includes a programmable reference generator to generate first reference voltages. The power control analog subsystem also includes multiplexers, where each of a plurality of multiplexers are coupled to a first terminal and a second terminal of a producer field-effect transistor (FET) to receive a first voltage (Vbus_in) and a second voltage (Vbus_c) and to output second reference voltages. The power control analog subsystem further includes comparators, wherein each of the comparators is coupled to receive a corresponding reference voltage of the first reference voltages from the programmable reference generator and to receive a corresponding selected voltage from a corresponding multiplexer of the multiplexers. Each of the comparators is configured to output a corresponding system interrupt based on a corresponding voltage condition.
    Type: Grant
    Filed: February 15, 2019
    Date of Patent: September 29, 2020
    Assignee: Cypress Semiconductor Corporation
    Inventors: Derwin W. Mattos, Anup Nayak
  • Publication number: 20200153228
    Abstract: In an example embodiment, a universal serial bus (USB) Type-C controller comprises a current detector circuit configured to provide over-current protection on a voltage bus (VBUS) line. The current detector circuit comprises a current sense amplifier, a reference voltage generator, and a comparator coupled to the current sense amplifier and to the reference voltage generator. The current sense amplifier is configured to receive a pair of input voltages from the VBUS line and to output an indicator signal responsive to an input voltage difference between the pair of input voltages. The reference voltage generator is configured to generate a reference voltage in response to a voltage selector signal. The comparator is configured to output an interrupt signal responsive to the indicator signal exceeding the reference voltage.
    Type: Application
    Filed: June 26, 2019
    Publication date: May 14, 2020
    Applicant: Cypress Semiconductor Corporation
    Inventors: Derwin W. Mattos, Arnab Chakraborty, Ramakrishna Venigalla, Gerard Kato, Vaidyanathan Varsha
  • Publication number: 20190393655
    Abstract: An electronic device includes a first switch configured to connect a first sideband use (SBU) terminal of a Universal Serial Bus Type-C (USB-C) controller to a first SBU terminal of a USB-C receptacle. The electronic device also includes a second switch configured to connect a second sideband use (SBU) terminal of the USB-C controller to a second SBU terminal of the USB-C receptacle. The electronic device further includes a voltage protection circuit configured to deactivate one or more of the first switch and the second switch when a voltage exceeding a predetermined threshold is detected. The voltage protection circuit includes a first set of diodes coupled to the first SBU terminal of the USB-C controller and a second set of diodes coupled to the second SBU terminal of the USB-C controller.
    Type: Application
    Filed: June 20, 2019
    Publication date: December 26, 2019
    Applicant: Cypress Semiconductor Corporation
    Inventors: Nicholas Alexander Bodnaruk, Derwin W. Mattos
  • Publication number: 20190294226
    Abstract: A device and method that include a power control analog subsystem of a universal serial bus (USB) compatible power supply device is disclosed. The power control analog subsystem includes a programmable reference generator to generate first reference voltages. The power control analog subsystem also includes multiplexers, where each of a plurality of multiplexers are coupled to a first terminal and a second terminal of a producer field-effect transistor (FET) to receive a first voltage (Vbus_in) and a second voltage (Vbus_c) and to output second reference voltages. The power control analog subsystem further includes comparators, wherein each of the comparators is coupled to receive a corresponding reference voltage of the first reference voltages from the programmable reference generator and to receive a corresponding selected voltage from a corresponding multiplexer of the multiplexers. Each of the comparators is configured to output a corresponding system interrupt based on a corresponding voltage condition.
    Type: Application
    Filed: February 15, 2019
    Publication date: September 26, 2019
    Applicant: Cypress Semiconductor Corporation
    Inventors: Derwin W. Mattos, Anup Nayak
  • Patent number: 10381787
    Abstract: An electronic device includes a first switch configured to connect a first sideband use (SBU) terminal of a Universal Serial Bus Type-C (USB-C) controller to a first SBU terminal of a USB-C receptacle. The electronic device also includes a second switch configured to connect a second sideband use (SBU) terminal of the USB-C controller to a second SBU terminal of the USB-C receptacle. The electronic device further includes a voltage protection circuit configured to deactivate one or more of the first switch and the second switch when a voltage exceeding a predetermined threshold is detected. The voltage protection circuit includes a first set of diodes coupled to the first SBU terminal of the USB-C controller and a second set of diodes coupled to the second SBU terminal of the USB-C controller.
    Type: Grant
    Filed: September 28, 2018
    Date of Patent: August 13, 2019
    Assignee: Cypress Semiconductor Corporation
    Inventors: Nicholas Alexander Bodnaruk, Derwin W. Mattos
  • Patent number: 10374411
    Abstract: In an example embodiment, a device comprises a gate driver and a current detector circuit. The gate driver is configured to be coupled to a power switch on the VBUS line of a USB connector. The current detector circuit is configured to be coupled to the VBUS line and comprises a current sense amplifier, a reference voltage generator circuit, and a comparator. The current sense amplifier is configured to receive a pair of input voltages and to output an indicator signal responsive to the input voltage difference. The reference voltage generator circuit comprises a digital-to-analog converter configured to generate a reference voltage signal based on a received voltage selector signal that is a binary input signal comprising multiple bit values. The comparator is configured to receive the indicator signal and the reference voltage signal and to output an interrupt signal responsive to the indicator signal exceeding the reference voltage signal.
    Type: Grant
    Filed: January 17, 2018
    Date of Patent: August 6, 2019
    Assignee: Cypress Semiconductor Corporation
    Inventors: Derwin W. Mattos, Arnab Chakraborty, Ramakrishna Venigalla, Gerard Kato, Vaidyanathan Varsha
  • Patent number: 10228742
    Abstract: A device and method that include a power control analog subsystem of a universal serial bus (USB) compatible power supply device is disclosed. The power control analog subsystem includes a programmable reference generator to generate first reference voltages. The power control analog subsystem also includes multiplexers, where each of a plurality of multiplexers are coupled to a first terminal and a second terminal of a producer field-effect transistor (FET) to receive a first voltage (Vbus_in) and a second voltage (Vbus_c) and to output second reference voltages. The power control analog subsystem further includes comparators, wherein each of the comparators is coupled to receive a corresponding reference voltage of the first reference voltages from the programmable reference generator and to receive a corresponding selected voltage from a corresponding multiplexer of the multiplexers. Each of the comparators is configured to output a corresponding system interrupt based on a corresponding voltage condition.
    Type: Grant
    Filed: December 20, 2017
    Date of Patent: March 12, 2019
    Assignee: Cypress Semiconductor Corporation
    Inventors: Derwin W. Mattos, Anup Nayak
  • Patent number: 10222402
    Abstract: A device includes a power control analog subsystem of a universal serial bus-power delivery (USB-PD) compatible power supply device. The power control analog subsystem includes a programmable current sensing circuit and a current sense resistor coupled to the power control analog subsystem. The power control analog subsystem is configured to concurrently compare a current flow through the current sense resistor with at least three different reference values, e.g., compare a sensed voltage with at least three different reference voltages.
    Type: Grant
    Filed: March 19, 2018
    Date of Patent: March 5, 2019
    Assignee: Cypress Semiconductor Corporation
    Inventors: Vaidyanathan Varsha, Derwin W. Mattos
  • Publication number: 20180335454
    Abstract: A device includes a power control analog subsystem of a universal serial bus-power delivery (USB-PD) compatible power supply device. The power control analog subsystem includes a programmable current sensing circuit and a current sense resistor coupled to the power control analog subsystem. The power control analog subsystem is configured to concurrently compare a current flow through the current sense resistor with at least three different reference values, e.g., compare a sensed voltage with at least three different reference voltages.
    Type: Application
    Filed: March 19, 2018
    Publication date: November 22, 2018
    Applicant: Cypress Semiconductor Corporation
    Inventors: Vaidyanathan Varsha, Derwin W. Mattos
  • Publication number: 20180335818
    Abstract: A device and method that include a power control analog subsystem of a universal serial bus (USB) compatible power supply device is disclosed. The power control analog subsystem includes a programmable reference generator to generate first reference voltages. The power control analog subsystem also includes multiplexers, where each of a plurality of multiplexers are coupled to a first terminal and a second terminal of a producer field-effect transistor (FET) to receive a first voltage (Vbus_in) and a second voltage (Vbus_c) and to output second reference voltages. The power control analog subsystem further includes comparators, wherein each of the comparators is coupled to receive a corresponding reference voltage of the first reference voltages from the programmable reference generator and to receive a corresponding selected voltage from a corresponding multiplexer of the multiplexers. Each of the comparators is configured to output a corresponding system interrupt based on a corresponding voltage condition.
    Type: Application
    Filed: December 20, 2017
    Publication date: November 22, 2018
    Applicant: Cypress Semiconductor Corporation
    Inventors: Derwin W. Mattos, Anup Nayak
  • Publication number: 20180191148
    Abstract: In an example embodiment, a device comprises a gate driver and a current detector circuit. The gate driver is configured to be coupled to a power switch on the VBUS line of a USB connector. The current detector circuit is configured to be coupled to the VBUS line and comprises a current sense amplifier, a reference voltage generator circuit, and a comparator. The current sense amplifier is configured to receive a pair of input voltages and to output an indicator signal responsive to the input voltage difference. The reference voltage generator circuit comprises a digital-to-analog converter configured to generate a reference voltage signal based on a received voltage selector signal that is a binary input signal comprising multiple bit values. The comparator is configured to receive the indicator signal and the reference voltage signal and to output an interrupt signal responsive to the indicator signal exceeding the reference voltage signal.
    Type: Application
    Filed: January 17, 2018
    Publication date: July 5, 2018
    Applicant: Cypress Semiconductor Corporation
    Inventors: Derwin W. Mattos, Arnab Chakraborty, Ramakrishna Venigalla, Gerard Kato, Vaidyanathan Varsha
  • Patent number: 9899825
    Abstract: A current detector circuit includes a current sense amplifier, coupled to a sense resistor, to receive a pair of input voltages and to output a first indicator signal responsive to a sensed input voltage difference produced by a sensed current passing through the sense resistor. The current detector circuit includes a comparator coupled to the current sense amplifier, the comparator to compare the first indicator signal to a reference voltage signal and output an interrupt signal responsive to the first indicator signal exceeding the reference voltage signal; and a reference voltage generator circuit coupled to the comparator, the reference voltage generator circuit to select the reference voltage signal from a plurality of reference voltages according to a first selector signal received from a configuration channel of a serial bus connector device.
    Type: Grant
    Filed: September 29, 2016
    Date of Patent: February 20, 2018
    Assignee: Cypress Semiconductor Corporation
    Inventors: Derwin W. Mattos, Arnab Chakraborty, Ramakrishna Venigalla, Gerard Kato, Vaidyanathan Varsha
  • Publication number: 20170331270
    Abstract: A current detector circuit includes a current sense amplifier, coupled to a sense resistor, to receive a pair of input voltages and to output a first indicator signal responsive to a sensed input voltage difference produced by a sensed current passing through the sense resistor. The current detector circuit includes a comparator coupled to the current sense amplifier, the comparator to compare the first indicator signal to a reference voltage signal and output an interrupt signal responsive to the first indicator signal exceeding the reference voltage signal; and a reference voltage generator circuit coupled to the comparator, the reference voltage generator circuit to select the reference voltage signal from a plurality of reference voltages according to a first selector signal received from a configuration channel of a serial bus connector device.
    Type: Application
    Filed: September 29, 2016
    Publication date: November 16, 2017
    Inventors: Derwin W. Mattos, Arnab Chakraborty, Ramakrishna Venigalla, Gerard Kato, Vaidyanathan Varsha
  • Patent number: 9455027
    Abstract: An integrated circuit (IC) device can include a memory array section comprising a plurality of memory arrays that each include memory cells for storing data values; a data path section having switching circuits configured to enable data paths between the memory arrays and a plurality of input/outputs (I/Os) of the IC device; and a power fill control circuit configured to activate power-fill circuits in the IC device to perform non-mission mode operations that consume current, the amount of non-mission mode operations varying in response to mission mode circuit activity in the IC device; wherein mission mode circuit activity includes circuit activity resulting from a user input to the IC device.
    Type: Grant
    Filed: August 10, 2015
    Date of Patent: September 27, 2016
    Assignee: Cypress Semiconductor Corporation
    Inventors: Derwin W. Mattos, Thinh Tran
  • Patent number: 9224454
    Abstract: An integrated circuit (IC) device can include a static random access memory (SRAM) section comprising a plurality of memory banks; and an interface comprising physical connections for more than eight memory channels, the connections for each memory channel including an address section including connections for SRAM control inputs and a complete address to access the memory banks, and a data section including data inputs and outputs (data IOs) to transfer data for one memory bank.
    Type: Grant
    Filed: March 28, 2014
    Date of Patent: December 29, 2015
    Assignee: Cypress Semiconductor Corporation
    Inventors: Dinesh Maheshwari, Derwin W. Mattos, Avi Avanindra
  • Publication number: 20150117092
    Abstract: An integrated circuit (IC) device can include a static random access memory (SRAM) section comprising a plurality of memory banks; and an interface comprising physical connections for more than eight memory channels, the connections for each memory channel including an address section including connections for SRAM control inputs and a complete address to access the memory banks, and a data section including data inputs and outputs (data IOs) to transfer data for one memory bank.
    Type: Application
    Filed: March 28, 2014
    Publication date: April 30, 2015
    Inventors: Dinesh Maheshwari, Derwin W. Mattos, Avi Avanindra