Patents by Inventor Devender

Devender has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190283693
    Abstract: A system for implementing strobing of existing vehicle hazard lights including an interface to a vehicle wiring harness configured to receive input to an existing vehicle flasher module, and a strobing circuit that responds to an activation signal from the vehicle wiring harness that is indicative of a hazard flasher deployment event by producing an electrical output through the interface to the vehicle wiring harness that causes a strobing of existing vehicle hazard lamps.
    Type: Application
    Filed: March 20, 2019
    Publication date: September 19, 2019
    Inventors: DAVID M. TUCKER, DANIEL ANTHONY TUCKER, JOHN ZACHARIAH COBB, JONATHAN TORKELSON, DENVER KIMBERLIN, DEVENDER NATH MAURYA
  • Publication number: 20190211004
    Abstract: This invention provides for flow and batch synthesis processes for the production of Lamivudine and Emtricitabine, including flow and batch synthesis processes wherein at least of the synthesis steps are conducted in a solvent free environment.
    Type: Application
    Filed: June 13, 2017
    Publication date: July 11, 2019
    Applicant: Nelson Mandela Metropolitan University
    Inventors: Devender Mandala, Paul Watts
  • Publication number: 20180357150
    Abstract: A computer based electronic device emulation and development system includes examining a target platform program and determining a first memory location utilized by the target platform program, and providing a first software object to a host program containing a function that allows access to the first memory location.
    Type: Application
    Filed: June 7, 2018
    Publication date: December 13, 2018
    Inventors: Ashok Kumar Chaubey, DEVENDER NATH MAURYA, Devender Pal Sharma, Jonathan Torkelson, Manish Dubey, NICHOLAS WESLEY VINYARD
  • Patent number: 10109706
    Abstract: The present disclosure describes a method or forming vertical natural capacitor (VNCAP) and the resulting device. The method includes applying a patterned mask over an insulation layer. The method includes forming using the patterned mask, a dielectric trench in the insulation layer. The method includes depositing a high dielectric constant k (high k) layer in the dielectric trench. The method includes forming a first trench and a second trench in the high k dielectric layer. The high k dielectric layer is disposed between the first trench and the second trench. The method includes depositing metal in the first trench and the second trench.
    Type: Grant
    Filed: July 7, 2017
    Date of Patent: October 23, 2018
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Devender, Sunil K. Singh, M. Golam Faruk, Dewei Xu
  • Publication number: 20180269273
    Abstract: Methods for contacting a metal-insulator-metal (MIM) capacitor, as well as structures including a MIM capacitor. A dielectric layer is formed on an electrode of a metal-insulator-metal capacitor. A via is formed that extends vertically through the dielectric layer to the electrode. A conductive plug is formed in the via that contacts the electrode. The dielectric layer is comprised of a polymer, such as polyimide.
    Type: Application
    Filed: March 20, 2017
    Publication date: September 20, 2018
    Inventors: Sunil Singh, Devender, Lili Cheng
  • Patent number: 10079786
    Abstract: The present disclosure provides methods and apparatus for enhanced messaging. Specifically, methods and apparatus are presented for transmitting a communication characteristic indicator of a communication message substantially simultaneous to an input of data defining at least a portion of the communication message at the sending device. In one aspect, the communication characteristic indicator represents one or more characteristics of the data.
    Type: Grant
    Filed: September 3, 2012
    Date of Patent: September 18, 2018
    Assignee: QUALCOMM Incorporated
    Inventors: Devender Akira Yamakawa, Kameron N. Kerger, Paul J. Lafata
  • Patent number: 10068192
    Abstract: A system including a computer solves supply chain campaign planning problems involving major and minor setups. The computer is configured to execute a major campaign for two or more of a plurality of major product families and fix an optimal major product family to a major time period on a planning horizon, based at least on aggregated major productivity fractions and calculated second moments of a plurality of two or more major product families. The computer is further configured to execute a minor campaign for two or more minor product families associated with the optimal major product family, obtain a minor productivity fraction of a campaignable resource for the minor product family over at least a portion of a major time period and fix an optimal minor product family from the two or more minor product families to a minor time period based at least on the minor productivity fraction.
    Type: Grant
    Filed: October 9, 2017
    Date of Patent: September 4, 2018
    Assignee: JDA Software Group, Inc.
    Inventors: Narasimha B. Kamath, Devender Chauhan, Deba Kalyan Mohanty, Dinesh Damodaran
  • Publication number: 20180032937
    Abstract: A system including a computer solves supply chain campaign planning problems involving major and minor setups. The computer is configured to execute a major campaign for two or more of a plurality of major product families and fix an optimal major product family to a major time period on a planning horizon, based at least on aggregated major productivity fractions and calculated second moments of a plurality of two or more major product families. The computer is further configured to execute a minor campaign for two or more minor product families associated with the optimal major product family, obtain a minor productivity fraction of a campaignable resource for the minor product family over at least a portion of a major time period and fix an optimal minor product family from the two or more minor product families to a minor time period based at least on the minor productivity fraction.
    Type: Application
    Filed: October 9, 2017
    Publication date: February 1, 2018
    Inventors: Narasimha B. Kamath, Devender Chauhan, Deba Kalyan Mohanty, Dinesh Damodaran
  • Patent number: 9881509
    Abstract: The present invention provides an educational toy simulator which comprises a base member and a set of peg pieces. The base member is formed of multiple layers, and one or more cut outs are formed in the base member for receiving the corresponding peg piece. The cut outs and the peg pieces are formed with a contoured, stepped or tapered structure to prevent the peg pieces from coming in contact with the image display member. A slot is formed in the base member to slidably receive an image display member for displaying a picture through the cut outs. A depth of the peg pieces is smaller than a depth of the corresponding cut outs. Since the image display member is slidably received in the slot, the displayed pictures may be changed from time to time thus providing capabilities for introducing more vocabulary to a learner in a playful way.
    Type: Grant
    Filed: July 29, 2016
    Date of Patent: January 30, 2018
    Inventors: Navneet Kalia, Devender Dutt Kalia
  • Patent number: 9857998
    Abstract: A system includes non-volatile memory storing firmware and an embedded baseboard management controller (BMC). The BMC includes a BMC volatile memory and a BMC processor coupled to the BMC volatile memory and the non-volatile memory. The BMC processor performs a first method wherein the firmware is obtained from the non-volatile memory, instrumented, and stored on a host computer volatile memory. Also in the first method, separate copies of vital debug information about the instrumented firmware are stored on the BMC volatile memory and the host computer volatile memory. The system further includes a host computer housing the embedded BMC, the host computer volatile memory, and a host computer processor coupled to the host computer volatile memory. The host computer processor performs a second method wherein the instrumented firmware is obtained from the host computer volatile memory and executed.
    Type: Grant
    Filed: October 23, 2015
    Date of Patent: January 2, 2018
    Assignee: International Business Machines Corporation
    Inventors: Vijay F. G. Lobo, Devender Rao Marri
  • Publication number: 20170346767
    Abstract: The present disclosure provides methods and apparatus for enhanced messaging. Specifically, methods and apparatus are presented for transmitting a communication characteristic indicator of a communication message substantially simultaneous to an input of data defining at least a portion of the communication message at the sending device. In one aspect, the communication characteristic indicator represents one or more characteristics of the data.
    Type: Application
    Filed: August 16, 2017
    Publication date: November 30, 2017
    Inventors: Devender Akira YAMAKAWA, Kameron N. KERGER, Paul J. LAFATA
  • Patent number: 9785900
    Abstract: A system including a computer solves supply chain campaign planning problems involving major and minor setups. The computer is configured to execute a major campaign for two or more of a plurality of major product families and fix an optimal major product family to a major time period on a planning horizon, based at least on aggregated major productivity fractions and calculated second moments of a plurality of two or more major product families. The computer is further configured to execute a minor campaign for two or more minor product families associated with the optimal major product family, obtain a minor productivity fraction of a campaignable resource for the minor product family over at least a portion of a major time period and fix an optimal minor product family from the two or more minor product families to a minor time period based at least on the minor productivity fraction.
    Type: Grant
    Filed: February 23, 2015
    Date of Patent: October 10, 2017
    Assignee: JDA Software Group, Inc.
    Inventors: Narasimha B Kamath, Devender Chauhan, Deba Kalyan Mohanty, Dinesh Damodaran
  • Publication number: 20170236430
    Abstract: The present invention provides an educational toy simulator which comprises a base member and a set of peg pieces. The base member is formed of multiple layers, and one or more cut outs are formed in the base member for receiving the corresponding peg piece. The cut outs and the peg pieces are formed with a contoured, stepped or tapered structure to prevent the peg pieces from coming in contact with the image display member. A slot is formed in the base member to slidably receive an image display member for displaying a picture through the cut outs. A depth of the peg pieces is smaller than a depth of the corresponding cut outs. Since the image display member is slidably received in the slot, the displayed pictures may be changed from time to time thus providing capabilities for introducing more vocabulary to a learner in a playful way.
    Type: Application
    Filed: July 29, 2016
    Publication date: August 17, 2017
    Inventors: Navneet Kalia, Devender Dutt Kalia
  • Patent number: 9678682
    Abstract: A system includes non-volatile memory storing firmware and an embedded baseboard management controller (BMC). The BMC includes a BMC volatile memory and a BMC processor coupled to the BMC volatile memory and the non-volatile memory. The BMC processor performs a first method wherein the firmware is obtained from the non-volatile memory, instrumented, and stored on a host computer volatile memory. Also in the first method, separate copies of vital debug information about the instrumented firmware are stored on the BMC volatile memory and the host computer volatile memory. The system further includes a host computer housing the embedded BMC, the host computer volatile memory, and a host computer processor coupled to the host computer volatile memory. The host computer processor performs a second method wherein the instrumented firmware is obtained from the host computer volatile memory and executed.
    Type: Grant
    Filed: October 13, 2015
    Date of Patent: June 13, 2017
    Assignee: International Business Machines Corporation
    Inventors: Vijay F. G. Lobo, Devender Rao Marri
  • Publication number: 20170102888
    Abstract: A system includes non-volatile memory storing firmware and an embedded baseboard management controller (BMC). The BMC includes a BMC volatile memory and a BMC processor coupled to the BMC volatile memory and the non-volatile memory. The BMC processor performs a first method wherein the firmware is obtained from the non-volatile memory, instrumented, and stored on a host computer volatile memory. Also in the first method, separate copies of vital debug information about the instrumented firmware are stored on the BMC volatile memory and the host computer volatile memory. The system further includes a host computer housing the embedded BMC, the host computer volatile memory, and a host computer processor coupled to the host computer volatile memory. The host computer processor performs a second method wherein the instrumented firmware is obtained from the host computer volatile memory and executed.
    Type: Application
    Filed: October 13, 2015
    Publication date: April 13, 2017
    Inventors: Vijay F. G. Lobo, Devender Rao Marri
  • Publication number: 20170102889
    Abstract: A system includes non-volatile memory storing firmware and an embedded baseboard management controller (BMC). The BMC includes a BMC volatile memory and a BMC processor coupled to the BMC volatile memory and the non-volatile memory. The BMC processor performs a first method wherein the firmware is obtained from the non-volatile memory, instrumented, and stored on a host computer volatile memory. Also in the first method, separate copies of vital debug information about the instrumented firmware are stored on the BMC volatile memory and the host computer volatile memory. The system further includes a host computer housing the embedded BMC, the host computer volatile memory, and a host computer processor coupled to the host computer volatile memory. The host computer processor performs a second method wherein the instrumented firmware is obtained from the host computer volatile memory and executed.
    Type: Application
    Filed: October 23, 2015
    Publication date: April 13, 2017
    Inventors: Vijay F. G. Lobo, Devender Rao Marri
  • Patent number: 9544497
    Abstract: Systems and methods for deductively determining a resolution setting for an imaging device based on one or more features of a scene are disclosed. The features may include the size of primary or foreground faces within the scene, a maximum amount of high frequency content within the scene, a lighting condition of the scene, or a battery level of an electronic device.
    Type: Grant
    Filed: May 21, 2014
    Date of Patent: January 10, 2017
    Assignee: QUALCOMM Incorporated
    Inventors: Babak Forutanpour, William Thomas Frantz, Shriram Ganesh, Daniel Scott Baker, Devender Akira Yamakawa
  • Patent number: 9317972
    Abstract: Method and apparatus for displaying augmented reality contents are disclosed. The method may include controlling a camera to scan an environment in view of a user, identifying a set of surfaces in the environment for displaying user interface windows according to characteristics of the environment, prioritizing a set of augmented reality contents for display with respect to the set of surfaces in the environment, and displaying the set of augmented reality contents on the set of surfaces in a display. Characteristics of the environment comprise at least aspect ratio of the set of surfaces with respect to the set of augmented reality contents to be displayed, and/or background color of the set of surfaces with respect to the set of augmented reality contents to be displayed.
    Type: Grant
    Filed: December 18, 2012
    Date of Patent: April 19, 2016
    Assignee: QUALCOMM Incorporated
    Inventors: Babak Forutanpour, Shriram Ganesh, Daniel S. Baker, Devender A. Yamakawa
  • Patent number: D800833
    Type: Grant
    Filed: May 6, 2016
    Date of Patent: October 24, 2017
    Inventors: Navneet Kalia, Devender Dutt Kalia
  • Patent number: D809597
    Type: Grant
    Filed: May 6, 2016
    Date of Patent: February 6, 2018
    Inventors: Navneet Kalia, Devender Dutt Kalia