Patents by Inventor Dharam Pal Gosain

Dharam Pal Gosain has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8618545
    Abstract: A thin film transistor capable of reliably preventing the entry of light into an active layer, and a display including the thin film transistor are provided. A thin film transistor includes: a gate electrode; an active layer; and a gate insulating film arranged between the gate electrode and the active layer, the gate insulating film including a first insulating film, a first light-absorbing layer and a second insulating film, the first insulating film arranged in contact with the gate electrode, the first light-absorbing layer arranged in contact with the first insulating film and made of a material absorbing light of 420 nm or less, the second insulating film arranged between the first light-absorbing layer and the active layer.
    Type: Grant
    Filed: February 21, 2012
    Date of Patent: December 31, 2013
    Assignee: Sony Corporation
    Inventors: Dharam Pal Gosain, Tsutomu Tanaka, Narihiro Morosawa
  • Patent number: 8619208
    Abstract: In the case of forming switching elements and light sensor elements over the same substrate, an increase in the film thickness of active layers in an attempt to enhance the sensitivity of the light sensor elements would adversely affect the characteristics of the switching elements (TFTs). In a configuration of a display in which a channel layer 25 for constituting thin film transistors to form the switching elements for pixels and a photoelectric conversion layer 35 for constituting the light sensor elements are provided over a gate insulating film 24 on a glass substrate 5 to be provided with a plurality of pixels arranged in a matrix pattern, the photoelectric conversion layer 35 is formed to be thicker than the channel layer 25, and/or the photoelectric conversion layer 35 is formed of a material different from the material for the channel layer 25, whereby the light absorption coefficient of the photoelectric conversion layer 35 is made to be higher than that of the channel layer 25.
    Type: Grant
    Filed: September 18, 2008
    Date of Patent: December 31, 2013
    Assignee: Japan Display West Inc.
    Inventors: Dharam Pal Gosain, Tsutomu Tanaka, Makoto Takatoku
  • Publication number: 20120146039
    Abstract: A thin film transistor capable of reliably preventing the entry of light into an active layer, and a display including the thin film transistor are provided. A thin film transistor includes: a gate electrode; an active layer; and a gate insulating film arranged between the gate electrode and the active layer, the gate insulating film including a first insulating film, a first light-absorbing layer and a second insulating film, the first insulating film arranged in contact with the gate electrode, the first light-absorbing layer arranged in contact with the first insulating film and made of a material absorbing light of 420 nm or less, the second insulating film arranged between the first light-absorbing layer and the active layer.
    Type: Application
    Filed: February 21, 2012
    Publication date: June 14, 2012
    Applicant: SONY CORPORATION
    Inventors: Dharam Pal Gosain, Tsutomu Tanaka, Narihiro Morosawa
  • Patent number: 8194469
    Abstract: An optical sensor element has a gate electrode opposed to a semiconductor layer made of an oxide semiconductor via a gate insulating film, source and drain electrodes being connected to the semiconductor layer, wherein the amount of light received by the semiconductor layer is read out as a drain current which changes in a non-volatile manner relative to a gate voltage.
    Type: Grant
    Filed: January 28, 2009
    Date of Patent: June 5, 2012
    Assignee: Sony Corporation
    Inventors: Tsutomu Tanaka, Dharam Pal Gosain
  • Patent number: 8134154
    Abstract: A thin film transistor capable of reliably preventing the entry of light into an active layer, and a display including the thin film transistor are provided. A thin film transistor includes: a gate electrode; an active layer; and a gate insulating film arranged between the gate electrode and the active layer, the gate insulating film including a first insulating film, a first light-absorbing layer and a second insulating film, the first insulating film arranged in contact with the gate electrode, the first light-absorbing layer arranged in contact with the first insulating film and made of a material absorbing light of 420 nm or less, the second insulating film arranged between the first light-absorbing layer and the active layer.
    Type: Grant
    Filed: February 25, 2009
    Date of Patent: March 13, 2012
    Assignee: Sony Corporation
    Inventors: Dharam Pal Gosain, Tsutomu Tanaka, Narihiro Morosawa
  • Patent number: 8115188
    Abstract: Disclosed herein is a memory element, including a parallel combination of a thin film transistor; and a resistance change element, the thin film transistor including a semiconductor thin film in which a channel region, and an input terminal and an output terminal located on both sides of the channel region, respectively, are formed, and a gate electrode overlapping the channel region through an insulating film to become a control terminal, the resistance change element including one conductive layer connected to the input terminal side of the thin film transistor, the other conductive layer connected to the output terminal side of the thin film transistor, and at least one oxide film layer disposed between the one conductive layer and the other conductive layer.
    Type: Grant
    Filed: January 23, 2009
    Date of Patent: February 14, 2012
    Assignee: Sony Corporation
    Inventors: Dharam Pal Gosain, Makoto Takatoku, Yoshiharu Nakajima, Tsutomu Tanaka
  • Patent number: 7892063
    Abstract: A method of manufacturing a tubular carbon molecule capable of regularly aligning a carbon nanotube with a finer spacing is provided. A catalyst is arranged on a material substrate (10) made of a semiconductor such as silicon (Si) and including iron (Fe) as a catalyst through the use of melting according to a modulated heat distribution (11). The heat distribution (11) is formed, for example, through diffracting an energy beam (12) by a diffraction grating (13). As a method of arranging the catalyst, for example, iron may be deposited in a planar shape or a projection shape in a position corresponding to the heat distribution (11), or the deposited iron may be used as a master to be transferred to another substrate. A carbon nanotube is grown through the use of the arranged catalyst. The grown carbon nanotube can be used as a recording apparatus, a field electron emission device, an FED or the like.
    Type: Grant
    Filed: January 14, 2009
    Date of Patent: February 22, 2011
    Assignee: Sony Corporation
    Inventors: Dharam Pal Gosain, Hisashi Kajiura, Ryuichiro Maruyama, Masashi Shiraishi, Houjin Huang, Koji Kadono, Shigeaki Wachi, Masafumi Ata
  • Patent number: 7828620
    Abstract: A method of manufacturing a tubular carbon molecule capable of regularly aligning a carbon nanotube with a finer spacing is provided. A catalyst is arranged on a material substrate (10) made of a semiconductor such as silicon (Si) and including iron (Fe) as a catalyst through the use of melting according to a modulated heat distribution (11). The heat distribution (11) is formed, for example, through diffracting an energy beam (12) by a diffraction grating (13). As a method of arranging the catalyst, for example, iron may be deposited in a planar shape or a projection shape in a position corresponding to the heat distribution (11), or the deposited iron may be used as a master to be transferred to another substrate. A carbon nanotube is grown through the use of the arranged catalyst. The grown carbon nanotube can be used as a recording apparatus, a field electron emission device, an FED or the like.
    Type: Grant
    Filed: January 8, 2004
    Date of Patent: November 9, 2010
    Assignee: Sony Corporation
    Inventors: Dharam Pal Gosain, Hisashi Kajiura, Ryuichiro Maruyama, Masashi Shiraishi, Houjin Huang, Koji Kadono, Shigeaki Wachi, Masafumi Ata
  • Publication number: 20100171120
    Abstract: In the case of forming switching elements and light sensor elements over the same substrate, an increase in the film thickness of active layers in an attempt to enhance the sensitivity of the light sensor elements would adversely affect the characteristics of the switching elements (TFTs). In a configuration of a display in which a channel layer 25 for constituting thin film transistors to form the switching elements for pixels and a photoelectric conversion layer 35 for constituting the light sensor elements are provided over a gate insulating film 24 on a glass substrate 5 to be provided with a plurality of pixels arranged in a matrix pattern, the photoelectric conversion layer 35 is formed to be thicker than the channel layer 25, and/or the photoelectric conversion layer 35 is formed of a material different from the material for the channel layer 25, whereby the light absorption coefficient of the photoelectric conversion layer 35 is made to be higher than that of the channel layer 25.
    Type: Application
    Filed: September 18, 2008
    Publication date: July 8, 2010
    Applicant: SONY CORPORATION
    Inventors: Dharam Pal Gosain, Tsutomu Tanaka, Makoto Takatoku
  • Publication number: 20100097838
    Abstract: An optical sensor element has a gate electrode opposed to a semiconductor layer made of an oxide semiconductor via a gate insulating film, source and drain electrodes being connected to the semiconductor layer, wherein the amount of light received by the semiconductor layer is read out as a drain current which changes in a non-volatile manner relative to a gate voltage.
    Type: Application
    Filed: January 28, 2009
    Publication date: April 22, 2010
    Applicant: Sony Corporation
    Inventors: Tsutomu Tanaka, Dharam Pal Gosain
  • Publication number: 20090230390
    Abstract: A thin film transistor capable of reliably preventing the entry of light into an active layer, and a display including the thin film transistor are provided. A thin film transistor includes: a gate electrode; an active layer; and a gate insulating film arranged between the gate electrode and the active layer, the gate insulating film including a first insulating film, a first light-absorbing layer and a second insulating film, the first insulating film arranged in contact with the gate electrode, the first light-absorbing layer arranged in contact with the first insulating film and made of a material absorbing light of 420 nm or less, the second insulating film arranged between the first light-absorbing layer and the active layer.
    Type: Application
    Filed: February 25, 2009
    Publication date: September 17, 2009
    Applicant: SONY CORPORATION
    Inventors: Dharam Pal Gosain, Tsutomu Tanaka, Narihiro Morosawa
  • Publication number: 20090194760
    Abstract: Disclosed herein is a memory element, including a parallel combination of a thin film transistor; and a resistance change element, the thin film transistor including a semiconductor thin film in which a channel region, and an input terminal and an output terminal located on both sides of the channel region, respectively, are formed, and a gate electrode overlapping the channel region through an insulating film to become a control terminal, the resistance change element including one conductive layer connected to the input terminal side of the thin film transistor, the other conductive layer connected to the output terminal side of the thin film transistor, and at least one oxide film layer disposed between the one conductive layer and the other conductive layer.
    Type: Application
    Filed: January 23, 2009
    Publication date: August 6, 2009
    Applicant: Sony Corporation
    Inventors: Dharam Pal Gosain, Makoto Takatoku, Yoshiharu Nakajima, Tsutomu Tanaka
  • Patent number: 7538014
    Abstract: Disclosed are a method of producing a crystalline semiconductor material capable of improving the crystallinity and a method of fabricating a semiconductor device using the crystalline semiconductor material. An amorphous film is uniformly irradiated with a pulse laser beam (energy beam) emitted from an XeCl excimer laser by 150 times so as to heat the amorphous film at such a temperature as to partially melt crystal grains having the {100} orientations with respect to the vertical direction of a substrate and melt amorphous film or crystal grains having face orientations other than the {100} orientations. Silicon crystals having the {100} orientations newly occur between a silicon oxide film and liquid-phase silicon and are bonded to each other at random, to newly form crystal grains having the {100} orientations.
    Type: Grant
    Filed: October 26, 2006
    Date of Patent: May 26, 2009
    Assignee: Sony Corporation
    Inventors: Dharam Pal Gosain, Akio Machida, Kazushi Nakano, Toshio Fujino, Junichi Sato
  • Publication number: 20090121605
    Abstract: A method of manufacturing a tubular carbon molecule capable of regularly aligning a carbon nanotube with a finer spacing is provided. A catalyst is arranged on a material substrate (10) made of a semiconductor such as silicon (Si) and including iron (Fe) as a catalyst through the use of melting according to a modulated heat distribution (11). The heat distribution (11) is formed, for example, through diffracting an energy beam (12) by a diffraction grating (13). As a method of arranging the catalyst, for example, iron may be deposited in a planar shape or a projection shape in a position corresponding to the heat distribution (11), or the deposited iron may be used as a master to be transferred to another substrate. A carbon nanotube is grown through the use of the arranged catalyst. The grown carbon nanotube can be used as a recording apparatus, a field electron emission device, an FED or the like.
    Type: Application
    Filed: January 14, 2009
    Publication date: May 14, 2009
    Applicant: Sony Corporation
    Inventors: Dharam Pal Gosain, Hisashi Kajiura, Ryuichiro Maruyama, Masashi Shiraishi, Houjin Huang, Koji Kodono, Shigeaki Wachi, Masafumi Ata
  • Publication number: 20080315746
    Abstract: A method of manufacturing a fine structure capable of accurately controlling formation positions of tubular structures made of carbon or the like is provided. Column-shaped protrusions (11) are formed on a substrate (10). Next, a catalyst material (20) such as iron (Fe) is adhered to the substrate (10). Subsequently, by providing the substrate (10) with heat treatment, the catalyst material (20) is melted and agglomerated on the side faces (11A) of the protrusions (11), and thereby cyclic catalyst patterns made of the catalyst material (20) are formed on the side faces (11A) of the protrusions (11). After that, tubular structures (30) in a state of tube are grown by using the catalyst patterns. The tubular structures (30) become carbon (nano) pipes, which are raised from the side faces (11A) of the protrusions (11) and whose ends (30A) are opened. The tubular structures (30) can be formed correspondingly to the positions of the protrusions (11) accurately.
    Type: Application
    Filed: August 31, 2004
    Publication date: December 25, 2008
    Inventors: Dharam Pal Gosain, Hisashi Kajiura, Yosuke Murakami, Masafumi Ata
  • Patent number: 7169690
    Abstract: Disclosed are a method of producing a crystalline semiconductor material capable of improving the crystallinity and a method of fabricating a semiconductor device using the crystalline semiconductor material. An amorphous film is uniformly irradiated with a pulse laser beam (energy beam) emitted from an XeCl excimer laser by 150 times so as to heat the amorphous film at such a temperature as to partially melt crystal grains having the {100} orientations with respect to the vertical direction of a substrate and melt amorphous film or crystal grains having face orientations other than the {100} orientations. Silicon crystals having the {100} orientations newly occur between a silicon oxide film and liquid-phase silicon and are bonded to each other at random, to newly form crystal grains having the {100} orientations.
    Type: Grant
    Filed: April 5, 2005
    Date of Patent: January 30, 2007
    Assignee: Sony Corporation
    Inventors: Dharam Pal Gosain, Akio Machida, Kazushi Nakano, Toshio Fujino, Junichi Sato
  • Patent number: 7144793
    Abstract: Disclosed are a method of producing a crystalline semiconductor material capable of improving the crystallinity and a method of fabricating a semiconductor device using the crystalline semiconductor material. An amorphous film is uniformly irradiated with a pulse laser beam (energy beam) emitted from an XeCl excimer laser by 150 times so as to heat the amorphous film at such a temperature as to partially melt crystal grains having the {100} orientations with respect to the vertical direction of a substrate and melt amorphous film or crystal grains having face orientations other than the {100} orientations. Silicon crystals having the {100} orientations newly occur between a silicon oxide film and liquid-phase silicon and are bonded to each other at random, to newly form crystal grains having the {100} orientations.
    Type: Grant
    Filed: August 21, 2003
    Date of Patent: December 5, 2006
    Assignee: Sony Corporation
    Inventors: Dharam Pal Gosain, Akio Machida, Kazushi Nakano, Toshio Fujino, Junichi Sato
  • Patent number: 6984552
    Abstract: A low concentration impurity diffusion region is formed with good controllability even in case of using a low heat resistant substrate. When doping a semiconductor layer, after forming the semiconductor layer on the substrate, the amount of the dopant ion adsorbed on a surface of the semiconductor layer is controlled by introducing hydrogen gas at the time of plasma irradiation and activating the adsorbed dopant ion in the semiconductor layer by an excimer laser.
    Type: Grant
    Filed: December 7, 2001
    Date of Patent: January 10, 2006
    Assignee: Sony Corporation
    Inventors: Akio Machida, Setsuo Usui, Dharam Pal Gosain
  • Patent number: 6953754
    Abstract: The invention provides a functional device having no cracks and capable of delivering good functional characteristics and a method of manufacturing the same. A functional layer (14) is formed by crystallizing an amorphous silicon layer as a precursor layer by laser beam irradiation. A laser beam irradiation conducts heat up to a substrate (11) to cause it to try to expand; a stress to be produced by the difference in thermal expansion coefficient between the substrate (11) and the functional layer (14) is shut off by an organic polymer layer (12) lower in thermal expansion coefficient than the substrate (11), thereby causing no cracks nor separations in the functional layer (14). The organic polymer layer (12) is preferably made of an acrylic resin, an epoxy resin, or a polymer material containing these that is deformed by an optical or thermal process to undergo a three-dimensional condensation polymerization, for higher compactness and hardness.
    Type: Grant
    Filed: June 4, 2002
    Date of Patent: October 11, 2005
    Assignee: Sony Corporation
    Inventors: Akio Machida, Dharam Pal Gosain, Setsuo Usui
  • Publication number: 20050085099
    Abstract: To enable radiating an optimum energy beam depending upon the structure of a substrate (whether a metallic film is formed or not) when an amorphous semiconductor film is crystallized and uniformly crystallizing the overall film, first, a photoresist film and the area of an N+ doped amorphous silicon film on the photoresist film are selectively removed by a lift-off method. Hereby, the amorphous silicon film is thicker in an area except an area over a metallic film (a gate electrode) than in the area over the metallic film. In this state, a laser beam is radiated. The N+ doped amorphous silicon film and an amorphous silicon film are melted by radiating a laser beam and afterward, melted areas are crystallized by cooling them to room temperature.
    Type: Application
    Filed: October 29, 2004
    Publication date: April 21, 2005
    Inventors: Dharam Pal Gosain, Jonathan Westwater, Miyako Nakagoe, Setsuo Usui