Patents by Inventor Dharam Pal Gosain
Dharam Pal Gosain has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 8618545Abstract: A thin film transistor capable of reliably preventing the entry of light into an active layer, and a display including the thin film transistor are provided. A thin film transistor includes: a gate electrode; an active layer; and a gate insulating film arranged between the gate electrode and the active layer, the gate insulating film including a first insulating film, a first light-absorbing layer and a second insulating film, the first insulating film arranged in contact with the gate electrode, the first light-absorbing layer arranged in contact with the first insulating film and made of a material absorbing light of 420 nm or less, the second insulating film arranged between the first light-absorbing layer and the active layer.Type: GrantFiled: February 21, 2012Date of Patent: December 31, 2013Assignee: Sony CorporationInventors: Dharam Pal Gosain, Tsutomu Tanaka, Narihiro Morosawa
-
Patent number: 8619208Abstract: In the case of forming switching elements and light sensor elements over the same substrate, an increase in the film thickness of active layers in an attempt to enhance the sensitivity of the light sensor elements would adversely affect the characteristics of the switching elements (TFTs). In a configuration of a display in which a channel layer 25 for constituting thin film transistors to form the switching elements for pixels and a photoelectric conversion layer 35 for constituting the light sensor elements are provided over a gate insulating film 24 on a glass substrate 5 to be provided with a plurality of pixels arranged in a matrix pattern, the photoelectric conversion layer 35 is formed to be thicker than the channel layer 25, and/or the photoelectric conversion layer 35 is formed of a material different from the material for the channel layer 25, whereby the light absorption coefficient of the photoelectric conversion layer 35 is made to be higher than that of the channel layer 25.Type: GrantFiled: September 18, 2008Date of Patent: December 31, 2013Assignee: Japan Display West Inc.Inventors: Dharam Pal Gosain, Tsutomu Tanaka, Makoto Takatoku
-
Publication number: 20120146039Abstract: A thin film transistor capable of reliably preventing the entry of light into an active layer, and a display including the thin film transistor are provided. A thin film transistor includes: a gate electrode; an active layer; and a gate insulating film arranged between the gate electrode and the active layer, the gate insulating film including a first insulating film, a first light-absorbing layer and a second insulating film, the first insulating film arranged in contact with the gate electrode, the first light-absorbing layer arranged in contact with the first insulating film and made of a material absorbing light of 420 nm or less, the second insulating film arranged between the first light-absorbing layer and the active layer.Type: ApplicationFiled: February 21, 2012Publication date: June 14, 2012Applicant: SONY CORPORATIONInventors: Dharam Pal Gosain, Tsutomu Tanaka, Narihiro Morosawa
-
Patent number: 8194469Abstract: An optical sensor element has a gate electrode opposed to a semiconductor layer made of an oxide semiconductor via a gate insulating film, source and drain electrodes being connected to the semiconductor layer, wherein the amount of light received by the semiconductor layer is read out as a drain current which changes in a non-volatile manner relative to a gate voltage.Type: GrantFiled: January 28, 2009Date of Patent: June 5, 2012Assignee: Sony CorporationInventors: Tsutomu Tanaka, Dharam Pal Gosain
-
Patent number: 8134154Abstract: A thin film transistor capable of reliably preventing the entry of light into an active layer, and a display including the thin film transistor are provided. A thin film transistor includes: a gate electrode; an active layer; and a gate insulating film arranged between the gate electrode and the active layer, the gate insulating film including a first insulating film, a first light-absorbing layer and a second insulating film, the first insulating film arranged in contact with the gate electrode, the first light-absorbing layer arranged in contact with the first insulating film and made of a material absorbing light of 420 nm or less, the second insulating film arranged between the first light-absorbing layer and the active layer.Type: GrantFiled: February 25, 2009Date of Patent: March 13, 2012Assignee: Sony CorporationInventors: Dharam Pal Gosain, Tsutomu Tanaka, Narihiro Morosawa
-
Patent number: 8115188Abstract: Disclosed herein is a memory element, including a parallel combination of a thin film transistor; and a resistance change element, the thin film transistor including a semiconductor thin film in which a channel region, and an input terminal and an output terminal located on both sides of the channel region, respectively, are formed, and a gate electrode overlapping the channel region through an insulating film to become a control terminal, the resistance change element including one conductive layer connected to the input terminal side of the thin film transistor, the other conductive layer connected to the output terminal side of the thin film transistor, and at least one oxide film layer disposed between the one conductive layer and the other conductive layer.Type: GrantFiled: January 23, 2009Date of Patent: February 14, 2012Assignee: Sony CorporationInventors: Dharam Pal Gosain, Makoto Takatoku, Yoshiharu Nakajima, Tsutomu Tanaka
-
Patent number: 7892063Abstract: A method of manufacturing a tubular carbon molecule capable of regularly aligning a carbon nanotube with a finer spacing is provided. A catalyst is arranged on a material substrate (10) made of a semiconductor such as silicon (Si) and including iron (Fe) as a catalyst through the use of melting according to a modulated heat distribution (11). The heat distribution (11) is formed, for example, through diffracting an energy beam (12) by a diffraction grating (13). As a method of arranging the catalyst, for example, iron may be deposited in a planar shape or a projection shape in a position corresponding to the heat distribution (11), or the deposited iron may be used as a master to be transferred to another substrate. A carbon nanotube is grown through the use of the arranged catalyst. The grown carbon nanotube can be used as a recording apparatus, a field electron emission device, an FED or the like.Type: GrantFiled: January 14, 2009Date of Patent: February 22, 2011Assignee: Sony CorporationInventors: Dharam Pal Gosain, Hisashi Kajiura, Ryuichiro Maruyama, Masashi Shiraishi, Houjin Huang, Koji Kadono, Shigeaki Wachi, Masafumi Ata
-
Patent number: 7828620Abstract: A method of manufacturing a tubular carbon molecule capable of regularly aligning a carbon nanotube with a finer spacing is provided. A catalyst is arranged on a material substrate (10) made of a semiconductor such as silicon (Si) and including iron (Fe) as a catalyst through the use of melting according to a modulated heat distribution (11). The heat distribution (11) is formed, for example, through diffracting an energy beam (12) by a diffraction grating (13). As a method of arranging the catalyst, for example, iron may be deposited in a planar shape or a projection shape in a position corresponding to the heat distribution (11), or the deposited iron may be used as a master to be transferred to another substrate. A carbon nanotube is grown through the use of the arranged catalyst. The grown carbon nanotube can be used as a recording apparatus, a field electron emission device, an FED or the like.Type: GrantFiled: January 8, 2004Date of Patent: November 9, 2010Assignee: Sony CorporationInventors: Dharam Pal Gosain, Hisashi Kajiura, Ryuichiro Maruyama, Masashi Shiraishi, Houjin Huang, Koji Kadono, Shigeaki Wachi, Masafumi Ata
-
Publication number: 20100171120Abstract: In the case of forming switching elements and light sensor elements over the same substrate, an increase in the film thickness of active layers in an attempt to enhance the sensitivity of the light sensor elements would adversely affect the characteristics of the switching elements (TFTs). In a configuration of a display in which a channel layer 25 for constituting thin film transistors to form the switching elements for pixels and a photoelectric conversion layer 35 for constituting the light sensor elements are provided over a gate insulating film 24 on a glass substrate 5 to be provided with a plurality of pixels arranged in a matrix pattern, the photoelectric conversion layer 35 is formed to be thicker than the channel layer 25, and/or the photoelectric conversion layer 35 is formed of a material different from the material for the channel layer 25, whereby the light absorption coefficient of the photoelectric conversion layer 35 is made to be higher than that of the channel layer 25.Type: ApplicationFiled: September 18, 2008Publication date: July 8, 2010Applicant: SONY CORPORATIONInventors: Dharam Pal Gosain, Tsutomu Tanaka, Makoto Takatoku
-
Publication number: 20100097838Abstract: An optical sensor element has a gate electrode opposed to a semiconductor layer made of an oxide semiconductor via a gate insulating film, source and drain electrodes being connected to the semiconductor layer, wherein the amount of light received by the semiconductor layer is read out as a drain current which changes in a non-volatile manner relative to a gate voltage.Type: ApplicationFiled: January 28, 2009Publication date: April 22, 2010Applicant: Sony CorporationInventors: Tsutomu Tanaka, Dharam Pal Gosain
-
Publication number: 20090230390Abstract: A thin film transistor capable of reliably preventing the entry of light into an active layer, and a display including the thin film transistor are provided. A thin film transistor includes: a gate electrode; an active layer; and a gate insulating film arranged between the gate electrode and the active layer, the gate insulating film including a first insulating film, a first light-absorbing layer and a second insulating film, the first insulating film arranged in contact with the gate electrode, the first light-absorbing layer arranged in contact with the first insulating film and made of a material absorbing light of 420 nm or less, the second insulating film arranged between the first light-absorbing layer and the active layer.Type: ApplicationFiled: February 25, 2009Publication date: September 17, 2009Applicant: SONY CORPORATIONInventors: Dharam Pal Gosain, Tsutomu Tanaka, Narihiro Morosawa
-
Publication number: 20090194760Abstract: Disclosed herein is a memory element, including a parallel combination of a thin film transistor; and a resistance change element, the thin film transistor including a semiconductor thin film in which a channel region, and an input terminal and an output terminal located on both sides of the channel region, respectively, are formed, and a gate electrode overlapping the channel region through an insulating film to become a control terminal, the resistance change element including one conductive layer connected to the input terminal side of the thin film transistor, the other conductive layer connected to the output terminal side of the thin film transistor, and at least one oxide film layer disposed between the one conductive layer and the other conductive layer.Type: ApplicationFiled: January 23, 2009Publication date: August 6, 2009Applicant: Sony CorporationInventors: Dharam Pal Gosain, Makoto Takatoku, Yoshiharu Nakajima, Tsutomu Tanaka
-
Patent number: 7538014Abstract: Disclosed are a method of producing a crystalline semiconductor material capable of improving the crystallinity and a method of fabricating a semiconductor device using the crystalline semiconductor material. An amorphous film is uniformly irradiated with a pulse laser beam (energy beam) emitted from an XeCl excimer laser by 150 times so as to heat the amorphous film at such a temperature as to partially melt crystal grains having the {100} orientations with respect to the vertical direction of a substrate and melt amorphous film or crystal grains having face orientations other than the {100} orientations. Silicon crystals having the {100} orientations newly occur between a silicon oxide film and liquid-phase silicon and are bonded to each other at random, to newly form crystal grains having the {100} orientations.Type: GrantFiled: October 26, 2006Date of Patent: May 26, 2009Assignee: Sony CorporationInventors: Dharam Pal Gosain, Akio Machida, Kazushi Nakano, Toshio Fujino, Junichi Sato
-
Publication number: 20090121605Abstract: A method of manufacturing a tubular carbon molecule capable of regularly aligning a carbon nanotube with a finer spacing is provided. A catalyst is arranged on a material substrate (10) made of a semiconductor such as silicon (Si) and including iron (Fe) as a catalyst through the use of melting according to a modulated heat distribution (11). The heat distribution (11) is formed, for example, through diffracting an energy beam (12) by a diffraction grating (13). As a method of arranging the catalyst, for example, iron may be deposited in a planar shape or a projection shape in a position corresponding to the heat distribution (11), or the deposited iron may be used as a master to be transferred to another substrate. A carbon nanotube is grown through the use of the arranged catalyst. The grown carbon nanotube can be used as a recording apparatus, a field electron emission device, an FED or the like.Type: ApplicationFiled: January 14, 2009Publication date: May 14, 2009Applicant: Sony CorporationInventors: Dharam Pal Gosain, Hisashi Kajiura, Ryuichiro Maruyama, Masashi Shiraishi, Houjin Huang, Koji Kodono, Shigeaki Wachi, Masafumi Ata
-
Publication number: 20080315746Abstract: A method of manufacturing a fine structure capable of accurately controlling formation positions of tubular structures made of carbon or the like is provided. Column-shaped protrusions (11) are formed on a substrate (10). Next, a catalyst material (20) such as iron (Fe) is adhered to the substrate (10). Subsequently, by providing the substrate (10) with heat treatment, the catalyst material (20) is melted and agglomerated on the side faces (11A) of the protrusions (11), and thereby cyclic catalyst patterns made of the catalyst material (20) are formed on the side faces (11A) of the protrusions (11). After that, tubular structures (30) in a state of tube are grown by using the catalyst patterns. The tubular structures (30) become carbon (nano) pipes, which are raised from the side faces (11A) of the protrusions (11) and whose ends (30A) are opened. The tubular structures (30) can be formed correspondingly to the positions of the protrusions (11) accurately.Type: ApplicationFiled: August 31, 2004Publication date: December 25, 2008Inventors: Dharam Pal Gosain, Hisashi Kajiura, Yosuke Murakami, Masafumi Ata
-
Patent number: 7169690Abstract: Disclosed are a method of producing a crystalline semiconductor material capable of improving the crystallinity and a method of fabricating a semiconductor device using the crystalline semiconductor material. An amorphous film is uniformly irradiated with a pulse laser beam (energy beam) emitted from an XeCl excimer laser by 150 times so as to heat the amorphous film at such a temperature as to partially melt crystal grains having the {100} orientations with respect to the vertical direction of a substrate and melt amorphous film or crystal grains having face orientations other than the {100} orientations. Silicon crystals having the {100} orientations newly occur between a silicon oxide film and liquid-phase silicon and are bonded to each other at random, to newly form crystal grains having the {100} orientations.Type: GrantFiled: April 5, 2005Date of Patent: January 30, 2007Assignee: Sony CorporationInventors: Dharam Pal Gosain, Akio Machida, Kazushi Nakano, Toshio Fujino, Junichi Sato
-
Patent number: 7144793Abstract: Disclosed are a method of producing a crystalline semiconductor material capable of improving the crystallinity and a method of fabricating a semiconductor device using the crystalline semiconductor material. An amorphous film is uniformly irradiated with a pulse laser beam (energy beam) emitted from an XeCl excimer laser by 150 times so as to heat the amorphous film at such a temperature as to partially melt crystal grains having the {100} orientations with respect to the vertical direction of a substrate and melt amorphous film or crystal grains having face orientations other than the {100} orientations. Silicon crystals having the {100} orientations newly occur between a silicon oxide film and liquid-phase silicon and are bonded to each other at random, to newly form crystal grains having the {100} orientations.Type: GrantFiled: August 21, 2003Date of Patent: December 5, 2006Assignee: Sony CorporationInventors: Dharam Pal Gosain, Akio Machida, Kazushi Nakano, Toshio Fujino, Junichi Sato
-
Patent number: 6984552Abstract: A low concentration impurity diffusion region is formed with good controllability even in case of using a low heat resistant substrate. When doping a semiconductor layer, after forming the semiconductor layer on the substrate, the amount of the dopant ion adsorbed on a surface of the semiconductor layer is controlled by introducing hydrogen gas at the time of plasma irradiation and activating the adsorbed dopant ion in the semiconductor layer by an excimer laser.Type: GrantFiled: December 7, 2001Date of Patent: January 10, 2006Assignee: Sony CorporationInventors: Akio Machida, Setsuo Usui, Dharam Pal Gosain
-
Patent number: 6953754Abstract: The invention provides a functional device having no cracks and capable of delivering good functional characteristics and a method of manufacturing the same. A functional layer (14) is formed by crystallizing an amorphous silicon layer as a precursor layer by laser beam irradiation. A laser beam irradiation conducts heat up to a substrate (11) to cause it to try to expand; a stress to be produced by the difference in thermal expansion coefficient between the substrate (11) and the functional layer (14) is shut off by an organic polymer layer (12) lower in thermal expansion coefficient than the substrate (11), thereby causing no cracks nor separations in the functional layer (14). The organic polymer layer (12) is preferably made of an acrylic resin, an epoxy resin, or a polymer material containing these that is deformed by an optical or thermal process to undergo a three-dimensional condensation polymerization, for higher compactness and hardness.Type: GrantFiled: June 4, 2002Date of Patent: October 11, 2005Assignee: Sony CorporationInventors: Akio Machida, Dharam Pal Gosain, Setsuo Usui
-
Publication number: 20050085099Abstract: To enable radiating an optimum energy beam depending upon the structure of a substrate (whether a metallic film is formed or not) when an amorphous semiconductor film is crystallized and uniformly crystallizing the overall film, first, a photoresist film and the area of an N+ doped amorphous silicon film on the photoresist film are selectively removed by a lift-off method. Hereby, the amorphous silicon film is thicker in an area except an area over a metallic film (a gate electrode) than in the area over the metallic film. In this state, a laser beam is radiated. The N+ doped amorphous silicon film and an amorphous silicon film are melted by radiating a laser beam and afterward, melted areas are crystallized by cooling them to room temperature.Type: ApplicationFiled: October 29, 2004Publication date: April 21, 2005Inventors: Dharam Pal Gosain, Jonathan Westwater, Miyako Nakagoe, Setsuo Usui