Patents by Inventor Dhiraj Kumar

Dhiraj Kumar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12189192
    Abstract: An optical out-coupler unit for out-coupling light from a waveguide, comprising a substrate having a planar top surface, a waveguide arranged on the top surface of the substrate and having a facet, a reflective surface, wherein the reflective surface is arranged spaced apart from the facet and opposing the facet, wherein the reflective surface is inclined with respect to a normal to the top surface of the substrate by more than 45°. The optical out-coupler may be part of a photonic integrated chip (PIC).
    Type: Grant
    Filed: May 13, 2022
    Date of Patent: January 7, 2025
    Assignee: Rockley Photonics Limited
    Inventors: Mohammadsadegh Faraji-Dana, Farzaneh Afshinmanesh, Iain Anteney, Jeffrey Driscoll, Alexander Gondarenko, Dhiraj Kumar, Abu Thomas, Andrea Trita, Aaron John Zilkie
  • Publication number: 20230290227
    Abstract: A tournament application system and method of participation/operation thereof is disclosed herein. The tournament application system and method of participation/operation thereof includes an application system with a computing system capable of interacting with a plurality of users. A server including a module arranged to interact with a plurality of users to operate a game containing a plurality of levels, the system being arranged to operate a tournament structure. The tournament application system includes tournaments which have multiple teams in each game. The method of participation/operation of the tournament application includes the steps of: a) users taking part in an event by grouping themselves into teams; b) the players being able to join the tournament or game at any stage of the tournament; c) the tournament application system provides short tournament in a team format where the teams can be of equal or unequal strength.
    Type: Application
    Filed: July 18, 2022
    Publication date: September 14, 2023
    Inventors: Saumya Singh Rathore, Paavan Nanda, Dhiraj Kumar Bedi, Manish Mittal
  • Publication number: 20230271923
    Abstract: The presently disclosed subject matter provides compositions, kits, and methods comprising imaging agents that can detect Programmed Cell Death Ligand 1 (PD-L1). The presently disclosed imaging agents can be used to detect diseases and disorders, such as cancer, infection, and inflammation, in a subject.
    Type: Application
    Filed: August 6, 2021
    Publication date: August 31, 2023
    Inventors: Sridhar Nimmagadda, Dhiraj Kumar, Martin Gilbert Pomper
  • Publication number: 20230252212
    Abstract: Testbench creation for sub-design verification can include receiving, using computer hardware, a selection of a sub-design of a circuit design. The sub-design is one of a plurality of sub-designs of the circuit design. The circuit design includes a plurality of parameter values. A list of port-level signal information is generated for the selected sub-design. The one or more parameter values of the circuit design are extracted. Switching activity of each port-level signal from the list is logged in a switching activity file while running a circuit design testbench for the circuit design with the selected sub-design in scope. From the list, the switching activity, and the one or more parameter values, a sub-design testbench for the selected sub-design is generated.
    Type: Application
    Filed: February 4, 2022
    Publication date: August 10, 2023
    Applicant: Xilinx, Inc.
    Inventors: Rajvinder S. Klair, Dhiraj Kumar Prasad, Saikat Bandyopadhyay, Ashish Kumar Jain, Shiyao Ge, Tapodyuti Mandal, Miti Joshi
  • Patent number: 11674878
    Abstract: A differential emissivity imaging device for measuring evaporable particle properties can include a heated plate, a thermal camera, a memory device, and an output interface. The heated plate can have an upper surface oriented to receive falling evaporable particles. The evaporable particles have a particle emissivity and the upper surface has a plate surface emissivity. The thermal camera can be oriented to produce a thermal image of the upper surface. A memory device can include instructions that cause the imaging device to calculate a mass of the individual evaporable particle via heat conduction using a calculated surface area and an evaporation time.
    Type: Grant
    Filed: November 27, 2020
    Date of Patent: June 13, 2023
    Assignee: University of Utah Research Foundation
    Inventors: Tim Garrett, Dhiraj Kumar Singh, Karlie Rees, Eric Pardyjak
  • Patent number: 11626876
    Abstract: Push-pull integrated circuit output drivers may interfere with communication by other entities on a bus when an integrated circuit is powered down. When there is no power and/or when the bonding pad is externally driven above the internal supply voltage, the substrate/body/well of the p-channel field effect transistor (PFET) of the output driver is biased to prevent its drain diode from becoming forward biased thereby preventing interference with communication on the bus. Also, when there is no power, driver is powered down or pull up is disabled, the gate of the driver PFET is driven to a voltage that ensures the driver PFET remains off when the bonding pad is externally driven above the internal supply voltage.
    Type: Grant
    Filed: August 4, 2021
    Date of Patent: April 11, 2023
    Assignee: Rambus Inc.
    Inventors: Panduka Wijetunga, Dhiraj Kumar
  • Patent number: 11607466
    Abstract: The presently disclosed subject matter provides compositions, kits, and methods comprising imaging agents that can detect Programmed Death Ligand 1 (PD-L1). The presently disclosed imaging agents can be used to detect diseases and disorders, such as cancer, infection, and inflammation, in a subject.
    Type: Grant
    Filed: December 21, 2017
    Date of Patent: March 21, 2023
    Assignee: The Johns Hopkins University
    Inventors: Sridhar Nimmagadda, Martin Pomper, Samit Chatterjee, Wojciech Lesniak, Dhiraj Kumar
  • Patent number: 11543452
    Abstract: A method includes instantiating a simulation of an electronic design for a device under test (DUT) in hardware design language responsive to a user selection thereof. A subset of leaf nodes from a plurality of leaf nodes from the electronic design with input/output signaling of more than two values is identified. A hierarchical path for each leaf node of the plurality of leaf nodes of the electronic design for the DUT with respect to a testbench is calculated. A bypass module for the subset of leaf nodes is generated. The bypass module is generated in response to detecting presence of the subset of leaf nodes in the electronic design with input/output signaling of more than two values. The bypass module facilitates communication between the testbench and the subset of leaf nodes. Leaf nodes other than the subset of leaf nodes communicate with the testbench without communicating through the bypass module.
    Type: Grant
    Filed: September 8, 2020
    Date of Patent: January 3, 2023
    Assignee: XILINX, INC.
    Inventors: Saikat Bandyopadhyay, Rajvinder S. Klair, Dhiraj Kumar Prasad, Ender Tunc Eroglu, Rupendra Bakoliya, Jayashree Rangarajan
  • Publication number: 20220365280
    Abstract: An optical out-coupler unit for out-coupling light from a waveguide, comprising a substrate having a planar top surface, a waveguide arranged on the top surface of the substrate and having a facet, a reflective surface, wherein the reflective surface is arranged spaced apart from the facet and opposing the facet, wherein the reflective surface is inclined with respect to a normal to the top surface of the substrate by more than 45°. The optical out-coupler may be part of a photonic integrated chip (PIC).
    Type: Application
    Filed: May 13, 2022
    Publication date: November 17, 2022
    Inventors: Mohammadsadegh FARAJI-DANA, Farzaneh AFSHINMANESH, Iain ANTENEY, Jeffrey DRISCOLL, Alexander GONDARENKO, Dhiraj KUMAR, Abu THOMAS, Andrea TRITA, Aaron John ZILKIE
  • Publication number: 20220052690
    Abstract: Push-pull integrated circuit output drivers may interfere with communication by other entities on a bus when an integrated circuit is powered down. When there is no power and/or when the bonding pad is externally driven above the internal supply voltage, the substrate/body/well of the p-channel field effect transistor (PFET) of the output driver is biased to prevent its drain diode from becoming forward biased thereby preventing interference with communication on the bus. Also, when there is no power, driver is powered down or pull up is disabled, the gate of the driver PFET is driven to a voltage that ensures the driver PFET remains off when the bonding pad is externally driven above the internal supply voltage.
    Type: Application
    Filed: August 4, 2021
    Publication date: February 17, 2022
    Inventors: Panduka WIJETUNGA, Dhiraj KUMAR
  • Publication number: 20210172855
    Abstract: A differential emissivity imaging device for measuring evaporable particle properties can include a heated plate, a thermal camera, a memory device, and an output interface. The heated plate can have an upper surface oriented to receive falling evaporable particles. The evaporable particles have a particle emissivity and the upper surface has a plate surface emissivity. The thermal camera can be oriented to produce a thermal image of the upper surface. A memory device can include instructions that cause the imaging device to calculate a mass of the individual evaporable particle via heat conduction using a calculated surface area and an evaporation time.
    Type: Application
    Filed: November 27, 2020
    Publication date: June 10, 2021
    Inventors: Tim Garrett, Dhiraj Kumar Singh, Karlie Rees, Eric Pardyjak
  • Publication number: 20190314531
    Abstract: The presently disclosed subject matter provides compositions, kits, and methods comprising imaging agents that can detect Programmed Death Ligand 1 (PD-L1). The presently disclosed imaging agents can be used to detect diseases and disorders, such as cancer, infection, and inflammation, in a subject.
    Type: Application
    Filed: December 21, 2017
    Publication date: October 17, 2019
    Inventors: Sridhar Nimmagadda, Martin Pomper, Samit Chatterjee, Wojciech Lesniak, Dhiraj Kumar
  • Patent number: 10175099
    Abstract: A device is disclosed for monitoring power from a laser diode. The device includes a substrate having a top surface and a first facet perpendicular to the top surface through which light enters the substrate. The device further includes a second facet onto which light that has entered the substrate through the first facet along an optical axis that is non-normal to the first facet is incident. The device further includes a photodiode fabricated on the top surface of the substrate for measuring an intensity of the light that enters the first facet of the substrate along the optical axis that is non-normal to the first facet. The light that has entered the substrate through the first facet along the optical axis that is non-normal to the first facet is reflected by the second facet toward a photoactive region of the photodiode.
    Type: Grant
    Filed: August 3, 2017
    Date of Patent: January 8, 2019
    Assignee: GLOBAL COMMUNICATION SEMICONDUCTORS, LLC
    Inventors: Samuel C. Wang, Peter Lao, Dhiraj Kumar
  • Publication number: 20180180468
    Abstract: A device is disclosed for monitoring power from a laser diode. The device includes a substrate having a top surface and a first facet perpendicular to the top surface through which light enters the substrate. The device further includes a second facet onto which light that has entered the substrate through the first facet along an optical axis that is non-normal to the first facet is incident. The device further includes a photodiode fabricated on the top surface of the substrate for measuring an intensity of the light that enters the first facet of the substrate along the optical axis that is non-normal to the first facet. The light that has entered the substrate through the first facet along the optical axis that is non-normal to the first facet is reflected by the second facet toward a photoactive region of the photodiode.
    Type: Application
    Filed: August 3, 2017
    Publication date: June 28, 2018
    Inventors: Samuel C. Wang, Peter Lao, Dhiraj Kumar
  • Patent number: 7706174
    Abstract: A static random access memory (“SRAM”) comprising: a pair of inverters each having an input and an output; a cross-coupling path coupling the input of a first inverter to the output of a second inverter; and a transmission gate, wherein the transmission gate comprises a p-channel transistor coupling the input of the second inverter to the output of the first inverter; and an n-channel transistor coupling the input of the second inverter to the output of the first inverter in parallel with the p-channel transistor. In another embodiment, the SRAM comprises a first inverter having a supply voltage node connected to a supply voltage, and a ground node connected to ground; a second inverter cross-coupled with the first inverter and having a supply voltage node connected to a supply voltage, and a ground node; and a switch selectively connecting and disconnecting the ground node of the second inverter to ground.
    Type: Grant
    Filed: May 15, 2008
    Date of Patent: April 27, 2010
    Assignee: The University of Bristol
    Inventors: Dhiraj Kumar Pradhan, Jawar Singh, Jimson Mathew
  • Publication number: 20090285011
    Abstract: A static random access memory (“SRAM”) comprising: a pair of inverters each having an input and an output; a cross-coupling path coupling the input of a first inverter to the output of a second inverter; and a transmission gate, wherein the transmission gate comprises a p-channel transistor coupling the input of the second inverter to the output of the first inverter; and an n-channel transistor coupling the input of the second inverter to the output of the first inverter in parallel with the p-channel transistor. In another embodiment, the SRAM comprises a first inverter having a supply voltage node connected to a supply voltage, and a ground node connected to ground; a second inverter cross-coupled with the first inverter and having a supply voltage node connected to a supply voltage, and a ground node; and a switch selectively connecting and disconnecting the ground node of the second inverter to ground.
    Type: Application
    Filed: May 15, 2008
    Publication date: November 19, 2009
    Inventors: Dhiraj Kumar Pradhan, Jawar Singh, Jimson Mathew
  • Publication number: 20080170571
    Abstract: A method and system for synchronous page addressing in a data packet switch is provided. Within the packet switch, separate devices are responsible for storing a portion of a received data packet, and thus a view of used memory addresses seen by one device matches that seen by the others. Each device uses the same order of memory addresses to write data so that bytes of data are stored as a linked-list of pages. Maintaining the same sequence of page requests and sequence of free-page addresses to which to write these pages ensures consistent addressing of the portions of the data packet.
    Type: Application
    Filed: January 12, 2007
    Publication date: July 17, 2008
    Inventors: Dhiraj Kumar, Kanwar Jit Singh
  • Publication number: 20070011396
    Abstract: A system and method for buffering data packets in a data network device having a DRAM buffer are presented. When writing packets, the buffering system separates available memory channels into two groups corresponding to ingress and egress data. Based on the source of the data packets, data pages from the data packets are assigned to channels from either the ingress or egress group. Non-conflicting sets of addresses, called cachelines, are requested on each memory channel, and the data pages are evenly distributed over the assigned channels before being mapped to a cacheline. The number of read transactions currently being monitored by the system is controlled in order to reduce random packet read conflicts. Additionally, write and read transactions are grouped by an arbitration unit prior to being sent to the DRAM controller.
    Type: Application
    Filed: June 30, 2005
    Publication date: January 11, 2007
    Applicant: UTStarcom, Inc.
    Inventors: Kanwar Singh, Dhiraj Kumar
  • Publication number: 20060268913
    Abstract: A system for streaming incoming data packets into a buffer memory is presented. The system may receive incoming data packets over a variety of interfaces and separate the data packet into a header page and one or more data page. The system may interface with a header processor and send header pages to the header processor to be modified. Data pages from the incoming data packets are streamed to a central staging memory, allowing the use of a simple first-in-first-out (FIFO) buffer. The system may receive modified headers from the header processor and provide multiple copies of data packets for multicast or sampling purposes. Data packet copies may then be written to an external memory buffer over one or more external memory channels. The system may also provide an error recovery process to account for corrupt data packets streamed to the external memory buffer.
    Type: Application
    Filed: May 27, 2005
    Publication date: November 30, 2006
    Applicant: UTStarcom, Inc.
    Inventors: Kanwar Singh, Dhiraj Kumar
  • Patent number: 5974255
    Abstract: An object oriented test provides a hierarchy of classes under test, each of the classes under test having a predefined inheritance structure. The test provides a test class for each corresponding class under test. Each class under test has a test member function, a set state member function, a verify state member function, and a test vector which includes an initial complete state, an expected complete state, a set of function inputs for a member function being tested, and a set of expected results. The test sets an initial complete state of the test class by implicitly calling the set state member functions through the inheritance structure of the test classes. Next a member function of a desired class under test is executed. The final complete state of the class under test as well as the outputs and returned values of all member functions which were executed are compared with the set of expected results.
    Type: Grant
    Filed: October 18, 1993
    Date of Patent: October 26, 1999
    Assignee: Motorola, Inc.
    Inventors: Dhiraj Kumar Gossain, Dana Mark Rigg