Patents by Inventor Dian Sugiarto

Dian Sugiarto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050020048
    Abstract: A method of forming a silicon carbide layer for use in integrated circuit fabrication processes is provided. The silicon carbide layer is formed by reacting a gas mixture comprising a silicon source, a carbon source, and a dopant in the presence of an electric field. The as-deposited silicon carbide layer has a compressibility that varies as a function of the amount of dopant present in the gas mixture during later formation.
    Type: Application
    Filed: July 20, 2004
    Publication date: January 27, 2005
    Inventors: Srinivas Nemani, Li-Qun Xia, Dian Sugiarto, Ellie Yieh, Ping Xu, Francimar Campana-Schmitt, Jia Lee
  • Patent number: 6838393
    Abstract: Methods are provided for depositing a silicon carbide layer having significantly reduced current leakage. The silicon carbide layer may be a barrier layer or part of a barrier bilayer that also includes a barrier layer. Methods for depositing oxygen-doped silicon carbide barrier layers are also provided. The silicon carbide layer may be deposited by reacting a gas mixture comprising an organosilicon compound, an aliphatic hydrocarbon comprising a carbon-carbon double bond or a carbon-carbon triple bond, and optionally, helium in a plasma. Alternatively, the silicon carbide layer may be deposited by reacting a gas mixture comprising hydrogen or argon and an organosilicon compound in a plasma.
    Type: Grant
    Filed: September 19, 2002
    Date of Patent: January 4, 2005
    Assignee: Applied Materials, Inc.
    Inventors: Kang Sub Yim, Melissa M. Tam, Dian Sugiarto, Chi-I Lang, Peter Wai-Man Lee, Li-Qun Xia
  • Patent number: 6825562
    Abstract: A damascene structure, and a method of fabricating same, containing relatively low dielectric constant materials (e.g., k less than 3.8). A silicon-based, photosensitive material, such as plasma polymerized methylsilane (PPMS), is used to form both single and dual damascene structures containing low k materials. During the manufacturing process that forms the damascene structures, the silicon-based photosensitive material is used as both a hard mask and/or an etch stop.
    Type: Grant
    Filed: November 8, 2002
    Date of Patent: November 30, 2004
    Assignee: Applied Materials Inc.
    Inventors: Mehul B. Naik, Tim Weidman, Dian Sugiarto, Allen Zhao
  • Patent number: 6764958
    Abstract: A method of forming a silicon carbide layer for use in integrated circuit fabrication processes is provided. The silicon carbide layer is formed by reacting a gas mixture comprising a silicon source, a carbon source, and a dopant in the presence of an electric field. The as-deposited silicon carbide layer has a compressibility that varies as a function of the amount of dopant present in the gas mixture during later formation.
    Type: Grant
    Filed: July 28, 2000
    Date of Patent: July 20, 2004
    Assignee: Applied Materials Inc.
    Inventors: Srinivas D Nemani, Li-Qun Xia, Dian Sugiarto, Ellie Yieh, Ping Xu, Francimar Campana-Schmitt, Jia Lee
  • Publication number: 20030211244
    Abstract: A method for depositing a low dielectric constant film having a dielectric constant of about 3.0 or less, preferably about 2.5 or less, is provided by reacting a gas mixture including one or more organosilicon compounds and one or more oxidizing gases. In one aspect, the organosilicon compound comprises a hydrocarbon component having one or more unsaturated carbon-carbon bonds, and in another aspect, the gas mixture further comprises one or more aliphatic hydrocarbon compounds having one or more unsaturated carbon-carbon bonds. The low dielectric constant film is post-treated after it is deposited. In one aspect, the post treatment is an electron beam treatment, and in another aspect, the post-treatment is an annealing process.
    Type: Application
    Filed: April 8, 2003
    Publication date: November 13, 2003
    Applicant: Applied Materials, Inc.
    Inventors: Lihua Li, Wen H. Zhu, Tzu-Fang Huang, Li-Qun Xia, Ellie Y. Yieh, Son Van Nguyen, Lester A. D'Cruz, Troy Kim, Dian Sugiarto, Peter Wai-Man Lee, Hichem M'Saad, Melissa M. Tam, Yi Zheng, Srinivas D. Nemani
  • Publication number: 20030207033
    Abstract: A showerhead adapted for distributing gases into a process chamber and a method for forming dielectric layers on a substrate are generally provided. In one embodiment, a showerhead for distributing gases in a processing chamber includes an annular body coupled between a disk and a mounting flange. The disk has a plurality of holes formed therethrough. A lip extends from a side of the disk opposite the annular body and away from the mounting flange. The showerhead may be used for the deposition of dielectric materials on a substrate. In one embodiment, silicon nitride and silicon oxide layers are formed on the substrate without removing the substrate from a processing chamber utilizing the showerhead of the present invention.
    Type: Application
    Filed: May 6, 2002
    Publication date: November 6, 2003
    Applicant: Applied Materials, Inc.
    Inventors: Kang Sub Yim, Soovo Sen, Dian Sugiarto, Peter Lee, Ellie Yieh
  • Patent number: 6632735
    Abstract: A method of forming a carbon-doped silicon oxide layer is disclosed. The carbon-doped silicon oxide layer is formed by applying an electric field to a gas mixture comprising an organosilane compound and an oxidizing gas. The carbon-doped silicon oxide layer is compatible with integrated circuit fabrication processes. In one integrated circuit fabrication process, the carbon-doped silicon oxide layer is used as an intermetal dielectric layer. In another integrated circuit fabrication process, the carbon-doped silicon oxide layer is incorporated into a damascene structure.
    Type: Grant
    Filed: August 7, 2001
    Date of Patent: October 14, 2003
    Assignee: Applied Materials, Inc.
    Inventors: Wai-Fan Yau, Ju-Hyung Lee, Nasreen Gazala Chopra, Tzu-Fang Huang, David Cheung, Farhad Moghadam, Kuo-Wei Liu, Yung-Cheng Lu, Ralf B. Willecke, Paul Matthews, Dian Sugiarto
  • Publication number: 20030139035
    Abstract: Methods are provided for depositing a silicon carbide layer having significantly reduced current leakage. The silicon carbide layer may be a barrier layer or part of a barrier bilayer that also includes a barrier layer. Methods for depositing oxygen-doped silicon carbide barrier layers are also provided. The silicon carbide layer may be deposited by reacting a gas mixture comprising an organosilicon compound, an aliphatic hydrocarbon comprising a carbon-carbon double bond or a carbon-carbon triple bond, and optionally, helium in a plasma. Alternatively, the silicon carbide layer may be deposited by reacting a gas mixture comprising hydrogen or argon and an organosilicon compound in a plasma.
    Type: Application
    Filed: September 19, 2002
    Publication date: July 24, 2003
    Applicant: APPLIED MATERIALS, INC.
    Inventors: Kang Sub Yim, Melissa M. Tam, Dian Sugiarto, Chi-I Lang, Peter Wai-Man Lee, Li-Qun Xia
  • Patent number: 6589715
    Abstract: A process for etching a PPMS layer that increases the etch selectivity of PPMS relative to PPMSO from an initial low etch selectivity to a higher etch selectivity at a later stage of the etching process. In some embodiments, the etch selectivity used during a first etching step of the process is less than 4:1 and the etch selectivity used during a second etching step, subsequent to the first step, is greater than 5:1. In some other embodiments, the etch selectivity of the first step is between 2-3:1 and the etch selectivity of the second step is greater than 8:1. Optionally, in still other embodiments a third etching step, performed between the first and second etching steps may be employed where the etch selectivity is between 3-8:1.
    Type: Grant
    Filed: March 15, 2001
    Date of Patent: July 8, 2003
    Assignees: France Telecom, Applied Materials, Inc.
    Inventors: Olivier Joubert, Cedric Monget, Timothy Weidman, Dian Sugiarto, David Mui
  • Publication number: 20030104708
    Abstract: A low dielectric constant film having silicon-carbon bonds and dielectric constant of about 3.0 or less, preferably about 2.5 or less, is provided. The low dielectric constant film is deposited by reacting a cyclic organosilicon compound and an aliphatic organosilicon compound with an oxidizing gas while applying RF power. The carbon content of the deposited film is between about 10 and about 30 atomic percent excluding hydrogen atoms, and is preferably between about 10 and about 20 atomic percent excluding hydrogen atoms.
    Type: Application
    Filed: November 22, 2002
    Publication date: June 5, 2003
    Applicant: Applied Materials, Inc.
    Inventors: Seon-Mee Cho, Peter Wai-Man Lee, Chi-I Lang, Dian Sugiarto, Chen-An Chen, Li-Qun Xia, Shankar Venkataraman, Ellie Yieh
  • Publication number: 20030062627
    Abstract: A damascene structure, and a method of fabricating same, containing relatively low dielectric constant materials (e.g., k less than 3.8). A silicon-based, photosensitive material, such as plasma polymerized methylsilane (PPMS), is used to form both single and dual damascene structures containing low k materials. During the manufacturing process that forms the damascene structures, the silicon-based photosensitive material is used as both a hard mask and/or an etch stop.
    Type: Application
    Filed: November 8, 2002
    Publication date: April 3, 2003
    Applicant: Applied Materials, Inc.
    Inventors: Mehul B. Naik, Tim Weidman, Dian Sugiarto, Allen Zhao
  • Publication number: 20030032305
    Abstract: A method of forming a carbon-doped silicon oxide layer is disclosed. The carbon-doped silicon oxide layer is formed by applying an electric field to a gas mixture comprising an organosilane compound and an oxidizing gas. The carbon-doped silicon oxide layer is compatible with integrated circuit fabrication processes. In one integrated circuit fabrication process, the carbon-doped silicon oxide layer is used as an intermetal dielectric layer. In another integrated circuit fabrication process, the carbon-doped silicon oxide layer is incorporated into a damascene structure.
    Type: Application
    Filed: August 7, 2001
    Publication date: February 13, 2003
    Applicant: Applied Materials, Inc.
    Inventors: Wai-Fan Yau, Ju-Hyung Lee, Nasreen Gazala Chopra, Tzu-Fang Huang, David Cheung, Farhad Moghadam, Kuo-Wei Liu, Yung-Cheng Lu, Ralf B. Willecke, Paul Matthews, Dian Sugiarto
  • Patent number: 6514857
    Abstract: A damascene structure, and a method of fabricating same, containing relatively low dielectric constant materials (e.g., k less than 3.8). A silicon-based, photosensitive material, such as plasma polymerized methylsilane (PPMS), is used to form both single and dual damascene structures containing low k materials. During the manufacturing process that forms the damascene structures, the silicon-based photosensitive material is used as both a hard mask and/or an etch stop.
    Type: Grant
    Filed: February 16, 2001
    Date of Patent: February 4, 2003
    Assignee: Applied Materials, Inc.
    Inventors: Mehul B. Naik, Tim Weidman, Dian Sugiarto, Allen Zhao
  • Publication number: 20030003768
    Abstract: A low dielectric constant film having silicon-carbon bonds and dielectric constant of about 3.0 or less, preferably about 2.5 or less, is provided. The low dielectric constant film is deposited by reacting a cyclic organosilicon compound and an aliphatic organosilicon compound with an oxidizing gas while applying RF power. The carbon content of the deposited film is between about 10 and about 30 atomic percent excluding hydrogen atoms, and is preferably between about 10 and about 20 atomic percent excluding hydrogen atoms.
    Type: Application
    Filed: June 18, 2001
    Publication date: January 2, 2003
    Applicant: Applied Materials, Inc.
    Inventors: Seon-Mee Cho, Peter Wai-Man Lee, Chi-I Lang, Dian Sugiarto, Chen-An Chen, Li-Qun Xia, Shankar Venkataraman, Ellie Yieh
  • Patent number: 6486082
    Abstract: A low dielectric constant film having silicon-carbon bonds and dielectric constant of about 3.0 or less, preferably about 2.5 or less, is provided. The low dielectric constant film is deposited by reacting a cyclic organosilicon compound and an aliphatic organosilicon compound with an oxidizing gas while applying RF power. The carbon content of the deposited film is between about 10 and about 30 atomic percent excluding hydrogen atoms, and is preferably between about 10 and about 20 atomic percent excluding hydrogen atoms.
    Type: Grant
    Filed: June 18, 2001
    Date of Patent: November 26, 2002
    Assignee: Applied Materials, Inc.
    Inventors: Seon-Mee Cho, Peter Wai-Man Lee, Chi-I Lang, Dian Sugiarto, Chen-An Chen, Li-Qun Xia, Shankar Venkataraman, Ellie Yieh
  • Patent number: 6395092
    Abstract: A silicon oxide film is deposited on a substrate by first introducing a process gas into a chamber. The process gas includes a gaseous source of silicon (such as silane), a gaseous source of fluorine (such as SiF4), a gaseous source of oxygen (such as nitrous oxide), and a gaseous source of nitrogen (such as N2). A plasma is formed from the process gas by applying a RF power component. Deposition is carried out at a rate of at least about 1.5 &mgr;m/min. The resulting FSG film is stable and has a low dielectric constant.
    Type: Grant
    Filed: April 17, 2000
    Date of Patent: May 28, 2002
    Assignee: Applied Materials, Inc.
    Inventors: Dian Sugiarto, Judy Huang, David Cheung
  • Publication number: 20010012592
    Abstract: A process for patterning a feature on a substrate using a plasma polymerized methylsilane (PPMS) photoresist layer or similar organosilicon film. The process includes the step of depositing a PPMS film having upper and lower strata such that the upper stratum is more photosensitive to ultraviolet radiation than is the lower stratum. In one embodiment, the upper and lower strata are formed in a multistep deposition process that, preferably, takes place in a single deposition chamber. In another embodiment, the upper and lower strata are formed by a process in which deposition parameters are modified to deposit a PPMS layer having a photosensitivity gradient between the upper and lower strata. In still another embodiment, various intermediate strata are formed. Preferably, each intermediate stratum has a photosensitivity that is higher than the stratum directly beneath it.
    Type: Application
    Filed: March 15, 2001
    Publication date: August 9, 2001
    Applicant: Applied Materials, Inc.
    Inventors: Olivier Joubert, Cedric Monget, Timothy Weidman, Dian Sugiarto, David Mui
  • Patent number: 6258735
    Abstract: The present invention provides a method of depositing a carbon doped silicon oxide film having a low dielectric constant (k). The concentration of oxygen is controlled to produce soft plasma conditions inside the chamber while a precursor gas is diverted through a bypass to stabilize the precursor gas flow prior to routing the precursor into the chamber and using a back to back plasma deposition scheme.
    Type: Grant
    Filed: October 5, 2000
    Date of Patent: July 10, 2001
    Assignee: Applied Materials, Inc.
    Inventors: Li-qun Xia, Tian-hoe Lim, Huong Thanh Nguyen, Dian Sugiarto
  • Patent number: 6238844
    Abstract: A process for patterning a feature on a substrate using; a plasma polymerized methylsilane (PPMS) photoresist layer or similar organosilicon film. The process includes the step of depositing a PPMS film having upper and lower strata such that the upper stratum is more photosensitive to ultraviolet radiation than is the lower stratum. In one embodiment, the upper and lower strata are formed in a multistep deposition process that, preferably, takes place in a single deposition chamber. In another embodiment, the upper and lower strata are formed by a process in which deposition parameters are modified to deposit a PPMS layer having a photosensitivity gradient between the upper and lower strata. In still another embodiment, various intermediate strata are formed. Preferably, each intermediate stratums has a photosensitivity that is higher than the stratum directly beneath it.
    Type: Grant
    Filed: February 2, 1999
    Date of Patent: May 29, 2001
    Assignee: Applied Materials, Inc.
    Inventors: Olivier Joubert, Cedric Monget, Timothy Weidman, Dian Sugiarto, David Mui
  • Patent number: 6204168
    Abstract: A damascene structure, and a method of fabricating same, containing relatively low dielectric constant materials (e.g., k less than 3.8). A silicon-based, photosensitive material, such as plasma polymerized methylsilane (PPMS), is used to form both single and dual damascene structures containing low k materials. During the manufacturing process that forms the damascene structures, the silicon-based photosensitive material is used as both a hard mask and/or an etch stop.
    Type: Grant
    Filed: February 2, 1998
    Date of Patent: March 20, 2001
    Assignee: Applied Materials, Inc.
    Inventors: Mehul B. Naik, Tim Weidman, Dian Sugiarto, Allen Zhao